X-Git-Url: https://git.archive.openwrt.org/?p=openwrt.git;a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Fpatches-4.4%2F739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch;h=a65f7d993f858567415feadc2aeac447f4f321de;hp=a54c12b1a0971d4dfaf9f9803f996158ba2012d4;hb=0368a41c49ee191efbfa643257f7953b7dac667c;hpb=7dde6885a608d77daf310dc231203974060e5f5a

diff --git a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
index a54c12b1a0..a65f7d993f 100644
--- a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
@@ -1,6 +1,14 @@
 --- a/arch/mips/ath79/gpio.c
 +++ b/arch/mips/ath79/gpio.c
-@@ -64,15 +64,21 @@ void ath79_gpio_function_disable(u32 mas
+@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func
+ 		reg = AR71XX_GPIO_REG_FUNC;
+ 	else if (soc_is_ar934x() ||
+ 		 soc_is_qca953x() ||
++		 soc_is_qca955x() ||
+ 		 soc_is_qca956x() ||
+ 		 soc_is_tp9343())
+ 		reg = AR934X_GPIO_REG_FUNC;
+@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas
  void __init ath79_gpio_output_select(unsigned gpio, u8 val)
  {
  	void __iomem *base = ath79_gpio_base;
@@ -9,6 +17,9 @@
  	u32 t, s;
  
 -	BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
+-
+-	if (gpio >= AR934X_GPIO_COUNT)
+-		return;
 +	if (soc_is_ar934x())
 +		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
 +	else if (soc_is_qca953x())
@@ -20,37 +31,8 @@
 +	else
 +		BUG();
  
--	if (gpio >= AR934X_GPIO_COUNT)
--		return;
--
 -	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
 +	reg = reg_base + 4 * (gpio / 4);
  	s = 8 * (gpio % 4);
  
  	t = __raw_readl(base + reg);
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -875,6 +875,14 @@
- #define QCA953X_GPIO_OUT_MUX_LED_LINK4		44
- #define QCA953X_GPIO_OUT_MUX_LED_LINK5		45
- 
-+#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
-+#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
-+#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
-+#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
-+#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
-+#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
-+#define QCA955X_GPIO_REG_FUNC		0x6c
-+
- #define QCA956X_GPIO_REG_OUT_FUNC0	0x2c
- #define QCA956X_GPIO_REG_OUT_FUNC1	0x30
- #define QCA956X_GPIO_REG_OUT_FUNC2	0x34
-@@ -1014,6 +1022,8 @@
- #define AR934X_GPIO_OUT_EXT_LNA0	46
- #define AR934X_GPIO_OUT_EXT_LNA1	47
- 
-+#define QCA955X_GPIO_OUT_GPIO		0
-+
- /*
-  * MII_CTRL block
-  */