X-Git-Url: https://git.archive.openwrt.org/?p=openwrt.git;a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Fpatches-3.18%2F735-MIPS-ath79-add-support-for-QCA956x-SoC.patch;h=7a3605ea1ac939bfd9e4106d4f8a711d181c4de6;hp=321626602840f5bae24865a77854b7d0b160a869;hb=90043a99adccb6c7f9dc881f051b5a7b247f8704;hpb=92b6bbd7032206be8dd19ddc0d8cdeb97c11ae84 diff --git a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch index 3216266028..7a3605ea1a 100644 --- a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -189,7 +189,7 @@ pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; break; -@@ -992,6 +1002,8 @@ void __init ath79_register_eth(unsigned +@@ -1018,6 +1028,8 @@ void __init ath79_register_eth(unsigned break; case ATH79_SOC_QCA9533: @@ -198,7 +198,7 @@ if (id == 0) { pdata->reset_bit = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO; -@@ -1097,6 +1109,8 @@ void __init ath79_register_eth(unsigned +@@ -1123,6 +1135,8 @@ void __init ath79_register_eth(unsigned case ATH79_SOC_AR9330: case ATH79_SOC_AR9331: case ATH79_SOC_QCA9533: @@ -276,8 +276,8 @@ --- a/arch/mips/ath79/early_printk.c +++ b/arch/mips/ath79/early_printk.c -@@ -117,6 +117,8 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_QCA9533: +@@ -118,6 +118,8 @@ static void prom_putchar_init(void) + case REV_ID_MAJOR_QCA9533_V2: case REV_ID_MAJOR_QCA9556: case REV_ID_MAJOR_QCA9558: + case REV_ID_MAJOR_TP9343: @@ -445,7 +445,7 @@ } --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig -@@ -1167,6 +1167,12 @@ config SOC_QCA955X +@@ -1193,6 +1193,12 @@ config SOC_QCA955X select PCI_AR724X if PCI def_bool n @@ -458,7 +458,7 @@ config ATH79_DEV_M25P80 select ATH79_DEV_SPI def_bool n -@@ -1204,7 +1210,7 @@ config ATH79_DEV_USB +@@ -1230,7 +1236,7 @@ config ATH79_DEV_USB def_bool n config ATH79_DEV_WMAC @@ -519,7 +519,7 @@ return -ENODEV; --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c -@@ -170,15 +170,30 @@ static void __init ath79_detect_sys_type +@@ -175,15 +175,30 @@ static void __init ath79_detect_sys_type rev = id & QCA955X_REV_ID_REVISION_MASK; break; @@ -543,8 +543,8 @@ - if (soc_is_qca953x() || soc_is_qca955x()) + if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561()) - sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", - chip, rev); + sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", + chip, ver, rev); + else if (soc_is_tp9343()) + sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", + chip, rev); @@ -686,8 +686,8 @@ #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 #define REV_ID_MAJOR_AR913X 0x00b0 -@@ -614,6 +712,8 @@ - #define REV_ID_MAJOR_QCA9533 0x0140 +@@ -615,6 +713,8 @@ + #define REV_ID_MAJOR_QCA9533_V2 0x0160 #define REV_ID_MAJOR_QCA9556 0x0130 #define REV_ID_MAJOR_QCA9558 0x1130 +#define REV_ID_MAJOR_TP9343 0x0150 @@ -695,7 +695,7 @@ #define AR71XX_REV_ID_MINOR_MASK 0x3 #define AR71XX_REV_ID_MINOR_AR7130 0x0 -@@ -638,6 +738,8 @@ +@@ -639,6 +739,8 @@ #define QCA955X_REV_ID_REVISION_MASK 0xf @@ -704,7 +704,7 @@ /* * SPI block */ -@@ -683,6 +785,19 @@ +@@ -684,6 +786,19 @@ #define AR934X_GPIO_REG_OUT_FUNC5 0x40 #define AR934X_GPIO_REG_FUNC 0x6c @@ -724,7 +724,7 @@ #define AR71XX_GPIO_COUNT 16 #define AR7240_GPIO_COUNT 18 #define AR7241_GPIO_COUNT 20 -@@ -691,6 +806,7 @@ +@@ -692,6 +807,7 @@ #define AR934X_GPIO_COUNT 23 #define QCA953X_GPIO_COUNT 24 #define QCA955X_GPIO_COUNT 24