X-Git-Url: https://git.archive.openwrt.org/?p=openwrt.git;a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Ffiles%2Farch%2Fmips%2Fath79%2Fdev-nfc.c;h=9b5256ecc214978605d4ca74de3d38d924ad0f7e;hp=6155f70fbab54058652a185666de9b21eee8fe68;hb=c2cee36c2ed8e0578a9f5d8c6d4ecd228dd5cbcc;hpb=c586ec0f293f11996e442886b5767c697b87f728

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
index 6155f70fba..9b5256ecc2 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
@@ -38,6 +38,22 @@ static struct platform_device ath79_nfc_device = {
 	},
 };
 
+static void __init ath79_nfc_init_resource(struct resource res[2],
+					   unsigned long base,
+					   unsigned long size,
+					   int irq)
+{
+	memset(res, 0, sizeof(struct resource) * 2);
+
+	res[0].flags = IORESOURCE_MEM;
+	res[0].start = base;
+	res[0].end = base + size - 1;
+
+	res[1].flags = IORESOURCE_IRQ;
+	res[1].start = irq;
+	res[1].end = irq;
+}
+
 static void ar934x_nfc_hw_reset(bool active)
 {
 	if (active) {
@@ -57,15 +73,33 @@ static void ar934x_nfc_hw_reset(bool active)
 
 static void ar934x_nfc_setup(void)
 {
-	ath79_nfc_resources[0].start = AR934X_NFC_BASE;
-	ath79_nfc_resources[0].end = AR934X_NFC_BASE + AR934X_NFC_SIZE - 1;
-	ath79_nfc_resources[0].flags = IORESOURCE_MEM;
+	ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
 
-	ath79_nfc_resources[1].start = ATH79_MISC_IRQ(21);
-	ath79_nfc_resources[1].end = ATH79_MISC_IRQ(21);
-	ath79_nfc_resources[1].flags = IORESOURCE_IRQ;
+	ath79_nfc_init_resource(ath79_nfc_resources,
+				AR934X_NFC_BASE, AR934X_NFC_SIZE,
+				ATH79_MISC_IRQ(21));
 
-	ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
+	platform_device_register(&ath79_nfc_device);
+}
+
+static void qca955x_nfc_hw_reset(bool active)
+{
+	if (active) {
+		ath79_device_reset_set(QCA955X_RESET_NANDF);
+		udelay(250);
+	} else {
+		ath79_device_reset_clear(QCA955X_RESET_NANDF);
+		udelay(100);
+	}
+}
+
+static void qca955x_nfc_setup(void)
+{
+	ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset;
+
+	ath79_nfc_init_resource(ath79_nfc_resources,
+				QCA955X_NFC_BASE, QCA955X_NFC_SIZE,
+				ATH79_MISC_IRQ(21));
 
 	platform_device_register(&ath79_nfc_device);
 }
@@ -85,6 +119,11 @@ void __init ath79_nfc_set_swap_dma(bool enable)
 	ath79_nfc_data.swap_dma = enable;
 }
 
+void __init ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode)
+{
+	ath79_nfc_data.ecc_mode = mode;
+}
+
 void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts)
 {
 	ath79_nfc_data.parts = parts;
@@ -95,6 +134,8 @@ void __init ath79_register_nfc(void)
 {
 	if (soc_is_ar934x())
 		ar934x_nfc_setup();
+	else if (soc_is_qca955x())
+		qca955x_nfc_setup();
 	else
 		BUG();
 }