---- a/net/mac80211/agg-rx.c
-+++ b/net/mac80211/agg-rx.c
-@@ -204,6 +204,8 @@ static void ieee80211_send_addba_resp(st
- memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
- memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
-+ else if (sdata->vif.type == NL80211_IFTYPE_WDS)
-+ memcpy(mgmt->bssid, da, ETH_ALEN);
-
- mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
---- a/net/mac80211/agg-tx.c
-+++ b/net/mac80211/agg-tx.c
-@@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
- memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
- if (sdata->vif.type == NL80211_IFTYPE_AP ||
- sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
-- sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
-+ sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
-+ sdata->vif.type == NL80211_IFTYPE_WDS)
- memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-@@ -527,6 +528,7 @@ int ieee80211_start_tx_ba_session(struct
- sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
- sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
- sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS &&
- sdata->vif.type != NL80211_IFTYPE_ADHOC)
- return -EINVAL;
+--- a/drivers/net/wireless/ath/ath10k/mac.c
++++ b/drivers/net/wireless/ath/ath10k/mac.c
+@@ -1351,12 +1351,12 @@ static int ath10k_update_channel_list(st
+ ch->allow_vht = true;
+
+ ch->allow_ibss =
+- !(channel->flags & IEEE80211_CHAN_NO_IBSS);
++ !(channel->flags & IEEE80211_CHAN_NO_IR);
+
+ ch->ht40plus =
+ !(channel->flags & IEEE80211_CHAN_NO_HT40PLUS);
+
+- passive = channel->flags & IEEE80211_CHAN_PASSIVE_SCAN;
++ passive = channel->flags & IEEE80211_CHAN_NO_IR;
+ ch->passive = passive;
+
+ ch->freq = channel->center_freq;
+--- a/drivers/net/wireless/ath/ath9k/Kconfig
++++ b/drivers/net/wireless/ath/ath9k/Kconfig
+@@ -90,7 +90,7 @@ config ATH9K_DFS_CERTIFIED
+
+ config ATH9K_TX99
+ bool "Atheros ath9k TX99 testing support"
+- depends on CFG80211_CERTIFICATION_ONUS
++ depends on ATH9K_DEBUGFS && CFG80211_CERTIFICATION_ONUS
+ default n
+ ---help---
+ Say N. This should only be enabled on systems undergoing
+@@ -108,6 +108,14 @@ config ATH9K_TX99
+ be evaluated to meet the RF exposure limits set forth in the
+ governmental SAR regulations.
+
++config ATH9K_WOW
++ bool "Wake on Wireless LAN support (EXPERIMENTAL)"
++ depends on ATH9K && PM
++ default n
++ ---help---
++ This option enables Wake on Wireless LAN support for certain cards.
++ Currently, AR9462 is supported.
++
+ config ATH9K_LEGACY_RATE_CONTROL
+ bool "Atheros ath9k rate control"
+ depends on ATH9K
+--- a/drivers/net/wireless/ath/ath9k/Makefile
++++ b/drivers/net/wireless/ath/ath9k/Makefile
+@@ -11,11 +11,13 @@ ath9k-$(CPTCFG_ATH9K_BTCOEX_SUPPORT) +=
+ ath9k-$(CPTCFG_ATH9K_LEGACY_RATE_CONTROL) += rc.o
+ ath9k-$(CPTCFG_ATH9K_PCI) += pci.o
+ ath9k-$(CPTCFG_ATH9K_AHB) += ahb.o
+-ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
+ ath9k-$(CPTCFG_ATH9K_DFS_DEBUGFS) += dfs_debug.o
+-ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += \
+- dfs.o
+-ath9k-$(CONFIG_PM_SLEEP) += wow.o
++ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += dfs.o
++ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
++ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
++
++ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o \
++ spectral.o
---- a/net/mac80211/debugfs_sta.c
-+++ b/net/mac80211/debugfs_sta.c
-@@ -66,11 +66,11 @@ static ssize_t sta_flags_read(struct fil
- test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
-
- int res = scnprintf(buf, sizeof(buf),
-- "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-+ "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
- TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
- TEST(PS_DRIVER), TEST(AUTHORIZED),
- TEST(SHORT_PREAMBLE),
-- TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
-+ TEST(WME), TEST(CLEAR_PS_FILT),
- TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
- TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
- TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
---- a/net/mac80211/iface.c
-+++ b/net/mac80211/iface.c
-@@ -463,7 +463,6 @@ int ieee80211_do_open(struct wireless_de
- struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
- struct net_device *dev = wdev->netdev;
- struct ieee80211_local *local = sdata->local;
-- struct sta_info *sta;
- u32 changed = 0;
- int res;
- u32 hw_reconf_flags = 0;
-@@ -629,30 +628,8 @@ int ieee80211_do_open(struct wireless_de
+ obj-$(CPTCFG_ATH9K) += ath9k.o
- set_bit(SDATA_STATE_RUNNING, &sdata->state);
+@@ -41,6 +43,8 @@ ath9k_hw-y:= \
+ ar9003_eeprom.o \
+ ar9003_paprd.o
-- if (sdata->vif.type == NL80211_IFTYPE_WDS) {
-- /* Create STA entry for the WDS peer */
-- sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
-- GFP_KERNEL);
-- if (!sta) {
-- res = -ENOMEM;
-- goto err_del_interface;
-- }
++ath9k_hw-$(CPTCFG_ATH9K_WOW) += ar9003_wow.o
++
+ ath9k_hw-$(CPTCFG_ATH9K_BTCOEX_SUPPORT) += btcoex.o \
+ ar9003_mci.o
+ obj-$(CPTCFG_ATH9K_HW) += ath9k_hw.o
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -17,6 +17,7 @@
+ #include "hw.h"
+ #include "ar9003_mac.h"
+ #include "ar9003_2p2_initvals.h"
++#include "ar9003_buffalo_initvals.h"
+ #include "ar9485_initvals.h"
+ #include "ar9340_initvals.h"
+ #include "ar9330_1p1_initvals.h"
+@@ -26,6 +27,7 @@
+ #include "ar9462_2p0_initvals.h"
+ #include "ar9462_2p1_initvals.h"
+ #include "ar9565_1p0_initvals.h"
++#include "ar9565_1p1_initvals.h"
+
+ /* General hardware code for the AR9003 hadware family */
+
+@@ -148,7 +150,11 @@ static void ar9003_hw_init_mode_regs(str
+ ar9340Modes_high_ob_db_tx_gain_table_1p0);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9340Modes_fast_clock_1p0);
++ ar9340Modes_fast_clock_1p0);
++ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++ ar9340_1p0_baseband_core_txfir_coeff_japan_2484);
++ INIT_INI_ARRAY(&ah->ini_dfs,
++ ar9340_1p0_baseband_postamble_dfs_channel);
+
+ if (!ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+@@ -187,17 +193,17 @@ static void ar9003_hw_init_mode_regs(str
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
+
+- /* Load PCIE SERDES settings from INI */
-
-- sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
-- sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
-- sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
+- /* Awake Setting */
-
-- res = sta_info_insert(sta);
-- if (res) {
-- /* STA has been freed */
-- goto err_del_interface;
-- }
+- INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1);
-
-- rate_control_rate_init(sta);
-- netif_carrier_on(dev);
-- } else if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE) {
-+ if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE)
- rcu_assign_pointer(local->p2p_sdata, sdata);
-- }
-
- /*
- * set_multicast_list will be invoked by the networking core
-@@ -1116,6 +1093,74 @@ static void ieee80211_if_setup(struct ne
- dev->destructor = free_netdev;
- }
-
-+static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
-+ struct sk_buff *skb)
-+{
-+ struct ieee80211_local *local = sdata->local;
-+ struct ieee80211_rx_status *rx_status;
-+ struct ieee802_11_elems elems;
-+ struct ieee80211_mgmt *mgmt;
-+ struct sta_info *sta;
-+ size_t baselen;
-+ u32 rates = 0;
-+ u16 stype;
-+ bool new = false;
-+ enum ieee80211_band band;
-+ struct ieee80211_supported_band *sband;
-+
-+ rx_status = IEEE80211_SKB_RXCB(skb);
-+ band = rx_status->band;
-+ sband = local->hw.wiphy->bands[band];
-+ mgmt = (struct ieee80211_mgmt *) skb->data;
-+ stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
-+
-+ if (stype != IEEE80211_STYPE_BEACON)
-+ return;
-+
-+ baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
-+ if (baselen > skb->len)
-+ return;
-+
-+ ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
-+ skb->len - baselen, false, &elems);
-+
-+ rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
-+
-+ rcu_read_lock();
-+
-+ sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
-+
-+ if (!sta) {
-+ rcu_read_unlock();
-+ sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
-+ GFP_KERNEL);
-+ if (!sta)
-+ return;
-+
-+ new = true;
-+ }
+- /* Sleep Setting */
+-
+- INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ if (ah->config.no_pll_pwrsave) {
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ } else {
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
++ }
+ } else if (AR_SREV_9462_21(ah)) {
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+ ar9462_2p1_mac_core);
+@@ -223,6 +229,10 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p1_modes_fast_clock);
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9462_2p1_baseband_core_txfir_coeff_japan_2484);
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9462_2p1_pciephy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9462_2p1_pciephy_clkreq_disable_L1);
+ } else if (AR_SREV_9462_20(ah)) {
+
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
+@@ -247,18 +257,18 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p0_soc_postamble);
+
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0);
++ ar9462_2p0_common_rx_gain);
+
+ /* Awake -> Sleep Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9462_pciephy_clkreq_disable_L1_2p0);
++ ar9462_2p0_pciephy_clkreq_disable_L1);
+ /* Sleep -> Awake Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9462_pciephy_clkreq_disable_L1_2p0);
++ ar9462_2p0_pciephy_clkreq_disable_L1);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9462_modes_fast_clock_2p0);
++ ar9462_2p0_modes_fast_clock);
+
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
+@@ -330,7 +340,46 @@ static void ar9003_hw_init_mode_regs(str
+ ar9580_1p0_low_ob_db_tx_gain_table);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9580_1p0_modes_fast_clock);
++ ar9580_1p0_modes_fast_clock);
++ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++ ar9580_1p0_baseband_core_txfir_coeff_japan_2484);
++ INIT_INI_ARRAY(&ah->ini_dfs,
++ ar9580_1p0_baseband_postamble_dfs_channel);
++ } else if (AR_SREV_9565_11_OR_LATER(ah)) {
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
++ ar9565_1p1_mac_core);
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
++ ar9565_1p1_mac_postamble);
+
-+ sta->last_rx = jiffies;
-+ sta->sta.supp_rates[band] = rates;
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
++ ar9565_1p1_baseband_core);
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
++ ar9565_1p1_baseband_postamble);
+
-+ if (elems.ht_cap_elem)
-+ ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
-+ elems.ht_cap_elem, sta);
++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
++ ar9565_1p1_radio_core);
++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
++ ar9565_1p1_radio_postamble);
+
-+ if (elems.wmm_param)
-+ set_sta_flag(sta, WLAN_STA_WME);
++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
++ ar9565_1p1_soc_preamble);
++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
++ ar9565_1p1_soc_postamble);
+
-+ if (new) {
-+ sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
-+ sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
-+ sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
-+ rate_control_rate_init(sta);
-+ sta_info_insert_rcu(sta);
-+ }
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_Common_rx_gain_table);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_Modes_lowest_ob_db_tx_gain_table);
+
-+ rcu_read_unlock();
-+}
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9565_1p1_pciephy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9565_1p1_pciephy_clkreq_disable_L1);
+
- static void ieee80211_iface_work(struct work_struct *work)
- {
- struct ieee80211_sub_if_data *sdata =
-@@ -1220,6 +1265,9 @@ static void ieee80211_iface_work(struct
- break;
- ieee80211_mesh_rx_queued_mgmt(sdata, skb);
- break;
-+ case NL80211_IFTYPE_WDS:
-+ ieee80211_wds_rx_queued_mgmt(sdata, skb);
-+ break;
- default:
- WARN(1, "frame for unexpected interface type");
- break;
---- a/net/mac80211/rc80211_minstrel_ht.c
-+++ b/net/mac80211/rc80211_minstrel_ht.c
-@@ -804,10 +804,18 @@ minstrel_ht_get_rate(void *priv, struct
++ INIT_INI_ARRAY(&ah->iniModesFastClock,
++ ar9565_1p1_modes_fast_clock);
++ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++ ar9565_1p1_baseband_core_txfir_coeff_japan_2484);
+ } else if (AR_SREV_9565(ah)) {
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+ ar9565_1p0_mac_core);
+@@ -411,7 +460,11 @@ static void ar9003_hw_init_mode_regs(str
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9300Modes_fast_clock_2p2);
++ ar9300Modes_fast_clock_2p2);
++ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++ ar9300_2p2_baseband_core_txfir_coeff_japan_2484);
++ INIT_INI_ARRAY(&ah->ini_dfs,
++ ar9300_2p2_baseband_postamble_dfs_channel);
+ }
+ }
- sample_group = &minstrel_mcs_groups[sample_idx / MCS_GROUP_RATES];
- info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
-+ rate->count = 1;
-+
-+ if (sample_idx / MCS_GROUP_RATES == MINSTREL_CCK_GROUP) {
-+ int idx = sample_idx % ARRAY_SIZE(mp->cck_rates);
-+ rate->idx = mp->cck_rates[idx];
-+ rate->flags = 0;
-+ return;
+@@ -440,7 +493,10 @@ static void ar9003_tx_gain_table_mode0(s
+ ar9462_2p1_modes_low_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_low_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_low_ob_db_tx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_low_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_low_ob_db_tx_gain_table);
+@@ -474,7 +530,10 @@ static void ar9003_tx_gain_table_mode1(s
+ ar9462_2p1_modes_high_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_high_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_high_ob_db_tx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_high_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_high_ob_db_tx_gain_table);
+@@ -500,6 +559,9 @@ static void ar9003_tx_gain_table_mode2(s
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9580_1p0_low_ob_db_tx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_low_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_low_ob_db_tx_gain_table);
+@@ -525,12 +587,20 @@ static void ar9003_tx_gain_table_mode3(s
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9580_1p0_high_power_tx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_high_power_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_high_power_tx_gain_table);
+- else
+- INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_high_power_tx_gain_table_2p2);
++ else {
++ if (ah->config.tx_gain_buffalo)
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9300Modes_high_power_tx_gain_table_buffalo);
++ else
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9300Modes_high_power_tx_gain_table_2p2);
+ }
-+
- rate->idx = sample_idx % MCS_GROUP_RATES +
- (sample_group->streams - 1) * MCS_GROUP_RATES;
- rate->flags = IEEE80211_TX_RC_MCS | sample_group->flags;
-- rate->count = 1;
}
- static void
---- a/net/mac80211/rx.c
-+++ b/net/mac80211/rx.c
-@@ -936,8 +936,14 @@ ieee80211_rx_h_check(struct ieee80211_rx
- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
- struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(rx->skb);
-
-- /* Drop duplicate 802.11 retransmissions (IEEE 802.11 Chap. 9.2.9) */
-- if (rx->sta && !is_multicast_ether_addr(hdr->addr1)) {
-+ /*
-+ * Drop duplicate 802.11 retransmissions
-+ * (IEEE 802.11-2012: 9.3.2.10 "Duplicate detection and recovery")
-+ */
-+ if (rx->skb->len >= 24 && rx->sta &&
-+ !ieee80211_is_ctl(hdr->frame_control) &&
-+ !ieee80211_is_qos_nullfunc(hdr->frame_control) &&
-+ !is_multicast_ether_addr(hdr->addr1)) {
- if (unlikely(ieee80211_has_retry(hdr->frame_control) &&
- rx->sta->last_seq_ctrl[rx->seqno_idx] ==
- hdr->seq_ctrl)) {
-@@ -2369,6 +2375,7 @@ ieee80211_rx_h_action(struct ieee80211_r
- sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
- sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
- sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS &&
- sdata->vif.type != NL80211_IFTYPE_ADHOC)
- break;
-
-@@ -2720,14 +2727,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
-
- if (!ieee80211_vif_is_mesh(&sdata->vif) &&
- sdata->vif.type != NL80211_IFTYPE_ADHOC &&
-- sdata->vif.type != NL80211_IFTYPE_STATION)
-+ sdata->vif.type != NL80211_IFTYPE_STATION &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
- return RX_DROP_MONITOR;
-
- switch (stype) {
- case cpu_to_le16(IEEE80211_STYPE_AUTH):
- case cpu_to_le16(IEEE80211_STYPE_BEACON):
- case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
-- /* process for all: mesh, mlme, ibss */
-+ /* process for all: mesh, mlme, ibss, wds */
- break;
- case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
- case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
-@@ -3059,10 +3067,16 @@ static int prepare_for_handlers(struct i
- }
- break;
- case NL80211_IFTYPE_WDS:
-- if (bssid || !ieee80211_is_data(hdr->frame_control))
-- return 0;
- if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
- return 0;
-+
-+ if (ieee80211_is_data(hdr->frame_control) ||
-+ ieee80211_is_action(hdr->frame_control)) {
-+ if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
-+ return 0;
-+ } else if (!ieee80211_is_beacon(hdr->frame_control))
-+ return 0;
-+
- break;
- case NL80211_IFTYPE_P2P_DEVICE:
- if (!ieee80211_is_public_action(hdr, skb->len) &&
---- a/net/mac80211/sta_info.h
-+++ b/net/mac80211/sta_info.h
-@@ -32,7 +32,6 @@
- * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
- * frames.
- * @WLAN_STA_WME: Station is a QoS-STA.
-- * @WLAN_STA_WDS: Station is one of our WDS peers.
- * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
- * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
- * frame to this station is transmitted.
-@@ -66,7 +65,6 @@ enum ieee80211_sta_info_flags {
- WLAN_STA_AUTHORIZED,
- WLAN_STA_SHORT_PREAMBLE,
- WLAN_STA_WME,
-- WLAN_STA_WDS,
- WLAN_STA_CLEAR_PS_FILT,
- WLAN_STA_MFP,
- WLAN_STA_BLOCK_BA,
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -135,6 +135,9 @@ static struct ath_frame_info *get_frame_
-
- static void ath_send_bar(struct ath_atx_tid *tid, u16 seqno)
- {
-+ if (!tid->an->sta)
-+ return;
-+
- ieee80211_send_bar(tid->an->vif, tid->an->sta->addr, tid->tidno,
- seqno << IEEE80211_SEQ_SEQ_SHIFT);
- }
-@@ -146,6 +149,93 @@ static void ath_set_rates(struct ieee802
- ARRAY_SIZE(bf->rates));
+ static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
+@@ -546,7 +616,7 @@ static void ar9003_tx_gain_table_mode4(s
+ ar9462_2p1_modes_mix_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_mix_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_mix_ob_db_tx_gain);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
+@@ -581,6 +651,13 @@ static void ar9003_tx_gain_table_mode6(s
+ ar9580_1p0_type6_tx_gain_table);
}
-+static void ath_txq_skb_done(struct ath_softc *sc, struct ath_txq *txq,
-+ struct sk_buff *skb)
-+{
-+ int q;
-+
-+ q = skb_get_queue_mapping(skb);
-+ if (txq == sc->tx.uapsdq)
-+ txq = sc->tx.txq_map[q];
-+
-+ if (txq != sc->tx.txq_map[q])
-+ return;
-+
-+ if (WARN_ON(--txq->pending_frames < 0))
-+ txq->pending_frames = 0;
-+
-+ if (txq->stopped &&
-+ txq->pending_frames < sc->tx.txq_max_pending[q]) {
-+ ieee80211_wake_queue(sc->hw, q);
-+ txq->stopped = false;
-+ }
-+}
-+
-+static struct ath_atx_tid *
-+ath_get_skb_tid(struct ath_softc *sc, struct ath_node *an, struct sk_buff *skb)
-+{
-+ struct ieee80211_hdr *hdr;
-+ u8 tidno = 0;
-+
-+ hdr = (struct ieee80211_hdr *) skb->data;
-+ if (ieee80211_is_data_qos(hdr->frame_control))
-+ tidno = ieee80211_get_qos_ctl(hdr)[0];
-+
-+ tidno &= IEEE80211_QOS_CTL_TID_MASK;
-+ return ATH_AN_2_TID(an, tidno);
-+}
-+
-+static bool ath_tid_has_buffered(struct ath_atx_tid *tid)
++static void ar9003_tx_gain_table_mode7(struct ath_hw *ah)
+{
-+ return !skb_queue_empty(&tid->buf_q) || !skb_queue_empty(&tid->retry_q);
++ if (AR_SREV_9340(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340_cus227_tx_gain_table_1p0);
+}
+
-+static struct sk_buff *ath_tid_dequeue(struct ath_atx_tid *tid)
-+{
-+ struct sk_buff *skb;
+ typedef void (*ath_txgain_tab)(struct ath_hw *ah);
+
+ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
+@@ -593,6 +670,7 @@ static void ar9003_tx_gain_table_apply(s
+ ar9003_tx_gain_table_mode4,
+ ar9003_tx_gain_table_mode5,
+ ar9003_tx_gain_table_mode6,
++ ar9003_tx_gain_table_mode7,
+ };
+ int idx = ar9003_hw_get_tx_gain_idx(ah);
+
+@@ -629,7 +707,10 @@ static void ar9003_rx_gain_table_mode0(s
+ ar9462_2p1_common_rx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0);
++ ar9462_2p0_common_rx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_Common_rx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9565_1p0_Common_rx_gain_table);
+@@ -657,7 +738,7 @@ static void ar9003_rx_gain_table_mode1(s
+ ar9462_2p1_common_wo_xlna_rx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_wo_xlna_rx_gain_table_2p0);
++ ar9462_2p0_common_wo_xlna_rx_gain);
+ else if (AR_SREV_9550(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar955x_1p0_common_wo_xlna_rx_gain_table);
+@@ -666,6 +747,9 @@ static void ar9003_rx_gain_table_mode1(s
+ } else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9580_1p0_wo_xlna_rx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_common_wo_xlna_rx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9565_1p0_common_wo_xlna_rx_gain_table);
+@@ -687,7 +771,7 @@ static void ar9003_rx_gain_table_mode2(s
+ ar9462_2p1_baseband_postamble_5g_xlna);
+ } else if (AR_SREV_9462_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_mixed_rx_gain_table_2p0);
++ ar9462_2p0_common_mixed_rx_gain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_core,
+ ar9462_2p0_baseband_core_mix_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_postamble,
+@@ -701,12 +785,12 @@ static void ar9003_rx_gain_table_mode3(s
+ {
+ if (AR_SREV_9462_21(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_2p1_common_5g_xlna_only_rx_gain);
++ ar9462_2p1_common_5g_xlna_only_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
+ ar9462_2p1_baseband_postamble_5g_xlna);
+ } else if (AR_SREV_9462_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_2p0_5g_xlna_only_rxgain);
++ ar9462_2p0_common_5g_xlna_only_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
+ ar9462_2p0_baseband_postamble_5g_xlna);
+ }
+@@ -750,6 +834,9 @@ static void ar9003_hw_init_mode_gain_reg
+ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
+ bool power_off)
+ {
++ unsigned int i;
++ struct ar5416IniArray *array;
+
-+ skb = __skb_dequeue(&tid->retry_q);
-+ if (!skb)
-+ skb = __skb_dequeue(&tid->buf_q);
+ /*
+ * Increase L1 Entry Latency. Some WB222 boards don't have
+ * this change in eeprom/OTP.
+@@ -775,18 +862,13 @@ static void ar9003_hw_configpcipowersave
+ * Configire PCIE after Ini init. SERDES values now come from ini file
+ * This enables PCIe low power mode.
+ */
+- if (ah->config.pcieSerDesWrite) {
+- unsigned int i;
+- struct ar5416IniArray *array;
+-
+- array = power_off ? &ah->iniPcieSerdes :
+- &ah->iniPcieSerdesLowPower;
+-
+- for (i = 0; i < array->ia_rows; i++) {
+- REG_WRITE(ah,
+- INI_RA(array, i, 0),
+- INI_RA(array, i, 1));
+- }
++ array = power_off ? &ah->iniPcieSerdes :
++ &ah->iniPcieSerdesLowPower;
+
-+ return skb;
-+}
++ for (i = 0; i < array->ia_rows; i++) {
++ REG_WRITE(ah,
++ INI_RA(array, i, 0),
++ INI_RA(array, i, 1));
+ }
+ }
+
+--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
+@@ -18,6 +18,20 @@
+ #ifndef INITVALS_9340_H
+ #define INITVALS_9340_H
+
++#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
+
-+/*
-+ * ath_tx_tid_change_state:
-+ * - clears a-mpdu flag of previous session
-+ * - force sequence number allocation to fix next BlockAck Window
-+ */
-+static void
-+ath_tx_tid_change_state(struct ath_softc *sc, struct ath_atx_tid *tid)
-+{
-+ struct ath_txq *txq = tid->ac->txq;
-+ struct ieee80211_tx_info *tx_info;
-+ struct sk_buff *skb, *tskb;
-+ struct ath_buf *bf;
-+ struct ath_frame_info *fi;
++#define ar9340_1p0_soc_postamble ar9300_2p2_soc_postamble
+
-+ skb_queue_walk_safe(&tid->buf_q, skb, tskb) {
-+ fi = get_frame_info(skb);
-+ bf = fi->bf;
++#define ar9340Modes_fast_clock_1p0 ar9300Modes_fast_clock_2p2
+
-+ tx_info = IEEE80211_SKB_CB(skb);
-+ tx_info->flags &= ~IEEE80211_TX_CTL_AMPDU;
++#define ar9340Common_rx_gain_table_1p0 ar9300Common_rx_gain_table_2p2
+
-+ if (bf)
-+ continue;
++#define ar9340Common_wo_xlna_rx_gain_table_1p0 ar9300Common_wo_xlna_rx_gain_table_2p2
+
-+ bf = ath_tx_setup_buffer(sc, txq, tid, skb);
-+ if (!bf) {
-+ __skb_unlink(skb, &tid->buf_q);
-+ ath_txq_skb_done(sc, txq, skb);
-+ ieee80211_free_txskb(sc->hw, skb);
-+ continue;
-+ }
-+ }
++#define ar9340_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
+
-+}
++#define ar9340_1p0_baseband_postamble_dfs_channel ar9300_2p2_baseband_postamble_dfs_channel
+
- static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
- {
- struct ath_txq *txq = tid->ac->txq;
-@@ -160,27 +250,22 @@ static void ath_tx_flush_tid(struct ath_
-
- memset(&ts, 0, sizeof(ts));
+ static const u32 ar9340_1p0_radio_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000160ac, 0xa4646800, 0xa4646800, 0xa4646800, 0xa4646800},
+@@ -100,8 +114,6 @@ static const u32 ar9340Modes_lowest_ob_d
+ {0x00016448, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
+ };
-- while ((skb = __skb_dequeue(&tid->buf_q))) {
-+ while ((skb = __skb_dequeue(&tid->retry_q))) {
- fi = get_frame_info(skb);
- bf = fi->bf;
+-#define ar9340Modes_fast_clock_1p0 ar9300Modes_fast_clock_2p2
-
- if (!bf) {
-- bf = ath_tx_setup_buffer(sc, txq, tid, skb);
-- if (!bf) {
-- ieee80211_free_txskb(sc->hw, skb);
-- continue;
-- }
-+ ath_txq_skb_done(sc, txq, skb);
-+ ieee80211_free_txskb(sc->hw, skb);
-+ continue;
- }
-
-- if (fi->retries) {
-- list_add_tail(&bf->list, &bf_head);
-+ if (fi->baw_tracked) {
- ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
-- ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
- sendbar = true;
-- } else {
-- ath_set_rates(tid->an->vif, tid->an->sta, bf);
-- ath_tx_send_normal(sc, txq, NULL, skb);
- }
-+
-+ list_add_tail(&bf->list, &bf_head);
-+ ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
- }
-
- if (sendbar) {
-@@ -209,13 +294,16 @@ static void ath_tx_update_baw(struct ath
- }
-
- static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
-- u16 seqno)
-+ struct ath_buf *bf)
- {
-+ struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu);
-+ u16 seqno = bf->bf_state.seqno;
- int index, cindex;
-
- index = ATH_BA_INDEX(tid->seq_start, seqno);
- cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
- __set_bit(cindex, tid->tx_buf);
-+ fi->baw_tracked = 1;
-
- if (index >= ((tid->baw_tail - tid->baw_head) &
- (ATH_TID_MAX_BUFS - 1))) {
-@@ -243,7 +331,7 @@ static void ath_tid_drain(struct ath_sof
- memset(&ts, 0, sizeof(ts));
- INIT_LIST_HEAD(&bf_head);
-
-- while ((skb = __skb_dequeue(&tid->buf_q))) {
-+ while ((skb = ath_tid_dequeue(tid))) {
- fi = get_frame_info(skb);
- bf = fi->bf;
+ static const u32 ar9340_1p0_radio_core[][2] = {
+ /* Addr allmodes */
+ {0x00016000, 0x36db6db6},
+@@ -215,16 +227,12 @@ static const u32 ar9340_1p0_radio_core_4
+ {0x0000824c, 0x0001e800},
+ };
-@@ -380,7 +468,6 @@ static void ath_tx_complete_aggr(struct
- struct ieee80211_tx_rate rates[4];
- struct ath_frame_info *fi;
- int nframes;
-- u8 tidno;
- bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
- int i, retries;
- int bar_index = -1;
-@@ -417,8 +504,7 @@ static void ath_tx_complete_aggr(struct
- }
+-#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
+-
+-#define ar9340_1p0_soc_postamble ar9300_2p2_soc_postamble
+-
+ static const u32 ar9340_1p0_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
+ {0x00009820, 0x206a022e, 0x206a022e, 0x206a022e, 0x206a022e},
+ {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+- {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
++ {0x00009828, 0x06903081, 0x06903081, 0x09103881, 0x09103881},
+ {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
+ {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
+ {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
+@@ -340,9 +348,9 @@ static const u32 ar9340_1p0_baseband_cor
+ {0x0000a370, 0x00000000},
+ {0x0000a390, 0x00000001},
+ {0x0000a394, 0x00000444},
+- {0x0000a398, 0x001f0e0f},
+- {0x0000a39c, 0x0075393f},
+- {0x0000a3a0, 0xb79f6427},
++ {0x0000a398, 0x00000000},
++ {0x0000a39c, 0x210d0401},
++ {0x0000a3a0, 0xab9a7144},
+ {0x0000a3a4, 0x00000000},
+ {0x0000a3a8, 0xaaaaaaaa},
+ {0x0000a3ac, 0x3c466478},
+@@ -714,266 +722,6 @@ static const u32 ar9340Modes_ub124_tx_ga
+ {0x0000b2e8, 0xfffe0000, 0xfffe0000, 0xfffc0000, 0xfffc0000},
+ };
- an = (struct ath_node *)sta->drv_priv;
-- tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK;
-- tid = ATH_AN_2_TID(an, tidno);
-+ tid = ath_get_skb_tid(sc, an, skb);
- seq_first = tid->seq_start;
- isba = ts->ts_flags & ATH9K_TX_BA;
+-static const u32 ar9340Common_rx_gain_table_1p0[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x01910190},
+- {0x0000a030, 0x01930192},
+- {0x0000a034, 0x01950194},
+- {0x0000a038, 0x038a0196},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x22222229},
+- {0x0000a084, 0x1d1d1d1d},
+- {0x0000a088, 0x1d1d1d1d},
+- {0x0000a08c, 0x1d1d1d1d},
+- {0x0000a090, 0x171d1d1d},
+- {0x0000a094, 0x11111717},
+- {0x0000a098, 0x00030311},
+- {0x0000a09c, 0x00000000},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x23232323},
+- {0x0000b084, 0x21232323},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+ static const u32 ar9340Modes_low_ob_db_tx_gain_table_1p0[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+@@ -1437,8 +1185,6 @@ static const u32 ar9340_1p0_mac_core[][2
+ {0x000083d0, 0x000101ff},
+ };
-@@ -430,7 +516,7 @@ static void ath_tx_complete_aggr(struct
- * Only BlockAcks have a TID and therefore normal Acks cannot be
- * checked
- */
-- if (isba && tidno != ts->tid)
-+ if (isba && tid->tidno != ts->tid)
- txok = false;
-
- isaggr = bf_isaggr(bf);
-@@ -466,7 +552,8 @@ static void ath_tx_complete_aggr(struct
- tx_info = IEEE80211_SKB_CB(skb);
- fi = get_frame_info(skb);
-
-- if (!BAW_WITHIN(tid->seq_start, tid->baw_size, seqno)) {
-+ if (!BAW_WITHIN(tid->seq_start, tid->baw_size, seqno) ||
-+ !tid->active) {
- /*
- * Outside of the current BlockAck window,
- * maybe part of a previous session
-@@ -560,7 +647,7 @@ static void ath_tx_complete_aggr(struct
- if (an->sleeping)
- ieee80211_sta_set_buffered(sta, tid->tidno, true);
-
-- skb_queue_splice(&bf_pending, &tid->buf_q);
-+ skb_queue_splice_tail(&bf_pending, &tid->retry_q);
- if (!an->sleeping) {
- ath_tx_queue_tid(txq, tid);
-
-@@ -618,7 +705,7 @@ static void ath_tx_process_buffer(struct
- } else
- ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
-
-- if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
-+ if (!flush)
- ath_txq_schedule(sc, txq);
- }
-
-@@ -792,15 +879,20 @@ static int ath_compute_num_delims(struct
-
- static struct ath_buf *
- ath_tx_get_tid_subframe(struct ath_softc *sc, struct ath_txq *txq,
-- struct ath_atx_tid *tid)
-+ struct ath_atx_tid *tid, struct sk_buff_head **q)
- {
-+ struct ieee80211_tx_info *tx_info;
- struct ath_frame_info *fi;
- struct sk_buff *skb;
- struct ath_buf *bf;
- u16 seqno;
+-#define ar9340Common_wo_xlna_rx_gain_table_1p0 ar9300Common_wo_xlna_rx_gain_table_2p2
+-
+ static const u32 ar9340_1p0_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x00007008, 0x00000000},
+@@ -1447,4 +1193,106 @@ static const u32 ar9340_1p0_soc_preamble
+ {0x00007038, 0x000004c2},
+ };
- while (1) {
-- skb = skb_peek(&tid->buf_q);
-+ *q = &tid->retry_q;
-+ if (skb_queue_empty(*q))
-+ *q = &tid->buf_q;
++static const u32 ar9340_cus227_tx_gain_table_1p0[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
++ {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
++ {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2c022220, 0x2c022220, 0x1b000603, 0x1b000603},
++ {0x0000a524, 0x30022222, 0x30022222, 0x1f000a02, 0x1f000a02},
++ {0x0000a528, 0x35022225, 0x35022225, 0x23000a04, 0x23000a04},
++ {0x0000a52c, 0x3b02222a, 0x3b02222a, 0x26000a20, 0x26000a20},
++ {0x0000a530, 0x3f02222c, 0x3f02222c, 0x2a000e20, 0x2a000e20},
++ {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
++ {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
++ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
++ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
++ {0x0000a544, 0x5302266c, 0x5302266c, 0x3b001861, 0x3b001861},
++ {0x0000a548, 0x5702286c, 0x5702286c, 0x3e001a81, 0x3e001a81},
++ {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42001a83, 0x42001a83},
++ {0x0000a550, 0x61024a6c, 0x61024a6c, 0x44001c84, 0x44001c84},
++ {0x0000a554, 0x66026a6c, 0x66026a6c, 0x48001ce3, 0x48001ce3},
++ {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c001ce5, 0x4c001ce5},
++ {0x0000a55c, 0x7002708c, 0x7002708c, 0x50001ce9, 0x50001ce9},
++ {0x0000a560, 0x7302b08a, 0x7302b08a, 0x54001ceb, 0x54001ceb},
++ {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
++ {0x0000a598, 0x21820220, 0x21820220, 0x15800402, 0x15800402},
++ {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
++ {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
++ {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
++ {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
++ {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
++ {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
++ {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
++ {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
++ {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
++ {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b801861, 0x3b801861},
++ {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e801a81, 0x3e801a81},
++ {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42801a83, 0x42801a83},
++ {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x44801c84, 0x44801c84},
++ {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x48801ce3, 0x48801ce3},
++ {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c801ce5, 0x4c801ce5},
++ {0x0000a5dc, 0x7086308c, 0x7086308c, 0x50801ce9, 0x50801ce9},
++ {0x0000a5e0, 0x738a308a, 0x738a308a, 0x54801ceb, 0x54801ceb},
++ {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
++ {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
++ {0x00016048, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
++ {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
++ {0x00016288, 0x30318000, 0x30318000, 0x00318000, 0x00318000},
++ {0x00016444, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
++ {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
++ {0x0000a3a4, 0x00000011, 0x00000011, 0x00000011, 0x00000011},
++ {0x0000a3a8, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c},
++ {0x0000a3ac, 0x30303030, 0x30303030, 0x30303030, 0x30303030},
++};
+
-+ skb = skb_peek(*q);
- if (!skb)
- break;
-
-@@ -810,11 +902,22 @@ ath_tx_get_tid_subframe(struct ath_softc
- bf = ath_tx_setup_buffer(sc, txq, tid, skb);
+ #endif /* INITVALS_9340_H */
+--- a/drivers/net/wireless/ath/ath9k/ath9k.h
++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+@@ -27,40 +27,15 @@
+ #include "common.h"
+ #include "mci.h"
+ #include "dfs.h"
+-
+-/*
+- * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
+- * should rely on this file or its contents.
+- */
++#include "spectral.h"
- if (!bf) {
-- __skb_unlink(skb, &tid->buf_q);
-+ __skb_unlink(skb, *q);
-+ ath_txq_skb_done(sc, txq, skb);
- ieee80211_free_txskb(sc->hw, skb);
- continue;
- }
+ struct ath_node;
++struct ath_rate_table;
-+ bf->bf_next = NULL;
-+ bf->bf_lastbf = bf;
+-/* Macro to expand scalars to 64-bit objects */
+-
+-#define ito64(x) (sizeof(x) == 1) ? \
+- (((unsigned long long int)(x)) & (0xff)) : \
+- (sizeof(x) == 2) ? \
+- (((unsigned long long int)(x)) & 0xffff) : \
+- ((sizeof(x) == 4) ? \
+- (((unsigned long long int)(x)) & 0xffffffff) : \
+- (unsigned long long int)(x))
+-
+-/* increment with wrap-around */
+-#define INCR(_l, _sz) do { \
+- (_l)++; \
+- (_l) &= ((_sz) - 1); \
+- } while (0)
+-
+-/* decrement with wrap-around */
+-#define DECR(_l, _sz) do { \
+- (_l)--; \
+- (_l) &= ((_sz) - 1); \
+- } while (0)
+-
+-#define TSF_TO_TU(_h,_l) \
+- ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
+-
+-#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
++extern struct ieee80211_ops ath9k_ops;
++extern int ath9k_modparam_nohwcrypt;
++extern int led_blink;
++extern bool is_ath9k_unloaded;
+
+ struct ath_config {
+ u16 txpowlimit;
+@@ -70,6 +45,17 @@ struct ath_config {
+ /* Descriptor Management */
+ /*************************/
+
++#define ATH_TXSTATUS_RING_SIZE 512
+
-+ tx_info = IEEE80211_SKB_CB(skb);
-+ tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
-+ if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) {
-+ bf->bf_state.bf_type = 0;
-+ return bf;
-+ }
++/* Macro to expand scalars to 64-bit objects */
++#define ito64(x) (sizeof(x) == 1) ? \
++ (((unsigned long long int)(x)) & (0xff)) : \
++ (sizeof(x) == 2) ? \
++ (((unsigned long long int)(x)) & 0xffff) : \
++ ((sizeof(x) == 4) ? \
++ (((unsigned long long int)(x)) & 0xffffffff) : \
++ (unsigned long long int)(x))
+
- bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR;
- seqno = bf->bf_state.seqno;
-
-@@ -828,73 +931,52 @@ ath_tx_get_tid_subframe(struct ath_softc
-
- INIT_LIST_HEAD(&bf_head);
- list_add(&bf->list, &bf_head);
-- __skb_unlink(skb, &tid->buf_q);
-+ __skb_unlink(skb, *q);
- ath_tx_update_baw(sc, tid, seqno);
- ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
- continue;
- }
-
-- bf->bf_next = NULL;
-- bf->bf_lastbf = bf;
- return bf;
- }
-
- return NULL;
- }
-
--static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
-- struct ath_txq *txq,
-- struct ath_atx_tid *tid,
-- struct list_head *bf_q,
-- int *aggr_len)
-+static bool
-+ath_tx_form_aggr(struct ath_softc *sc, struct ath_txq *txq,
-+ struct ath_atx_tid *tid, struct list_head *bf_q,
-+ struct ath_buf *bf_first, struct sk_buff_head *tid_q,
-+ int *aggr_len)
- {
- #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
-- struct ath_buf *bf, *bf_first = NULL, *bf_prev = NULL;
-- int rl = 0, nframes = 0, ndelim, prev_al = 0;
-+ struct ath_buf *bf = bf_first, *bf_prev = NULL;
-+ int nframes = 0, ndelim;
- u16 aggr_limit = 0, al = 0, bpad = 0,
-- al_delta, h_baw = tid->baw_size / 2;
-- enum ATH_AGGR_STATUS status = ATH_AGGR_DONE;
-+ al_delta, h_baw = tid->baw_size / 2;
- struct ieee80211_tx_info *tx_info;
- struct ath_frame_info *fi;
- struct sk_buff *skb;
-+ bool closed = false;
-
-- do {
-- bf = ath_tx_get_tid_subframe(sc, txq, tid);
-- if (!bf) {
-- status = ATH_AGGR_BAW_CLOSED;
-- break;
-- }
-+ bf = bf_first;
-+ aggr_limit = ath_lookup_rate(sc, bf, tid);
-
-+ do {
- skb = bf->bf_mpdu;
- fi = get_frame_info(skb);
+ #define ATH_TXBUF_RESET(_bf) do { \
+ (_bf)->bf_lastbf = NULL; \
+ (_bf)->bf_next = NULL; \
+@@ -77,23 +63,6 @@ struct ath_config {
+ sizeof(struct ath_buf_state)); \
+ } while (0)
-- if (!bf_first)
-- bf_first = bf;
+-/**
+- * enum buffer_type - Buffer type flags
+- *
+- * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
+- * @BUF_AGGR: Indicates whether the buffer can be aggregated
+- * (used in aggregation scheduling)
+- */
+-enum buffer_type {
+- BUF_AMPDU = BIT(0),
+- BUF_AGGR = BIT(1),
+-};
-
-- if (!rl) {
-- ath_set_rates(tid->an->vif, tid->an->sta, bf);
-- aggr_limit = ath_lookup_rate(sc, bf, tid);
-- rl = 1;
-- }
+-#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
+-#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
-
- /* do not exceed aggregation limit */
- al_delta = ATH_AGGR_DELIM_SZ + fi->framelen;
-+ if (nframes) {
-+ if (aggr_limit < al + bpad + al_delta ||
-+ ath_lookup_legacy(bf) || nframes >= h_baw)
-+ break;
-
-- if (nframes &&
-- ((aggr_limit < (al + bpad + al_delta + prev_al)) ||
-- ath_lookup_legacy(bf))) {
-- status = ATH_AGGR_LIMITED;
-- break;
-- }
+-#define ATH_TXSTATUS_RING_SIZE 512
-
-- tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-- if (nframes && (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
-- break;
--
-- /* do not exceed subframe limit */
-- if (nframes >= min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) {
-- status = ATH_AGGR_LIMITED;
-- break;
-+ tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-+ if ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) ||
-+ !(tx_info->flags & IEEE80211_TX_CTL_AMPDU))
-+ break;
- }
-
- /* add padding for previous frame to aggregation length */
-@@ -912,22 +994,37 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- bf->bf_next = NULL;
-
- /* link buffers of this frame to the aggregate */
-- if (!fi->retries)
-- ath_tx_addto_baw(sc, tid, bf->bf_state.seqno);
-+ if (!fi->baw_tracked)
-+ ath_tx_addto_baw(sc, tid, bf);
- bf->bf_state.ndelim = ndelim;
-
-- __skb_unlink(skb, &tid->buf_q);
-+ __skb_unlink(skb, tid_q);
- list_add_tail(&bf->list, bf_q);
- if (bf_prev)
- bf_prev->bf_next = bf;
-
- bf_prev = bf;
-
-- } while (!skb_queue_empty(&tid->buf_q));
-+ bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q);
-+ if (!bf) {
-+ closed = true;
-+ break;
-+ }
-+ } while (ath_tid_has_buffered(tid));
+ #define DS2PHYS(_dd, _ds) \
+ ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
+ #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
+@@ -113,11 +82,20 @@ int ath_descdma_setup(struct ath_softc *
+ /* RX / TX */
+ /***********/
+
++#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
+
-+ bf = bf_first;
-+ bf->bf_lastbf = bf_prev;
++/* increment with wrap-around */
++#define INCR(_l, _sz) do { \
++ (_l)++; \
++ (_l) &= ((_sz) - 1); \
++ } while (0)
+
-+ if (bf == bf_prev) {
-+ al = get_frame_info(bf->bf_mpdu)->framelen;
-+ bf->bf_state.bf_type = BUF_AMPDU;
-+ } else {
-+ TX_STAT_INC(txq->axq_qnum, a_aggr);
-+ }
-
- *aggr_len = al;
+ #define ATH_RXBUF 512
+ #define ATH_TXBUF 512
+ #define ATH_TXBUF_RESERVE 5
+ #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
+ #define ATH_TXMAXTRY 13
++#define ATH_MAX_SW_RETRIES 30
+
+ #define TID_TO_WME_AC(_tid) \
+ ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
+@@ -133,6 +111,9 @@ int ath_descdma_setup(struct ath_softc *
+ #define ATH_AGGR_MIN_QDEPTH 2
+ /* minimum h/w qdepth for non-aggregated traffic */
+ #define ATH_NON_AGGR_MIN_QDEPTH 8
++#define ATH_TX_COMPLETE_POLL_INT 1000
++#define ATH_TXFIFO_DEPTH 8
++#define ATH_TX_ERROR 0x01
-- return status;
-+ return closed;
- #undef PADBYTES
- }
+ #define IEEE80211_SEQ_SEQ_SHIFT 4
+ #define IEEE80211_SEQ_MAX 4096
+@@ -167,9 +148,6 @@ int ath_descdma_setup(struct ath_softc *
-@@ -1188,53 +1285,86 @@ static void ath_tx_fill_desc(struct ath_
- }
- }
+ #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
--static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
-- struct ath_atx_tid *tid)
-+static void
-+ath_tx_form_burst(struct ath_softc *sc, struct ath_txq *txq,
-+ struct ath_atx_tid *tid, struct list_head *bf_q,
-+ struct ath_buf *bf_first, struct sk_buff_head *tid_q)
- {
-- struct ath_buf *bf;
-- enum ATH_AGGR_STATUS status;
-- struct ieee80211_tx_info *tx_info;
-- struct list_head bf_q;
-- int aggr_len;
-+ struct ath_buf *bf = bf_first, *bf_prev = NULL;
-+ struct sk_buff *skb;
-+ int nframes = 0;
+-#define ATH_TX_COMPLETE_POLL_INT 1000
+-
+-#define ATH_TXFIFO_DEPTH 8
+ struct ath_txq {
+ int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
+ u32 axq_qnum; /* ath9k hardware queue number */
+@@ -214,6 +192,21 @@ struct ath_rxbuf {
+ dma_addr_t bf_buf_addr;
+ };
- do {
-- if (skb_queue_empty(&tid->buf_q))
-- return;
-+ struct ieee80211_tx_info *tx_info;
-+ skb = bf->bf_mpdu;
-
-- INIT_LIST_HEAD(&bf_q);
-+ nframes++;
-+ __skb_unlink(skb, tid_q);
-+ list_add_tail(&bf->list, bf_q);
-+ if (bf_prev)
-+ bf_prev->bf_next = bf;
-+ bf_prev = bf;
-
-- status = ath_tx_form_aggr(sc, txq, tid, &bf_q, &aggr_len);
-+ if (nframes >= 2)
-+ break;
++/**
++ * enum buffer_type - Buffer type flags
++ *
++ * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
++ * @BUF_AGGR: Indicates whether the buffer can be aggregated
++ * (used in aggregation scheduling)
++ */
++enum buffer_type {
++ BUF_AMPDU = BIT(0),
++ BUF_AGGR = BIT(1),
++};
++
++#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
++#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
++
+ struct ath_buf_state {
+ u8 bf_type;
+ u8 bfs_paprd;
+@@ -278,7 +271,6 @@ struct ath_tx_control {
+ struct ieee80211_sta *sta;
+ };
-- /*
-- * no frames picked up to be aggregated;
-- * block-ack window is not open.
-- */
-- if (list_empty(&bf_q))
-+ bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q);
-+ if (!bf)
- break;
-
-- bf = list_first_entry(&bf_q, struct ath_buf, list);
-- bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
- tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-+ if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
-+ break;
+-#define ATH_TX_ERROR 0x01
-- if (tid->ac->clear_ps_filter) {
-- tid->ac->clear_ps_filter = false;
-- tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT;
-- } else {
-- tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
-- }
-+ ath_set_rates(tid->an->vif, tid->an->sta, bf);
-+ } while (1);
-+}
+ /**
+ * @txq_map: Index is mac80211 queue number. This is
+@@ -372,6 +364,22 @@ struct ath_vif {
+ struct ath_buf *av_bcbuf;
+ };
-- /* if only one frame, send as non-aggregate */
-- if (bf == bf->bf_lastbf) {
-- aggr_len = get_frame_info(bf->bf_mpdu)->framelen;
-- bf->bf_state.bf_type = BUF_AMPDU;
-- } else {
-- TX_STAT_INC(txq->axq_qnum, a_aggr);
-- }
-+static bool ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
-+ struct ath_atx_tid *tid, bool *stop)
-+{
-+ struct ath_buf *bf;
-+ struct ieee80211_tx_info *tx_info;
-+ struct sk_buff_head *tid_q;
-+ struct list_head bf_q;
-+ int aggr_len = 0;
-+ bool aggr, last = true;
-+
-+ if (!ath_tid_has_buffered(tid))
-+ return false;
++struct ath9k_vif_iter_data {
++ u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
++ u8 mask[ETH_ALEN]; /* bssid mask */
++ bool has_hw_macaddr;
+
-+ INIT_LIST_HEAD(&bf_q);
-+
-+ bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q);
-+ if (!bf)
-+ return false;
-+
-+ tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-+ aggr = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
-+ if ((aggr && txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) ||
-+ (!aggr && txq->axq_depth >= ATH_NON_AGGR_MIN_QDEPTH)) {
-+ *stop = true;
-+ return false;
-+ }
++ int naps; /* number of AP vifs */
++ int nmeshes; /* number of mesh vifs */
++ int nstations; /* number of station vifs */
++ int nwds; /* number of WDS vifs */
++ int nadhocs; /* number of adhoc vifs */
++};
+
-+ ath_set_rates(tid->an->vif, tid->an->sta, bf);
-+ if (aggr)
-+ last = ath_tx_form_aggr(sc, txq, tid, &bf_q, bf,
-+ tid_q, &aggr_len);
-+ else
-+ ath_tx_form_burst(sc, txq, tid, &bf_q, bf, tid_q);
++void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
++ struct ieee80211_vif *vif,
++ struct ath9k_vif_iter_data *iter_data);
+
-+ if (list_empty(&bf_q))
-+ return false;
+ /*******************/
+ /* Beacon Handling */
+ /*******************/
+@@ -387,6 +395,9 @@ struct ath_vif {
+ #define ATH_DEFAULT_BMISS_LIMIT 10
+ #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
+
++#define TSF_TO_TU(_h,_l) \
++ ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
+
-+ if (tid->ac->clear_ps_filter || tid->an->no_ps_filter) {
-+ tid->ac->clear_ps_filter = false;
-+ tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT;
-+ }
-
-- ath_tx_fill_desc(sc, bf, txq, aggr_len);
-- ath_tx_txqaddbuf(sc, txq, &bf_q, false);
-- } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
-- status != ATH_AGGR_BAW_CLOSED);
-+ ath_tx_fill_desc(sc, bf, txq, aggr_len);
-+ ath_tx_txqaddbuf(sc, txq, &bf_q, false);
-+ return true;
- }
-
- int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
-@@ -1258,6 +1388,9 @@ int ath_tx_aggr_start(struct ath_softc *
- an->mpdudensity = density;
- }
+ struct ath_beacon_config {
+ int beacon_interval;
+ u16 listen_interval;
+@@ -420,12 +431,10 @@ struct ath_beacon {
+ };
-+ /* force sequence number allocation for pending frames */
-+ ath_tx_tid_change_state(sc, txtid);
-+
- txtid->active = true;
- txtid->paused = true;
- *ssn = txtid->seq_start = txtid->seq_next;
-@@ -1277,8 +1410,9 @@ void ath_tx_aggr_stop(struct ath_softc *
+ void ath9k_beacon_tasklet(unsigned long data);
+-bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
+ void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
+ u32 changed);
+ void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
+ void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
+-void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif);
+ void ath9k_set_beacon(struct ath_softc *sc);
+ bool ath9k_csa_is_finished(struct ath_softc *sc);
+
+@@ -440,10 +449,9 @@ bool ath9k_csa_is_finished(struct ath_so
+ #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
+ #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
+ #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
+-#define ATH_ANI_MAX_SKIP_COUNT 10
+-
+-#define ATH_PAPRD_TIMEOUT 100 /* msecs */
+-#define ATH_PLL_WORK_INTERVAL 100
++#define ATH_ANI_MAX_SKIP_COUNT 10
++#define ATH_PAPRD_TIMEOUT 100 /* msecs */
++#define ATH_PLL_WORK_INTERVAL 100
+
+ void ath_tx_complete_poll_work(struct work_struct *work);
+ void ath_reset_work(struct work_struct *work);
+@@ -459,6 +467,7 @@ void ath_check_ani(struct ath_softc *sc)
+ int ath_update_survey_stats(struct ath_softc *sc);
+ void ath_update_survey_nf(struct ath_softc *sc, int channel);
+ void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
++void ath_ps_full_sleep(unsigned long data);
+
+ /**********/
+ /* BTCOEX */
+@@ -476,20 +485,19 @@ enum bt_op_flags {
+ };
- ath_txq_lock(sc, txq);
- txtid->active = false;
-- txtid->paused = true;
-+ txtid->paused = false;
- ath_tx_flush_tid(sc, txtid);
-+ ath_tx_tid_change_state(sc, txtid);
- ath_txq_unlock_complete(sc, txq);
+ struct ath_btcoex {
+- bool hw_timer_enabled;
+ spinlock_t btcoex_lock;
+ struct timer_list period_timer; /* Timer for BT period */
++ struct timer_list no_stomp_timer;
+ u32 bt_priority_cnt;
+ unsigned long bt_priority_time;
+ unsigned long op_flags;
+ int bt_stomp_type; /* Types of BT stomping */
+- u32 btcoex_no_stomp; /* in usec */
++ u32 btcoex_no_stomp; /* in msec */
+ u32 btcoex_period; /* in msec */
+- u32 btscan_no_stomp; /* in usec */
++ u32 btscan_no_stomp; /* in msec */
+ u32 duty_cycle;
+ u32 bt_wait_time;
+ int rssi_count;
+- struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
+ struct ath_mci_profile mci;
+ u8 stomp_audio;
+ };
+@@ -537,12 +545,6 @@ static inline int ath9k_dump_btcoex(stru
}
+ #endif /* CPTCFG_ATH9K_BTCOEX_SUPPORT */
-@@ -1302,7 +1436,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
+-struct ath9k_wow_pattern {
+- u8 pattern_bytes[MAX_PATTERN_SIZE];
+- u8 mask_bytes[MAX_PATTERN_SIZE];
+- u32 pattern_len;
+-};
+-
+ /********************/
+ /* LED Control */
+ /********************/
+@@ -570,6 +572,40 @@ static inline void ath_fill_led_pin(stru
+ }
+ #endif
- ath_txq_lock(sc, txq);
++/************************/
++/* Wake on Wireless LAN */
++/************************/
++
++struct ath9k_wow_pattern {
++ u8 pattern_bytes[MAX_PATTERN_SIZE];
++ u8 mask_bytes[MAX_PATTERN_SIZE];
++ u32 pattern_len;
++};
++
++#ifdef CPTCFG_ATH9K_WOW
++void ath9k_init_wow(struct ieee80211_hw *hw);
++int ath9k_suspend(struct ieee80211_hw *hw,
++ struct cfg80211_wowlan *wowlan);
++int ath9k_resume(struct ieee80211_hw *hw);
++void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
++#else
++static inline void ath9k_init_wow(struct ieee80211_hw *hw)
++{
++}
++static inline int ath9k_suspend(struct ieee80211_hw *hw,
++ struct cfg80211_wowlan *wowlan)
++{
++ return 0;
++}
++static inline int ath9k_resume(struct ieee80211_hw *hw)
++{
++ return 0;
++}
++static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
++{
++}
++#endif /* CONFIG_ATH9K_WOW */
++
+ /*******************************/
+ /* Antenna diversity/combining */
+ /*******************************/
+@@ -632,28 +668,24 @@ void ath_ant_comb_scan(struct ath_softc
+ /* Main driver core */
+ /********************/
+
+-#define ATH9K_PCI_CUS198 0x0001
+-#define ATH9K_PCI_CUS230 0x0002
+-#define ATH9K_PCI_CUS217 0x0004
+-#define ATH9K_PCI_CUS252 0x0008
+-#define ATH9K_PCI_WOW 0x0010
+-#define ATH9K_PCI_BT_ANT_DIV 0x0020
+-#define ATH9K_PCI_D3_L1_WAR 0x0040
+-#define ATH9K_PCI_AR9565_1ANT 0x0080
+-#define ATH9K_PCI_AR9565_2ANT 0x0100
++#define ATH9K_PCI_CUS198 0x0001
++#define ATH9K_PCI_CUS230 0x0002
++#define ATH9K_PCI_CUS217 0x0004
++#define ATH9K_PCI_CUS252 0x0008
++#define ATH9K_PCI_WOW 0x0010
++#define ATH9K_PCI_BT_ANT_DIV 0x0020
++#define ATH9K_PCI_D3_L1_WAR 0x0040
++#define ATH9K_PCI_AR9565_1ANT 0x0080
++#define ATH9K_PCI_AR9565_2ANT 0x0100
++#define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
+
+ /*
+ * Default cache line size, in bytes.
+ * Used when PCI device not fully initialized by bootrom/BIOS
+ */
+ #define DEFAULT_CACHELINE 32
+-#define ATH_REGCLASSIDS_MAX 10
+ #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
+-#define ATH_MAX_SW_RETRIES 30
+-#define ATH_CHAN_MAX 255
+-
+ #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
+-#define ATH_RATE_DUMMY_MARKER 0
-- buffered = !skb_queue_empty(&tid->buf_q);
-+ buffered = ath_tid_has_buffered(tid);
+ enum sc_op_flags {
+ SC_OP_INVALID,
+@@ -672,37 +704,6 @@ enum sc_op_flags {
+ #define PS_BEACON_SYNC BIT(4)
+ #define PS_WAIT_FOR_ANI BIT(5)
- tid->sched = false;
- list_del(&tid->list);
-@@ -1334,7 +1468,7 @@ void ath_tx_aggr_wakeup(struct ath_softc
- ath_txq_lock(sc, txq);
- ac->clear_ps_filter = true;
+-struct ath_rate_table;
+-
+-struct ath9k_vif_iter_data {
+- u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
+- u8 mask[ETH_ALEN]; /* bssid mask */
+- bool has_hw_macaddr;
+-
+- int naps; /* number of AP vifs */
+- int nmeshes; /* number of mesh vifs */
+- int nstations; /* number of station vifs */
+- int nwds; /* number of WDS vifs */
+- int nadhocs; /* number of adhoc vifs */
+-};
+-
+-/* enum spectral_mode:
+- *
+- * @SPECTRAL_DISABLED: spectral mode is disabled
+- * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
+- * something else.
+- * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
+- * is performed manually.
+- * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
+- * during a channel scan.
+- */
+-enum spectral_mode {
+- SPECTRAL_DISABLED = 0,
+- SPECTRAL_BACKGROUND,
+- SPECTRAL_MANUAL,
+- SPECTRAL_CHANSCAN,
+-};
+-
+ struct ath_softc {
+ struct ieee80211_hw *hw;
+ struct device *dev;
+@@ -723,6 +724,7 @@ struct ath_softc {
+ struct work_struct hw_check_work;
+ struct work_struct hw_reset_work;
+ struct completion paprd_complete;
++ wait_queue_head_t tx_wait;
+
+ unsigned int hw_busy_count;
+ unsigned long sc_flags;
+@@ -759,6 +761,7 @@ struct ath_softc {
+ struct delayed_work tx_complete_work;
+ struct delayed_work hw_pll_work;
+ struct timer_list rx_poll_timer;
++ struct timer_list sleep_timer;
+
+ #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
+ struct ath_btcoex btcoex;
+@@ -783,199 +786,54 @@ struct ath_softc {
+ bool tx99_state;
+ s16 tx99_power;
+
+-#ifdef CONFIG_PM_SLEEP
++#ifdef CONFIG_ATH9K_WOW
+ atomic_t wow_got_bmiss_intr;
+ atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
+ u32 wow_intr_before_sleep;
+ #endif
+ };
-- if (!skb_queue_empty(&tid->buf_q) && !tid->paused) {
-+ if (!tid->paused && ath_tid_has_buffered(tid)) {
- ath_tx_queue_tid(txq, tid);
- ath_txq_schedule(sc, txq);
- }
-@@ -1359,7 +1493,7 @@ void ath_tx_aggr_resume(struct ath_softc
- tid->baw_size = IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor;
- tid->paused = false;
-
-- if (!skb_queue_empty(&tid->buf_q)) {
-+ if (ath_tid_has_buffered(tid)) {
- ath_tx_queue_tid(txq, tid);
- ath_txq_schedule(sc, txq);
- }
-@@ -1379,6 +1513,7 @@ void ath9k_release_buffered_frames(struc
- struct ieee80211_tx_info *info;
- struct list_head bf_q;
- struct ath_buf *bf_tail = NULL, *bf;
-+ struct sk_buff_head *tid_q;
- int sent = 0;
- int i;
-
-@@ -1394,15 +1529,15 @@ void ath9k_release_buffered_frames(struc
- continue;
-
- ath_txq_lock(sc, tid->ac->txq);
-- while (!skb_queue_empty(&tid->buf_q) && nframes > 0) {
-- bf = ath_tx_get_tid_subframe(sc, sc->tx.uapsdq, tid);
-+ while (nframes > 0) {
-+ bf = ath_tx_get_tid_subframe(sc, sc->tx.uapsdq, tid, &tid_q);
- if (!bf)
- break;
-
-- __skb_unlink(bf->bf_mpdu, &tid->buf_q);
-+ __skb_unlink(bf->bf_mpdu, tid_q);
- list_add_tail(&bf->list, &bf_q);
- ath_set_rates(tid->an->vif, tid->an->sta, bf);
-- ath_tx_addto_baw(sc, tid, bf->bf_state.seqno);
-+ ath_tx_addto_baw(sc, tid, bf);
- bf->bf_state.bf_type &= ~BUF_AGGR;
- if (bf_tail)
- bf_tail->bf_next = bf;
-@@ -1412,7 +1547,7 @@ void ath9k_release_buffered_frames(struc
- sent++;
- TX_STAT_INC(txq->axq_qnum, a_queued_hw);
-
-- if (skb_queue_empty(&tid->buf_q))
-+ if (an->sta && !ath_tid_has_buffered(tid))
- ieee80211_sta_set_buffered(an->sta, i, false);
- }
- ath_txq_unlock_complete(sc, tid->ac->txq);
-@@ -1665,25 +1800,27 @@ void ath_tx_cleanupq(struct ath_softc *s
- */
- void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
+-#define SPECTRAL_SCAN_BITMASK 0x10
+-/* Radar info packet format, used for DFS and spectral formats. */
+-struct ath_radar_info {
+- u8 pulse_length_pri;
+- u8 pulse_length_ext;
+- u8 pulse_bw_info;
+-} __packed;
+-
+-/* The HT20 spectral data has 4 bytes of additional information at it's end.
+- *
+- * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
+- * [7:0]: all bins max_magnitude[9:2]
+- * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
+- * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
+- */
+-struct ath_ht20_mag_info {
+- u8 all_bins[3];
+- u8 max_exp;
+-} __packed;
+-
+-#define SPECTRAL_HT20_NUM_BINS 56
+-
+-/* WARNING: don't actually use this struct! MAC may vary the amount of
+- * data by -1/+2. This struct is for reference only.
+- */
+-struct ath_ht20_fft_packet {
+- u8 data[SPECTRAL_HT20_NUM_BINS];
+- struct ath_ht20_mag_info mag_info;
+- struct ath_radar_info radar_info;
+-} __packed;
+-
+-#define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet))
+-
+-/* Dynamic 20/40 mode:
+- *
+- * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
+- * [7:0]: lower bins max_magnitude[9:2]
+- * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
+- * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
+- * [7:0]: upper bins max_magnitude[9:2]
+- * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
+- * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
+- */
+-struct ath_ht20_40_mag_info {
+- u8 lower_bins[3];
+- u8 upper_bins[3];
+- u8 max_exp;
+-} __packed;
+-
+-#define SPECTRAL_HT20_40_NUM_BINS 128
+-
+-/* WARNING: don't actually use this struct! MAC may vary the amount of
+- * data. This struct is for reference only.
+- */
+-struct ath_ht20_40_fft_packet {
+- u8 data[SPECTRAL_HT20_40_NUM_BINS];
+- struct ath_ht20_40_mag_info mag_info;
+- struct ath_radar_info radar_info;
+-} __packed;
+-
+-
+-#define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
+-
+-/* grabs the max magnitude from the all/upper/lower bins */
+-static inline u16 spectral_max_magnitude(u8 *bins)
+-{
+- return (bins[0] & 0xc0) >> 6 |
+- (bins[1] & 0xff) << 2 |
+- (bins[2] & 0x03) << 10;
+-}
++/********/
++/* TX99 */
++/********/
+
+-/* return the max magnitude from the all/upper/lower bins */
+-static inline u8 spectral_max_index(u8 *bins)
++#ifdef CONFIG_ATH9K_TX99
++void ath9k_tx99_init_debug(struct ath_softc *sc);
++int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
++ struct ath_tx_control *txctl);
++#else
++static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
{
-- struct ath_atx_ac *ac, *ac_tmp, *last_ac;
-+ struct ath_atx_ac *ac, *last_ac;
- struct ath_atx_tid *tid, *last_tid;
-+ bool sent = false;
-
- if (test_bit(SC_OP_HW_RESET, &sc->sc_flags) ||
-- list_empty(&txq->axq_acq) ||
-- txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
-+ list_empty(&txq->axq_acq))
- return;
-
- rcu_read_lock();
-
-- ac = list_first_entry(&txq->axq_acq, struct ath_atx_ac, list);
- last_ac = list_entry(txq->axq_acq.prev, struct ath_atx_ac, list);
-+ while (!list_empty(&txq->axq_acq)) {
-+ bool stop = false;
+- s8 m = (bins[2] & 0xfc) >> 2;
+-
+- /* TODO: this still doesn't always report the right values ... */
+- if (m > 32)
+- m |= 0xe0;
+- else
+- m &= ~0xe0;
+-
+- return m + 29;
+ }
+-
+-/* return the bitmap weight from the all/upper/lower bins */
+-static inline u8 spectral_bitmap_weight(u8 *bins)
++static inline int ath9k_tx99_send(struct ath_softc *sc,
++ struct sk_buff *skb,
++ struct ath_tx_control *txctl)
+ {
+- return bins[0] & 0x3f;
++ return 0;
+ }
+-
+-/* FFT sample format given to userspace via debugfs.
+- *
+- * Please keep the type/length at the front position and change
+- * other fields after adding another sample type
+- *
+- * TODO: this might need rework when switching to nl80211-based
+- * interface.
+- */
+-enum ath_fft_sample_type {
+- ATH_FFT_SAMPLE_HT20 = 1,
+- ATH_FFT_SAMPLE_HT20_40,
+-};
+-
+-struct fft_sample_tlv {
+- u8 type; /* see ath_fft_sample */
+- __be16 length;
+- /* type dependent data follows */
+-} __packed;
+-
+-struct fft_sample_ht20 {
+- struct fft_sample_tlv tlv;
+-
+- u8 max_exp;
+-
+- __be16 freq;
+- s8 rssi;
+- s8 noise;
+-
+- __be16 max_magnitude;
+- u8 max_index;
+- u8 bitmap_weight;
+-
+- __be64 tsf;
+-
+- u8 data[SPECTRAL_HT20_NUM_BINS];
+-} __packed;
+-
+-struct fft_sample_ht20_40 {
+- struct fft_sample_tlv tlv;
+-
+- u8 channel_type;
+- __be16 freq;
+-
+- s8 lower_rssi;
+- s8 upper_rssi;
+-
+- __be64 tsf;
+-
+- s8 lower_noise;
+- s8 upper_noise;
+-
+- __be16 lower_max_magnitude;
+- __be16 upper_max_magnitude;
+-
+- u8 lower_max_index;
+- u8 upper_max_index;
+-
+- u8 lower_bitmap_weight;
+- u8 upper_bitmap_weight;
+-
+- u8 max_exp;
+-
+- u8 data[SPECTRAL_HT20_40_NUM_BINS];
+-} __packed;
+-
+-int ath9k_tx99_init(struct ath_softc *sc);
+-void ath9k_tx99_deinit(struct ath_softc *sc);
+-int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
+- struct ath_tx_control *txctl);
+-
+-void ath9k_tasklet(unsigned long data);
+-int ath_cabq_update(struct ath_softc *);
++#endif /* CONFIG_ATH9K_TX99 */
-- list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
-+ ac = list_first_entry(&txq->axq_acq, struct ath_atx_ac, list);
- last_tid = list_entry(ac->tid_q.prev, struct ath_atx_tid, list);
- list_del(&ac->list);
- ac->sched = false;
+ static inline void ath_read_cachesize(struct ath_common *common, int *csz)
+ {
+ common->bus_ops->read_cachesize(common, csz);
+ }
- while (!list_empty(&ac->tid_q)) {
-+
- tid = list_first_entry(&ac->tid_q, struct ath_atx_tid,
- list);
- list_del(&tid->list);
-@@ -1692,17 +1829,17 @@ void ath_txq_schedule(struct ath_softc *
- if (tid->paused)
- continue;
+-extern struct ieee80211_ops ath9k_ops;
+-extern int ath9k_modparam_nohwcrypt;
+-extern int led_blink;
+-extern bool is_ath9k_unloaded;
+-
++void ath9k_tasklet(unsigned long data);
++int ath_cabq_update(struct ath_softc *);
+ u8 ath9k_parse_mpdudensity(u8 mpdudensity);
+ irqreturn_t ath_isr(int irq, void *dev);
++int ath_reset(struct ath_softc *sc);
++void ath_cancel_work(struct ath_softc *sc);
++void ath_restart_work(struct ath_softc *sc);
+ int ath9k_init_device(u16 devid, struct ath_softc *sc,
+ const struct ath_bus_ops *bus_ops);
+ void ath9k_deinit_device(struct ath_softc *sc);
+-void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
+ void ath9k_reload_chainmask_settings(struct ath_softc *sc);
+-
+-void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
+-int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
+- enum spectral_mode spectral_mode);
+-
++u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
++void ath_start_rfkill_poll(struct ath_softc *sc);
++void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
++void ath9k_ps_wakeup(struct ath_softc *sc);
++void ath9k_ps_restore(struct ath_softc *sc);
+
+ #ifdef CPTCFG_ATH9K_PCI
+ int ath_pci_init(void);
+@@ -993,15 +851,4 @@ static inline int ath_ahb_init(void) { r
+ static inline void ath_ahb_exit(void) {};
+ #endif
-- ath_tx_sched_aggr(sc, txq, tid);
-+ if (ath_tx_sched_aggr(sc, txq, tid, &stop))
-+ sent = true;
+-void ath9k_ps_wakeup(struct ath_softc *sc);
+-void ath9k_ps_restore(struct ath_softc *sc);
+-
+-u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
+-
+-void ath_start_rfkill_poll(struct ath_softc *sc);
+-extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
+-void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
+- struct ieee80211_vif *vif,
+- struct ath9k_vif_iter_data *iter_data);
+-
+ #endif /* ATH9K_H */
+--- a/drivers/net/wireless/ath/ath9k/debug.c
++++ b/drivers/net/wireless/ath/ath9k/debug.c
+@@ -17,7 +17,6 @@
+ #include <linux/slab.h>
+ #include <linux/vmalloc.h>
+ #include <linux/export.h>
+-#include <linux/relay.h>
+ #include <asm/unaligned.h>
- /*
- * add tid to round-robin queue if more frames
- * are pending for the tid
- */
-- if (!skb_queue_empty(&tid->buf_q))
-+ if (ath_tid_has_buffered(tid))
- ath_tx_queue_tid(txq, tid);
+ #include "ath9k.h"
+@@ -27,6 +26,47 @@
+ #define REG_READ_D(_ah, _reg) \
+ ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
-- if (tid == last_tid ||
-- txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
-+ if (stop || tid == last_tid)
- break;
- }
++void ath9k_debug_sync_cause(struct ath_softc *sc, u32 sync_cause)
++{
++ if (sync_cause)
++ sc->debug.stats.istats.sync_cause_all++;
++ if (sync_cause & AR_INTR_SYNC_RTC_IRQ)
++ sc->debug.stats.istats.sync_rtc_irq++;
++ if (sync_cause & AR_INTR_SYNC_MAC_IRQ)
++ sc->debug.stats.istats.sync_mac_irq++;
++ if (sync_cause & AR_INTR_SYNC_EEPROM_ILLEGAL_ACCESS)
++ sc->debug.stats.istats.eeprom_illegal_access++;
++ if (sync_cause & AR_INTR_SYNC_APB_TIMEOUT)
++ sc->debug.stats.istats.apb_timeout++;
++ if (sync_cause & AR_INTR_SYNC_PCI_MODE_CONFLICT)
++ sc->debug.stats.istats.pci_mode_conflict++;
++ if (sync_cause & AR_INTR_SYNC_HOST1_FATAL)
++ sc->debug.stats.istats.host1_fatal++;
++ if (sync_cause & AR_INTR_SYNC_HOST1_PERR)
++ sc->debug.stats.istats.host1_perr++;
++ if (sync_cause & AR_INTR_SYNC_TRCV_FIFO_PERR)
++ sc->debug.stats.istats.trcv_fifo_perr++;
++ if (sync_cause & AR_INTR_SYNC_RADM_CPL_EP)
++ sc->debug.stats.istats.radm_cpl_ep++;
++ if (sync_cause & AR_INTR_SYNC_RADM_CPL_DLLP_ABORT)
++ sc->debug.stats.istats.radm_cpl_dllp_abort++;
++ if (sync_cause & AR_INTR_SYNC_RADM_CPL_TLP_ABORT)
++ sc->debug.stats.istats.radm_cpl_tlp_abort++;
++ if (sync_cause & AR_INTR_SYNC_RADM_CPL_ECRC_ERR)
++ sc->debug.stats.istats.radm_cpl_ecrc_err++;
++ if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT)
++ sc->debug.stats.istats.radm_cpl_timeout++;
++ if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT)
++ sc->debug.stats.istats.local_timeout++;
++ if (sync_cause & AR_INTR_SYNC_PM_ACCESS)
++ sc->debug.stats.istats.pm_access++;
++ if (sync_cause & AR_INTR_SYNC_MAC_AWAKE)
++ sc->debug.stats.istats.mac_awake++;
++ if (sync_cause & AR_INTR_SYNC_MAC_ASLEEP)
++ sc->debug.stats.istats.mac_asleep++;
++ if (sync_cause & AR_INTR_SYNC_MAC_SLEEP_ACCESS)
++ sc->debug.stats.istats.mac_sleep_access++;
++}
-@@ -1711,9 +1848,17 @@ void ath_txq_schedule(struct ath_softc *
- list_add_tail(&ac->list, &txq->axq_acq);
- }
+ static ssize_t ath9k_debugfs_read_buf(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+@@ -1016,297 +1056,6 @@ static const struct file_operations fops
+ .llseek = default_llseek,
+ };
-- if (ac == last_ac ||
-- txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
-+ if (stop)
- break;
-+
-+ if (ac == last_ac) {
-+ if (!sent)
-+ break;
-+
-+ sent = false;
-+ last_ac = list_entry(txq->axq_acq.prev,
-+ struct ath_atx_ac, list);
-+ }
- }
+-static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char *mode = "";
+- unsigned int len;
+-
+- switch (sc->spectral_mode) {
+- case SPECTRAL_DISABLED:
+- mode = "disable";
+- break;
+- case SPECTRAL_BACKGROUND:
+- mode = "background";
+- break;
+- case SPECTRAL_CHANSCAN:
+- mode = "chanscan";
+- break;
+- case SPECTRAL_MANUAL:
+- mode = "manual";
+- break;
+- }
+- len = strlen(mode);
+- return simple_read_from_buffer(user_buf, count, ppos, mode, len);
+-}
+-
+-static ssize_t write_file_spec_scan_ctl(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- char buf[32];
+- ssize_t len;
+-
+- if (config_enabled(CPTCFG_ATH9K_TX99))
+- return -EOPNOTSUPP;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- buf[len] = '\0';
+-
+- if (strncmp("trigger", buf, 7) == 0) {
+- ath9k_spectral_scan_trigger(sc->hw);
+- } else if (strncmp("background", buf, 9) == 0) {
+- ath9k_spectral_scan_config(sc->hw, SPECTRAL_BACKGROUND);
+- ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n");
+- } else if (strncmp("chanscan", buf, 8) == 0) {
+- ath9k_spectral_scan_config(sc->hw, SPECTRAL_CHANSCAN);
+- ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n");
+- } else if (strncmp("manual", buf, 6) == 0) {
+- ath9k_spectral_scan_config(sc->hw, SPECTRAL_MANUAL);
+- ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n");
+- } else if (strncmp("disable", buf, 7) == 0) {
+- ath9k_spectral_scan_config(sc->hw, SPECTRAL_DISABLED);
+- ath_dbg(common, CONFIG, "spectral scan: disabled\n");
+- } else {
+- return -EINVAL;
+- }
+-
+- return count;
+-}
+-
+-static const struct file_operations fops_spec_scan_ctl = {
+- .read = read_file_spec_scan_ctl,
+- .write = write_file_spec_scan_ctl,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static ssize_t read_file_spectral_short_repeat(struct file *file,
+- char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char buf[32];
+- unsigned int len;
+-
+- len = sprintf(buf, "%d\n", sc->spec_config.short_repeat);
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
+-
+-static ssize_t write_file_spectral_short_repeat(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- unsigned long val;
+- char buf[32];
+- ssize_t len;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- buf[len] = '\0';
+- if (kstrtoul(buf, 0, &val))
+- return -EINVAL;
+-
+- if (val < 0 || val > 1)
+- return -EINVAL;
+-
+- sc->spec_config.short_repeat = val;
+- return count;
+-}
+-
+-static const struct file_operations fops_spectral_short_repeat = {
+- .read = read_file_spectral_short_repeat,
+- .write = write_file_spectral_short_repeat,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static ssize_t read_file_spectral_count(struct file *file,
+- char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char buf[32];
+- unsigned int len;
+-
+- len = sprintf(buf, "%d\n", sc->spec_config.count);
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
+-
+-static ssize_t write_file_spectral_count(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- unsigned long val;
+- char buf[32];
+- ssize_t len;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- buf[len] = '\0';
+- if (kstrtoul(buf, 0, &val))
+- return -EINVAL;
+-
+- if (val < 0 || val > 255)
+- return -EINVAL;
+-
+- sc->spec_config.count = val;
+- return count;
+-}
+-
+-static const struct file_operations fops_spectral_count = {
+- .read = read_file_spectral_count,
+- .write = write_file_spectral_count,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static ssize_t read_file_spectral_period(struct file *file,
+- char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char buf[32];
+- unsigned int len;
+-
+- len = sprintf(buf, "%d\n", sc->spec_config.period);
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
+-
+-static ssize_t write_file_spectral_period(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- unsigned long val;
+- char buf[32];
+- ssize_t len;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- buf[len] = '\0';
+- if (kstrtoul(buf, 0, &val))
+- return -EINVAL;
+-
+- if (val < 0 || val > 255)
+- return -EINVAL;
+-
+- sc->spec_config.period = val;
+- return count;
+-}
+-
+-static const struct file_operations fops_spectral_period = {
+- .read = read_file_spectral_period,
+- .write = write_file_spectral_period,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static ssize_t read_file_spectral_fft_period(struct file *file,
+- char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char buf[32];
+- unsigned int len;
+-
+- len = sprintf(buf, "%d\n", sc->spec_config.fft_period);
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
+-
+-static ssize_t write_file_spectral_fft_period(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- unsigned long val;
+- char buf[32];
+- ssize_t len;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- buf[len] = '\0';
+- if (kstrtoul(buf, 0, &val))
+- return -EINVAL;
+-
+- if (val < 0 || val > 15)
+- return -EINVAL;
+-
+- sc->spec_config.fft_period = val;
+- return count;
+-}
+-
+-static const struct file_operations fops_spectral_fft_period = {
+- .read = read_file_spectral_fft_period,
+- .write = write_file_spectral_fft_period,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static struct dentry *create_buf_file_handler(const char *filename,
+- struct dentry *parent,
+-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0))
+- umode_t mode,
+-#else
+- int mode,
+-#endif
+- struct rchan_buf *buf,
+- int *is_global)
+-{
+- struct dentry *buf_file;
+-
+- buf_file = debugfs_create_file(filename, mode, parent, buf,
+- &relay_file_operations);
+- *is_global = 1;
+- return buf_file;
+-}
+-
+-static int remove_buf_file_handler(struct dentry *dentry)
+-{
+- debugfs_remove(dentry);
+-
+- return 0;
+-}
+-
+-void ath_debug_send_fft_sample(struct ath_softc *sc,
+- struct fft_sample_tlv *fft_sample_tlv)
+-{
+- int length;
+- if (!sc->rfs_chan_spec_scan)
+- return;
+-
+- length = __be16_to_cpu(fft_sample_tlv->length) +
+- sizeof(*fft_sample_tlv);
+- relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv, length);
+-}
+-
+-static struct rchan_callbacks rfs_spec_scan_cb = {
+- .create_buf_file = create_buf_file_handler,
+- .remove_buf_file = remove_buf_file_handler,
+-};
+-
+-
+ static ssize_t read_file_regidx(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+ {
+@@ -1776,117 +1525,9 @@ void ath9k_get_et_stats(struct ieee80211
- rcu_read_unlock();
-@@ -1792,57 +1937,6 @@ static void ath_tx_txqaddbuf(struct ath_
- }
+ void ath9k_deinit_debug(struct ath_softc *sc)
+ {
+- if (config_enabled(CPTCFG_ATH9K_DEBUGFS) && sc->rfs_chan_spec_scan) {
+- relay_close(sc->rfs_chan_spec_scan);
+- sc->rfs_chan_spec_scan = NULL;
+- }
++ ath9k_spectral_deinit_debug(sc);
}
--static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_txq *txq,
-- struct ath_atx_tid *tid, struct sk_buff *skb,
-- struct ath_tx_control *txctl)
+-static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
+- size_t count, loff_t *ppos)
-{
-- struct ath_frame_info *fi = get_frame_info(skb);
-- struct list_head bf_head;
-- struct ath_buf *bf;
+- struct ath_softc *sc = file->private_data;
+- char buf[3];
+- unsigned int len;
-
-- /*
-- * Do not queue to h/w when any of the following conditions is true:
-- * - there are pending frames in software queue
-- * - the TID is currently paused for ADDBA/BAR request
-- * - seqno is not within block-ack window
-- * - h/w queue depth exceeds low water mark
-- */
-- if ((!skb_queue_empty(&tid->buf_q) || tid->paused ||
-- !BAW_WITHIN(tid->seq_start, tid->baw_size, tid->seq_next) ||
-- txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) &&
-- txq != sc->tx.uapsdq) {
-- /*
-- * Add this frame to software queue for scheduling later
-- * for aggregation.
-- */
-- TX_STAT_INC(txq->axq_qnum, a_queued_sw);
-- __skb_queue_tail(&tid->buf_q, skb);
-- if (!txctl->an || !txctl->an->sleeping)
-- ath_tx_queue_tid(txq, tid);
-- return;
+- len = sprintf(buf, "%d\n", sc->tx99_state);
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
+-
+-static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- char buf[32];
+- bool start;
+- ssize_t len;
+- int r;
+-
+- if (sc->nvifs > 1)
+- return -EOPNOTSUPP;
+-
+- len = min(count, sizeof(buf) - 1);
+- if (copy_from_user(buf, user_buf, len))
+- return -EFAULT;
+-
+- if (strtobool(buf, &start))
+- return -EINVAL;
+-
+- if (start == sc->tx99_state) {
+- if (!start)
+- return count;
+- ath_dbg(common, XMIT, "Resetting TX99\n");
+- ath9k_tx99_deinit(sc);
- }
-
-- bf = ath_tx_setup_buffer(sc, txq, tid, skb);
-- if (!bf) {
-- ieee80211_free_txskb(sc->hw, skb);
-- return;
+- if (!start) {
+- ath9k_tx99_deinit(sc);
+- return count;
- }
-
-- ath_set_rates(tid->an->vif, tid->an->sta, bf);
-- bf->bf_state.bf_type = BUF_AMPDU;
-- INIT_LIST_HEAD(&bf_head);
-- list_add(&bf->list, &bf_head);
+- r = ath9k_tx99_init(sc);
+- if (r)
+- return r;
-
-- /* Add sub-frame to BAW */
-- ath_tx_addto_baw(sc, tid, bf->bf_state.seqno);
+- return count;
+-}
+-
+-static const struct file_operations fops_tx99 = {
+- .read = read_file_tx99,
+- .write = write_file_tx99,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+-static ssize_t read_file_tx99_power(struct file *file,
+- char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- char buf[32];
+- unsigned int len;
+-
+- len = sprintf(buf, "%d (%d dBm)\n",
+- sc->tx99_power,
+- sc->tx99_power / 2);
+-
+- return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-}
-
-- /* Queue to h/w without aggregation */
-- TX_STAT_INC(txq->axq_qnum, a_queued_hw);
-- bf->bf_lastbf = bf;
-- ath_tx_fill_desc(sc, bf, txq, fi->framelen);
-- ath_tx_txqaddbuf(sc, txq, &bf_head, false);
+-static ssize_t write_file_tx99_power(struct file *file,
+- const char __user *user_buf,
+- size_t count, loff_t *ppos)
+-{
+- struct ath_softc *sc = file->private_data;
+- int r;
+- u8 tx_power;
+-
+- r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
+- if (r)
+- return r;
+-
+- if (tx_power > MAX_RATE_POWER)
+- return -EINVAL;
+-
+- sc->tx99_power = tx_power;
+-
+- ath9k_ps_wakeup(sc);
+- ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
+- ath9k_ps_restore(sc);
+-
+- return count;
-}
-
- static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
- struct ath_atx_tid *tid, struct sk_buff *skb)
+-static const struct file_operations fops_tx99_power = {
+- .read = read_file_tx99_power,
+- .write = write_file_tx99_power,
+- .open = simple_open,
+- .owner = THIS_MODULE,
+- .llseek = default_llseek,
+-};
+-
+ int ath9k_init_debug(struct ath_hw *ah)
{
-@@ -1985,6 +2079,7 @@ static int ath_tx_prepare(struct ieee802
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
- struct ieee80211_sta *sta = txctl->sta;
- struct ieee80211_vif *vif = info->control.vif;
-+ struct ath_vif *avp;
- struct ath_softc *sc = hw->priv;
- int frmlen = skb->len + FCS_LEN;
- int padpos, padsize;
-@@ -1992,6 +2087,10 @@ static int ath_tx_prepare(struct ieee802
- /* NOTE: sta can be NULL according to net/mac80211.h */
- if (sta)
- txctl->an = (struct ath_node *)sta->drv_priv;
-+ else if (vif && ieee80211_is_data(hdr->frame_control)) {
-+ avp = (void *)vif->drv_priv;
-+ txctl->an = &avp->mcast_node;
-+ }
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -1903,6 +1544,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+ #endif
+
+ ath9k_dfs_init_debug(sc);
++ ath9k_tx99_init_debug(sc);
++ ath9k_spectral_init_debug(sc);
+
+ debugfs_create_file("dma", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_dma);
+@@ -1949,23 +1592,6 @@ int ath9k_init_debug(struct ath_hw *ah)
+ &fops_base_eeprom);
+ debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_modal_eeprom);
+- sc->rfs_chan_spec_scan = relay_open("spectral_scan",
+- sc->debug.debugfs_phy,
+- 1024, 256, &rfs_spec_scan_cb,
+- NULL);
+- debugfs_create_file("spectral_scan_ctl", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc,
+- &fops_spec_scan_ctl);
+- debugfs_create_file("spectral_short_repeat", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc,
+- &fops_spectral_short_repeat);
+- debugfs_create_file("spectral_count", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc, &fops_spectral_count);
+- debugfs_create_file("spectral_period", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc, &fops_spectral_period);
+- debugfs_create_file("spectral_fft_period", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc,
+- &fops_spectral_fft_period);
+ debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
+ sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
+ debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
+@@ -1978,15 +1604,6 @@ int ath9k_init_debug(struct ath_hw *ah)
+ debugfs_create_file("btcoex", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_btcoex);
+ #endif
+- if (config_enabled(CPTCFG_ATH9K_TX99) &&
+- AR_SREV_9300_20_OR_LATER(ah)) {
+- debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc,
+- &fops_tx99);
+- debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
+- sc->debug.debugfs_phy, sc,
+- &fops_tx99_power);
+- }
+
+ return 0;
+ }
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -17,6 +17,8 @@
+ #include <linux/io.h>
+ #include <linux/slab.h>
+ #include <linux/module.h>
++#include <linux/time.h>
++#include <linux/bitops.h>
+ #include <asm/unaligned.h>
+
+ #include "hw.h"
+@@ -83,48 +85,6 @@ static void ath9k_hw_ani_cache_ini_regs(
+
+ #ifdef CPTCFG_ATH9K_DEBUGFS
+
+-void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause)
+-{
+- struct ath_softc *sc = common->priv;
+- if (sync_cause)
+- sc->debug.stats.istats.sync_cause_all++;
+- if (sync_cause & AR_INTR_SYNC_RTC_IRQ)
+- sc->debug.stats.istats.sync_rtc_irq++;
+- if (sync_cause & AR_INTR_SYNC_MAC_IRQ)
+- sc->debug.stats.istats.sync_mac_irq++;
+- if (sync_cause & AR_INTR_SYNC_EEPROM_ILLEGAL_ACCESS)
+- sc->debug.stats.istats.eeprom_illegal_access++;
+- if (sync_cause & AR_INTR_SYNC_APB_TIMEOUT)
+- sc->debug.stats.istats.apb_timeout++;
+- if (sync_cause & AR_INTR_SYNC_PCI_MODE_CONFLICT)
+- sc->debug.stats.istats.pci_mode_conflict++;
+- if (sync_cause & AR_INTR_SYNC_HOST1_FATAL)
+- sc->debug.stats.istats.host1_fatal++;
+- if (sync_cause & AR_INTR_SYNC_HOST1_PERR)
+- sc->debug.stats.istats.host1_perr++;
+- if (sync_cause & AR_INTR_SYNC_TRCV_FIFO_PERR)
+- sc->debug.stats.istats.trcv_fifo_perr++;
+- if (sync_cause & AR_INTR_SYNC_RADM_CPL_EP)
+- sc->debug.stats.istats.radm_cpl_ep++;
+- if (sync_cause & AR_INTR_SYNC_RADM_CPL_DLLP_ABORT)
+- sc->debug.stats.istats.radm_cpl_dllp_abort++;
+- if (sync_cause & AR_INTR_SYNC_RADM_CPL_TLP_ABORT)
+- sc->debug.stats.istats.radm_cpl_tlp_abort++;
+- if (sync_cause & AR_INTR_SYNC_RADM_CPL_ECRC_ERR)
+- sc->debug.stats.istats.radm_cpl_ecrc_err++;
+- if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT)
+- sc->debug.stats.istats.radm_cpl_timeout++;
+- if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT)
+- sc->debug.stats.istats.local_timeout++;
+- if (sync_cause & AR_INTR_SYNC_PM_ACCESS)
+- sc->debug.stats.istats.pm_access++;
+- if (sync_cause & AR_INTR_SYNC_MAC_AWAKE)
+- sc->debug.stats.istats.mac_awake++;
+- if (sync_cause & AR_INTR_SYNC_MAC_ASLEEP)
+- sc->debug.stats.istats.mac_asleep++;
+- if (sync_cause & AR_INTR_SYNC_MAC_SLEEP_ACCESS)
+- sc->debug.stats.istats.mac_sleep_access++;
+-}
+ #endif
- if (info->control.hw_key)
- frmlen += info->control.hw_key->icv_len;
-@@ -2041,7 +2140,6 @@ int ath_tx_start(struct ieee80211_hw *hw
- struct ath_txq *txq = txctl->txq;
- struct ath_atx_tid *tid = NULL;
- struct ath_buf *bf;
-- u8 tidno;
- int q;
- int ret;
-@@ -2069,27 +2167,31 @@ int ath_tx_start(struct ieee80211_hw *hw
- ath_txq_unlock(sc, txq);
- txq = sc->tx.uapsdq;
- ath_txq_lock(sc, txq);
+@@ -438,23 +398,13 @@ static bool ath9k_hw_chip_test(struct at
+
+ static void ath9k_hw_init_config(struct ath_hw *ah)
+ {
+- int i;
+-
+ ah->config.dma_beacon_response_time = 1;
+ ah->config.sw_beacon_response_time = 6;
+- ah->config.additional_swba_backoff = 0;
+ ah->config.ack_6mb = 0x0;
+ ah->config.cwm_ignore_extcca = 0;
+- ah->config.pcie_clock_req = 0;
+ ah->config.analog_shiftreg = 1;
+
+- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+- ah->config.spurchans[i][0] = AR_NO_SPUR;
+- ah->config.spurchans[i][1] = AR_NO_SPUR;
- }
-
-- if (txctl->an && ieee80211_is_data_qos(hdr->frame_control)) {
-- tidno = ieee80211_get_qos_ctl(hdr)[0] &
-- IEEE80211_QOS_CTL_TID_MASK;
-- tid = ATH_AN_2_TID(txctl->an, tidno);
-+ } else if (txctl->an &&
-+ ieee80211_is_data_present(hdr->frame_control)) {
-+ tid = ath_get_skb_tid(sc, txctl->an, skb);
+ ah->config.rx_intr_mitigation = true;
+- ah->config.pcieSerDesWrite = true;
- WARN_ON(tid->ac->txq != txctl->txq);
-- }
+ /*
+ * We need this for PCI devices only (Cardbus, PCI, miniPCI)
+@@ -486,7 +436,6 @@ static void ath9k_hw_init_defaults(struc
+ ah->hw_version.magic = AR5416_MAGIC;
+ ah->hw_version.subvendorid = 0;
+
+- ah->atim_window = 0;
+ ah->sta_id1_defaults =
+ AR_STA_ID1_CRPT_MIC_ENABLE |
+ AR_STA_ID1_MCAST_KSRCH;
+@@ -549,11 +498,11 @@ static int ath9k_hw_post_init(struct ath
+ * EEPROM needs to be initialized before we do this.
+ * This is required for regulatory compliance.
+ */
+- if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
++ if (AR_SREV_9300_20_OR_LATER(ah)) {
+ u16 regdmn = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
+ if ((regdmn & 0xF0) == CTL_FCC) {
+- ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ;
+- ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ;
++ ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ;
++ ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ;
+ }
+ }
+
+@@ -1282,6 +1231,42 @@ void ath9k_hw_get_delta_slope_vals(struc
+ *coef_exponent = coef_exp - 16;
+ }
-- if ((info->flags & IEEE80211_TX_CTL_AMPDU) && tid) {
-+ if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
-+ tid->ac->clear_ps_filter = true;
++/* AR9330 WAR:
++ * call external reset function to reset WMAC if:
++ * - doing a cold reset
++ * - we have pending frames in the TX queues.
++ */
++static bool ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type)
++{
++ int i, npend = 0;
+
- /*
-- * Try aggregation if it's a unicast data frame
-- * and the destination is HT capable.
-+ * Add this frame to software queue for scheduling later
-+ * for aggregation.
- */
-- ath_tx_send_ampdu(sc, txq, tid, skb, txctl);
-+ TX_STAT_INC(txq->axq_qnum, a_queued_sw);
-+ __skb_queue_tail(&tid->buf_q, skb);
-+ if (!txctl->an->sleeping)
-+ ath_tx_queue_tid(txq, tid);
++ for (i = 0; i < AR_NUM_QCU; i++) {
++ npend = ath9k_hw_numtxpending(ah, i);
++ if (npend)
++ break;
++ }
+
-+ ath_txq_schedule(sc, txq);
- goto out;
++ if (ah->external_reset &&
++ (npend || type == ATH9K_RESET_COLD)) {
++ int reset_err = 0;
++
++ ath_dbg(ath9k_hw_common(ah), RESET,
++ "reset MAC via external reset\n");
++
++ reset_err = ah->external_reset();
++ if (reset_err) {
++ ath_err(ath9k_hw_common(ah),
++ "External reset failed, err=%d\n",
++ reset_err);
++ return false;
++ }
++
++ REG_WRITE(ah, AR_RTC_RESET, 1);
++ }
++
++ return true;
++}
++
+ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
+ {
+ u32 rst_flags;
+@@ -1332,38 +1317,8 @@ static bool ath9k_hw_set_reset(struct at
}
- bf = ath_tx_setup_buffer(sc, txq, tid, skb);
- if (!bf) {
-+ ath_txq_skb_done(sc, txq, skb);
- if (txctl->paprd)
- dev_kfree_skb_any(skb);
- else
-@@ -2189,7 +2291,7 @@ static void ath_tx_complete(struct ath_s
- struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
- struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
-- int q, padpos, padsize;
-+ int padpos, padsize;
- unsigned long flags;
-
- ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb);
-@@ -2225,21 +2327,7 @@ static void ath_tx_complete(struct ath_s
- spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
-
- __skb_queue_tail(&txq->complete_q, skb);
+ if (AR_SREV_9330(ah)) {
+- int npend = 0;
+- int i;
+-
+- /* AR9330 WAR:
+- * call external reset function to reset WMAC if:
+- * - doing a cold reset
+- * - we have pending frames in the TX queues
+- */
-
-- q = skb_get_queue_mapping(skb);
-- if (txq == sc->tx.uapsdq)
-- txq = sc->tx.txq_map[q];
+- for (i = 0; i < AR_NUM_QCU; i++) {
+- npend = ath9k_hw_numtxpending(ah, i);
+- if (npend)
+- break;
+- }
+-
+- if (ah->external_reset &&
+- (npend || type == ATH9K_RESET_COLD)) {
+- int reset_err = 0;
-
-- if (txq == sc->tx.txq_map[q]) {
-- if (WARN_ON(--txq->pending_frames < 0))
-- txq->pending_frames = 0;
+- ath_dbg(ath9k_hw_common(ah), RESET,
+- "reset MAC via external reset\n");
+-
+- reset_err = ah->external_reset();
+- if (reset_err) {
+- ath_err(ath9k_hw_common(ah),
+- "External reset failed, err=%d\n",
+- reset_err);
+- return false;
+- }
-
-- if (txq->stopped &&
-- txq->pending_frames < sc->tx.txq_max_pending[q]) {
-- ieee80211_wake_queue(sc->hw, q);
-- txq->stopped = false;
+- REG_WRITE(ah, AR_RTC_RESET, 1);
- }
-- }
-+ ath_txq_skb_done(sc, txq, skb);
- }
++ if (!ath9k_hw_ar9330_reset_war(ah, type))
++ return false;
+ }
- static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
-@@ -2360,8 +2448,7 @@ static void ath_tx_processq(struct ath_s
+ if (ath9k_hw_mci_is_enabled(ah))
+@@ -1373,7 +1328,12 @@ static bool ath9k_hw_set_reset(struct at
- if (list_empty(&txq->axq_q)) {
- txq->axq_link = NULL;
-- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
-- ath_txq_schedule(sc, txq);
-+ ath_txq_schedule(sc, txq);
- break;
- }
- bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
-@@ -2583,6 +2670,7 @@ void ath_tx_node_init(struct ath_softc *
- tid->paused = false;
- tid->active = false;
- __skb_queue_head_init(&tid->buf_q);
-+ __skb_queue_head_init(&tid->retry_q);
- acno = TID_TO_WME_AC(tidno);
- tid->ac = &an->ac[acno];
- }
-@@ -2590,6 +2678,7 @@ void ath_tx_node_init(struct ath_softc *
- for (acno = 0, ac = &an->ac[acno];
- acno < IEEE80211_NUM_ACS; acno++, ac++) {
- ac->sched = false;
-+ ac->clear_ps_filter = true;
- ac->txq = sc->tx.txq_map[acno];
- INIT_LIST_HEAD(&ac->tid_q);
- }
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -966,6 +966,8 @@ static int ath9k_add_interface(struct ie
- struct ath_softc *sc = hw->priv;
- struct ath_hw *ah = sc->sc_ah;
- struct ath_common *common = ath9k_hw_common(ah);
-+ struct ath_vif *avp = (void *)vif->drv_priv;
-+ struct ath_node *an = &avp->mcast_node;
+ REGWRITE_BUFFER_FLUSH(ah);
- mutex_lock(&sc->mutex);
+- udelay(50);
++ if (AR_SREV_9300_20_OR_LATER(ah))
++ udelay(50);
++ else if (AR_SREV_9100(ah))
++ udelay(10000);
++ else
++ udelay(100);
-@@ -979,6 +981,12 @@ static int ath9k_add_interface(struct ie
- if (ath9k_uses_beacons(vif->type))
- ath9k_beacon_assign_slot(sc, vif);
+ REG_WRITE(ah, AR_RTC_RC, 0);
+ if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
+@@ -1409,8 +1369,7 @@ static bool ath9k_hw_set_reset_power_on(
-+ an->sc = sc;
-+ an->sta = NULL;
-+ an->vif = vif;
-+ an->no_ps_filter = true;
-+ ath_tx_node_init(sc, an);
-+
- mutex_unlock(&sc->mutex);
- return 0;
- }
-@@ -1016,6 +1024,7 @@ static void ath9k_remove_interface(struc
- {
- struct ath_softc *sc = hw->priv;
- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-+ struct ath_vif *avp = (void *)vif->drv_priv;
-
- ath_dbg(common, CONFIG, "Detach Interface\n");
+ REGWRITE_BUFFER_FLUSH(ah);
-@@ -1030,6 +1039,8 @@ static void ath9k_remove_interface(struc
- ath9k_calculate_summary_state(hw, NULL);
- ath9k_ps_restore(sc);
+- if (!AR_SREV_9300_20_OR_LATER(ah))
+- udelay(2);
++ udelay(2);
-+ ath_tx_node_cleanup(sc, &avp->mcast_node);
-+
- mutex_unlock(&sc->mutex);
- }
+ if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
+ REG_WRITE(ah, AR_RC, 0);
+@@ -1502,8 +1461,9 @@ static bool ath9k_hw_channel_change(stru
+ int r;
-@@ -1374,9 +1385,6 @@ static void ath9k_sta_notify(struct ieee
- struct ath_softc *sc = hw->priv;
- struct ath_node *an = (struct ath_node *) sta->drv_priv;
+ if (pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) {
+- band_switch = IS_CHAN_5GHZ(ah->curchan) != IS_CHAN_5GHZ(chan);
+- mode_diff = (chan->channelFlags != ah->curchan->channelFlags);
++ u32 flags_diff = chan->channelFlags ^ ah->curchan->channelFlags;
++ band_switch = !!(flags_diff & CHANNEL_5GHZ);
++ mode_diff = !!(flags_diff & ~CHANNEL_HT);
+ }
-- if (!sta->ht_cap.ht_supported)
-- return;
--
- switch (cmd) {
- case STA_NOTIFY_SLEEP:
- an->sleeping = true;
-@@ -2094,7 +2102,7 @@ static void ath9k_wow_add_pattern(struct
+ for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
+@@ -1815,7 +1775,7 @@ static int ath9k_hw_do_fastcc(struct ath
+ * If cross-band fcc is not supoprted, bail out if channelFlags differ.
+ */
+ if (!(pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) &&
+- chan->channelFlags != ah->curchan->channelFlags)
++ ((chan->channelFlags ^ ah->curchan->channelFlags) & ~CHANNEL_HT))
+ goto fail;
+
+ if (!ath9k_hw_check_alive(ah))
+@@ -1856,10 +1816,12 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ struct ath9k_hw_cal_data *caldata, bool fastcc)
{
- struct ath_hw *ah = sc->sc_ah;
- struct ath9k_wow_pattern *wow_pattern = NULL;
-- struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
-+ struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
- int mask_len;
- s8 i = 0;
+ struct ath_common *common = ath9k_hw_common(ah);
++ struct timespec ts;
+ u32 saveLedState;
+ u32 saveDefAntenna;
+ u32 macStaId1;
+ u64 tsf = 0;
++ s64 usec = 0;
+ int r;
+ bool start_mci_reset = false;
+ bool save_fullsleep = ah->chip_fullsleep;
+@@ -1902,10 +1864,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+
+ macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
+
+- /* For chips on which RTC reset is done, save TSF before it gets cleared */
+- if (AR_SREV_9100(ah) ||
+- (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
+- tsf = ath9k_hw_gettsf64(ah);
++ /* Save TSF before chip reset, a cold reset clears it */
++ tsf = ath9k_hw_gettsf64(ah);
++ getrawmonotonic(&ts);
++ usec = ts.tv_sec * 1000000ULL + ts.tv_nsec / 1000;
+
+ saveLedState = REG_READ(ah, AR_CFG_LED) &
+ (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
+@@ -1938,8 +1900,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ }
---- a/drivers/net/wireless/mwifiex/cfg80211.c
-+++ b/drivers/net/wireless/mwifiex/cfg80211.c
-@@ -2298,8 +2298,7 @@ EXPORT_SYMBOL_GPL(mwifiex_del_virtual_in
+ /* Restore TSF */
+- if (tsf)
+- ath9k_hw_settsf64(ah, tsf);
++ getrawmonotonic(&ts);
++ usec = ts.tv_sec * 1000000ULL + ts.tv_nsec / 1000 - usec;
++ ath9k_hw_settsf64(ah, tsf + usec);
+
+ if (AR_SREV_9280_20_OR_LATER(ah))
+ REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
+@@ -2261,9 +2224,6 @@ void ath9k_hw_beaconinit(struct ath_hw *
+ case NL80211_IFTYPE_ADHOC:
+ REG_SET_BIT(ah, AR_TXCFG,
+ AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
+- REG_WRITE(ah, AR_NEXT_NDP_TIMER, next_beacon +
+- TU_TO_USEC(ah->atim_window ? ah->atim_window : 1));
+- flags |= AR_NDP_TIMER_EN;
+ case NL80211_IFTYPE_MESH_POINT:
+ case NL80211_IFTYPE_AP:
+ REG_WRITE(ah, AR_NEXT_TBTT_TIMER, next_beacon);
+@@ -2284,7 +2244,6 @@ void ath9k_hw_beaconinit(struct ath_hw *
+ REG_WRITE(ah, AR_BEACON_PERIOD, beacon_period);
+ REG_WRITE(ah, AR_DMA_BEACON_PERIOD, beacon_period);
+ REG_WRITE(ah, AR_SWBA_PERIOD, beacon_period);
+- REG_WRITE(ah, AR_NDP_PERIOD, beacon_period);
- #ifdef CONFIG_PM
- static bool
--mwifiex_is_pattern_supported(struct cfg80211_wowlan_trig_pkt_pattern *pat,
-- s8 *byte_seq)
-+mwifiex_is_pattern_supported(struct cfg80211_pkt_pattern *pat, s8 *byte_seq)
- {
- int j, k, valid_byte_cnt = 0;
- bool dont_care_byte = false;
---- a/drivers/net/wireless/ti/wlcore/main.c
-+++ b/drivers/net/wireless/ti/wlcore/main.c
-@@ -1315,7 +1315,7 @@ static struct sk_buff *wl12xx_alloc_dumm
-
- #ifdef CONFIG_PM
- static int
--wl1271_validate_wowlan_pattern(struct cfg80211_wowlan_trig_pkt_pattern *p)
-+wl1271_validate_wowlan_pattern(struct cfg80211_pkt_pattern *p)
- {
- int num_fields = 0, in_field = 0, fields_size = 0;
- int i, pattern_len = 0;
-@@ -1458,9 +1458,9 @@ void wl1271_rx_filter_flatten_fields(str
- * Allocates an RX filter returned through f
- * which needs to be freed using rx_filter_free()
- */
--static int wl1271_convert_wowlan_pattern_to_rx_filter(
-- struct cfg80211_wowlan_trig_pkt_pattern *p,
-- struct wl12xx_rx_filter **f)
-+static int
-+wl1271_convert_wowlan_pattern_to_rx_filter(struct cfg80211_pkt_pattern *p,
-+ struct wl12xx_rx_filter **f)
- {
- int i, j, ret = 0;
- struct wl12xx_rx_filter *filter;
-@@ -1562,7 +1562,7 @@ static int wl1271_configure_wowlan(struc
-
- /* Translate WoWLAN patterns into filters */
- for (i = 0; i < wow->n_patterns; i++) {
-- struct cfg80211_wowlan_trig_pkt_pattern *p;
-+ struct cfg80211_pkt_pattern *p;
- struct wl12xx_rx_filter *filter = NULL;
-
- p = &wow->patterns[i];
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -1698,7 +1698,7 @@ struct cfg80211_pmksa {
- };
+ REGWRITE_BUFFER_FLUSH(ah);
- /**
-- * struct cfg80211_wowlan_trig_pkt_pattern - packet pattern
-+ * struct cfg80211_pkt_pattern - packet pattern
- * @mask: bitmask where to match pattern and where to ignore bytes,
- * one bit per byte, in same format as nl80211
- * @pattern: bytes to match where bitmask is 1
-@@ -1708,7 +1708,7 @@ struct cfg80211_pmksa {
- * Internal note: @mask and @pattern are allocated in one chunk of
- * memory, free @mask only!
- */
--struct cfg80211_wowlan_trig_pkt_pattern {
-+struct cfg80211_pkt_pattern {
- u8 *mask, *pattern;
- int pattern_len;
- int pkt_offset;
-@@ -1770,7 +1770,7 @@ struct cfg80211_wowlan {
- bool any, disconnect, magic_pkt, gtk_rekey_failure,
- eap_identity_req, four_way_handshake,
- rfkill_release;
-- struct cfg80211_wowlan_trig_pkt_pattern *patterns;
-+ struct cfg80211_pkt_pattern *patterns;
- struct cfg80211_wowlan_tcp *tcp;
- int n_patterns;
- };
---- a/include/uapi/linux/nl80211.h
-+++ b/include/uapi/linux/nl80211.h
-@@ -3060,11 +3060,11 @@ enum nl80211_tx_power_setting {
- };
+@@ -2301,12 +2260,9 @@ void ath9k_hw_set_sta_beacon_timers(stru
- /**
-- * enum nl80211_wowlan_packet_pattern_attr - WoWLAN packet pattern attribute
-- * @__NL80211_WOWLAN_PKTPAT_INVALID: invalid number for nested attribute
-- * @NL80211_WOWLAN_PKTPAT_PATTERN: the pattern, values where the mask has
-+ * enum nl80211_packet_pattern_attr - packet pattern attribute
-+ * @__NL80211_PKTPAT_INVALID: invalid number for nested attribute
-+ * @NL80211_PKTPAT_PATTERN: the pattern, values where the mask has
- * a zero bit are ignored
-- * @NL80211_WOWLAN_PKTPAT_MASK: pattern mask, must be long enough to have
-+ * @NL80211_PKTPAT_MASK: pattern mask, must be long enough to have
- * a bit for each byte in the pattern. The lowest-order bit corresponds
- * to the first byte of the pattern, but the bytes of the pattern are
- * in a little-endian-like format, i.e. the 9th byte of the pattern
-@@ -3075,23 +3075,23 @@ enum nl80211_tx_power_setting {
- * Note that the pattern matching is done as though frames were not
- * 802.11 frames but 802.3 frames, i.e. the frame is fully unpacked
- * first (including SNAP header unpacking) and then matched.
-- * @NL80211_WOWLAN_PKTPAT_OFFSET: packet offset, pattern is matched after
-+ * @NL80211_PKTPAT_OFFSET: packet offset, pattern is matched after
- * these fixed number of bytes of received packet
-- * @NUM_NL80211_WOWLAN_PKTPAT: number of attributes
-- * @MAX_NL80211_WOWLAN_PKTPAT: max attribute number
-+ * @NUM_NL80211_PKTPAT: number of attributes
-+ * @MAX_NL80211_PKTPAT: max attribute number
- */
--enum nl80211_wowlan_packet_pattern_attr {
-- __NL80211_WOWLAN_PKTPAT_INVALID,
-- NL80211_WOWLAN_PKTPAT_MASK,
-- NL80211_WOWLAN_PKTPAT_PATTERN,
-- NL80211_WOWLAN_PKTPAT_OFFSET,
-+enum nl80211_packet_pattern_attr {
-+ __NL80211_PKTPAT_INVALID,
-+ NL80211_PKTPAT_MASK,
-+ NL80211_PKTPAT_PATTERN,
-+ NL80211_PKTPAT_OFFSET,
-
-- NUM_NL80211_WOWLAN_PKTPAT,
-- MAX_NL80211_WOWLAN_PKTPAT = NUM_NL80211_WOWLAN_PKTPAT - 1,
-+ NUM_NL80211_PKTPAT,
-+ MAX_NL80211_PKTPAT = NUM_NL80211_PKTPAT - 1,
- };
+ ENABLE_REGWRITE_BUFFER(ah);
- /**
-- * struct nl80211_wowlan_pattern_support - pattern support information
-+ * struct nl80211_pattern_support - packet pattern support information
- * @max_patterns: maximum number of patterns supported
- * @min_pattern_len: minimum length of each pattern
- * @max_pattern_len: maximum length of each pattern
-@@ -3101,13 +3101,22 @@ enum nl80211_wowlan_packet_pattern_attr
- * that is part of %NL80211_ATTR_WOWLAN_TRIGGERS_SUPPORTED in the
- * capability information given by the kernel to userspace.
- */
--struct nl80211_wowlan_pattern_support {
-+struct nl80211_pattern_support {
- __u32 max_patterns;
- __u32 min_pattern_len;
- __u32 max_pattern_len;
- __u32 max_pkt_offset;
- } __attribute__((packed));
-
-+/* only for backward compatibility */
-+#define __NL80211_WOWLAN_PKTPAT_INVALID __NL80211_PKTPAT_INVALID
-+#define NL80211_WOWLAN_PKTPAT_MASK NL80211_PKTPAT_MASK
-+#define NL80211_WOWLAN_PKTPAT_PATTERN NL80211_PKTPAT_PATTERN
-+#define NL80211_WOWLAN_PKTPAT_OFFSET NL80211_PKTPAT_OFFSET
-+#define NUM_NL80211_WOWLAN_PKTPAT NUM_NL80211_PKTPAT
-+#define MAX_NL80211_WOWLAN_PKTPAT MAX_NL80211_PKTPAT
-+#define nl80211_wowlan_pattern_support nl80211_pattern_support
-+
- /**
- * enum nl80211_wowlan_triggers - WoWLAN trigger definitions
- * @__NL80211_WOWLAN_TRIG_INVALID: invalid number for nested attributes
-@@ -3127,7 +3136,7 @@ struct nl80211_wowlan_pattern_support {
- * pattern matching is done after the packet is converted to the MSDU.
- *
- * In %NL80211_ATTR_WOWLAN_TRIGGERS_SUPPORTED, it is a binary attribute
-- * carrying a &struct nl80211_wowlan_pattern_support.
-+ * carrying a &struct nl80211_pattern_support.
- *
- * When reporting wakeup. it is a u32 attribute containing the 0-based
- * index of the pattern that caused the wakeup, in the patterns passed
-@@ -3284,7 +3293,7 @@ struct nl80211_wowlan_tcp_data_token_fea
- * @NL80211_WOWLAN_TCP_WAKE_PAYLOAD: wake packet payload, for advertising a
- * u32 attribute holding the maximum length
- * @NL80211_WOWLAN_TCP_WAKE_MASK: Wake packet payload mask, not used for
-- * feature advertising. The mask works like @NL80211_WOWLAN_PKTPAT_MASK
-+ * feature advertising. The mask works like @NL80211_PKTPAT_MASK
- * but on the TCP payload only.
- * @NUM_NL80211_WOWLAN_TCP: number of TCP attributes
- * @MAX_NL80211_WOWLAN_TCP: highest attribute number
---- a/net/mac80211/mesh_ps.c
-+++ b/net/mac80211/mesh_ps.c
-@@ -229,6 +229,10 @@ void ieee80211_mps_sta_status_update(str
- enum nl80211_mesh_power_mode pm;
- bool do_buffer;
-
-+ /* For non-assoc STA, prevent buffering or frame transmission */
-+ if (sta->sta_state < IEEE80211_STA_ASSOC)
-+ return;
-+
- /*
- * use peer-specific power mode if peering is established and the
- * peer's power mode is known
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -441,10 +441,12 @@ static int nl80211_prepare_wdev_dump(str
- goto out_unlock;
- }
- *rdev = wiphy_to_dev((*wdev)->wiphy);
-- cb->args[0] = (*rdev)->wiphy_idx;
-+ /* 0 is the first index - add 1 to parse only once */
-+ cb->args[0] = (*rdev)->wiphy_idx + 1;
- cb->args[1] = (*wdev)->identifier;
- } else {
-- struct wiphy *wiphy = wiphy_idx_to_wiphy(cb->args[0]);
-+ /* subtract the 1 again here */
-+ struct wiphy *wiphy = wiphy_idx_to_wiphy(cb->args[0] - 1);
- struct wireless_dev *tmp;
-
- if (!wiphy) {
-@@ -974,7 +976,7 @@ static int nl80211_send_wowlan(struct sk
- return -ENOBUFS;
-
- if (dev->wiphy.wowlan->n_patterns) {
-- struct nl80211_wowlan_pattern_support pat = {
-+ struct nl80211_pattern_support pat = {
- .max_patterns = dev->wiphy.wowlan->n_patterns,
- .min_pattern_len = dev->wiphy.wowlan->pattern_min_len,
- .max_pattern_len = dev->wiphy.wowlan->pattern_max_len,
-@@ -1568,8 +1570,10 @@ static int nl80211_dump_wiphy(struct sk_
- rtnl_lock();
- if (!state) {
- state = kzalloc(sizeof(*state), GFP_KERNEL);
-- if (!state)
-+ if (!state) {
-+ rtnl_unlock();
- return -ENOMEM;
-+ }
- state->filter_wiphy = -1;
- ret = nl80211_dump_wiphy_parse(skb, cb, state);
- if (ret) {
-@@ -6615,12 +6619,14 @@ EXPORT_SYMBOL(cfg80211_testmode_alloc_ev
+- REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt));
+-
+- REG_WRITE(ah, AR_BEACON_PERIOD,
+- TU_TO_USEC(bs->bs_intval));
+- REG_WRITE(ah, AR_DMA_BEACON_PERIOD,
+- TU_TO_USEC(bs->bs_intval));
++ REG_WRITE(ah, AR_NEXT_TBTT_TIMER, bs->bs_nexttbtt);
++ REG_WRITE(ah, AR_BEACON_PERIOD, bs->bs_intval);
++ REG_WRITE(ah, AR_DMA_BEACON_PERIOD, bs->bs_intval);
- void cfg80211_testmode_event(struct sk_buff *skb, gfp_t gfp)
- {
-+ struct cfg80211_registered_device *rdev = ((void **)skb->cb)[0];
- void *hdr = ((void **)skb->cb)[1];
- struct nlattr *data = ((void **)skb->cb)[2];
+ REGWRITE_BUFFER_FLUSH(ah);
- nla_nest_end(skb, data);
- genlmsg_end(skb, hdr);
-- genlmsg_multicast(skb, 0, nl80211_testmode_mcgrp.id, gfp);
-+ genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), skb, 0,
-+ nl80211_testmode_mcgrp.id, gfp);
- }
- EXPORT_SYMBOL(cfg80211_testmode_event);
- #endif
-@@ -7593,12 +7599,11 @@ static int nl80211_send_wowlan_patterns(
- if (!nl_pat)
- return -ENOBUFS;
- pat_len = wowlan->patterns[i].pattern_len;
-- if (nla_put(msg, NL80211_WOWLAN_PKTPAT_MASK,
-- DIV_ROUND_UP(pat_len, 8),
-+ if (nla_put(msg, NL80211_PKTPAT_MASK, DIV_ROUND_UP(pat_len, 8),
- wowlan->patterns[i].mask) ||
-- nla_put(msg, NL80211_WOWLAN_PKTPAT_PATTERN,
-- pat_len, wowlan->patterns[i].pattern) ||
-- nla_put_u32(msg, NL80211_WOWLAN_PKTPAT_OFFSET,
-+ nla_put(msg, NL80211_PKTPAT_PATTERN, pat_len,
-+ wowlan->patterns[i].pattern) ||
-+ nla_put_u32(msg, NL80211_PKTPAT_OFFSET,
- wowlan->patterns[i].pkt_offset))
- return -ENOBUFS;
- nla_nest_end(msg, nl_pat);
-@@ -7939,7 +7944,7 @@ static int nl80211_set_wowlan(struct sk_
- struct nlattr *pat;
- int n_patterns = 0;
- int rem, pat_len, mask_len, pkt_offset;
-- struct nlattr *pat_tb[NUM_NL80211_WOWLAN_PKTPAT];
-+ struct nlattr *pat_tb[NUM_NL80211_PKTPAT];
-
- nla_for_each_nested(pat, tb[NL80211_WOWLAN_TRIG_PKT_PATTERN],
- rem)
-@@ -7958,26 +7963,25 @@ static int nl80211_set_wowlan(struct sk_
-
- nla_for_each_nested(pat, tb[NL80211_WOWLAN_TRIG_PKT_PATTERN],
- rem) {
-- nla_parse(pat_tb, MAX_NL80211_WOWLAN_PKTPAT,
-- nla_data(pat), nla_len(pat), NULL);
-+ nla_parse(pat_tb, MAX_NL80211_PKTPAT, nla_data(pat),
-+ nla_len(pat), NULL);
- err = -EINVAL;
-- if (!pat_tb[NL80211_WOWLAN_PKTPAT_MASK] ||
-- !pat_tb[NL80211_WOWLAN_PKTPAT_PATTERN])
-+ if (!pat_tb[NL80211_PKTPAT_MASK] ||
-+ !pat_tb[NL80211_PKTPAT_PATTERN])
- goto error;
-- pat_len = nla_len(pat_tb[NL80211_WOWLAN_PKTPAT_PATTERN]);
-+ pat_len = nla_len(pat_tb[NL80211_PKTPAT_PATTERN]);
- mask_len = DIV_ROUND_UP(pat_len, 8);
-- if (nla_len(pat_tb[NL80211_WOWLAN_PKTPAT_MASK]) !=
-- mask_len)
-+ if (nla_len(pat_tb[NL80211_PKTPAT_MASK]) != mask_len)
- goto error;
- if (pat_len > wowlan->pattern_max_len ||
- pat_len < wowlan->pattern_min_len)
- goto error;
-
-- if (!pat_tb[NL80211_WOWLAN_PKTPAT_OFFSET])
-+ if (!pat_tb[NL80211_PKTPAT_OFFSET])
- pkt_offset = 0;
- else
- pkt_offset = nla_get_u32(
-- pat_tb[NL80211_WOWLAN_PKTPAT_OFFSET]);
-+ pat_tb[NL80211_PKTPAT_OFFSET]);
- if (pkt_offset > wowlan->max_pkt_offset)
- goto error;
- new_triggers.patterns[i].pkt_offset = pkt_offset;
-@@ -7991,11 +7995,11 @@ static int nl80211_set_wowlan(struct sk_
- new_triggers.patterns[i].pattern =
- new_triggers.patterns[i].mask + mask_len;
- memcpy(new_triggers.patterns[i].mask,
-- nla_data(pat_tb[NL80211_WOWLAN_PKTPAT_MASK]),
-+ nla_data(pat_tb[NL80211_PKTPAT_MASK]),
- mask_len);
- new_triggers.patterns[i].pattern_len = pat_len;
- memcpy(new_triggers.patterns[i].pattern,
-- nla_data(pat_tb[NL80211_WOWLAN_PKTPAT_PATTERN]),
-+ nla_data(pat_tb[NL80211_PKTPAT_PATTERN]),
- pat_len);
- i++;
- }
-@@ -10066,7 +10070,8 @@ void cfg80211_mgmt_tx_status(struct wire
+@@ -2334,9 +2290,8 @@ void ath9k_hw_set_sta_beacon_timers(stru
- genlmsg_end(msg, hdr);
+ ENABLE_REGWRITE_BUFFER(ah);
-- genlmsg_multicast(msg, 0, nl80211_mlme_mcgrp.id, gfp);
-+ genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), msg, 0,
-+ nl80211_mlme_mcgrp.id, gfp);
- return;
+- REG_WRITE(ah, AR_NEXT_DTIM,
+- TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
+- REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(nextTbtt - SLEEP_SLOP));
++ REG_WRITE(ah, AR_NEXT_DTIM, bs->bs_nextdtim - SLEEP_SLOP);
++ REG_WRITE(ah, AR_NEXT_TIM, nextTbtt - SLEEP_SLOP);
- nla_put_failure:
---- a/net/wireless/reg.c
-+++ b/net/wireless/reg.c
-@@ -2247,10 +2247,13 @@ int reg_device_uevent(struct device *dev
-
- void wiphy_regulatory_register(struct wiphy *wiphy)
- {
-+ struct regulatory_request *lr;
-+
- if (!reg_dev_ignore_cell_hint(wiphy))
- reg_num_devs_support_basehint++;
-
-- wiphy_update_regulatory(wiphy, NL80211_REGDOM_SET_BY_CORE);
-+ lr = get_last_request();
-+ wiphy_update_regulatory(wiphy, lr->initiator);
- }
-
- void wiphy_regulatory_deregister(struct wiphy *wiphy)
-@@ -2279,7 +2282,9 @@ void wiphy_regulatory_deregister(struct
- static void reg_timeout_work(struct work_struct *work)
- {
- REG_DBG_PRINT("Timeout while waiting for CRDA to reply, restoring regulatory settings\n");
-+ rtnl_lock();
- restore_regulatory_settings(true);
-+ rtnl_unlock();
- }
-
- int __init regulatory_init(void)
---- a/net/wireless/sme.c
-+++ b/net/wireless/sme.c
-@@ -34,8 +34,10 @@ struct cfg80211_conn {
- CFG80211_CONN_SCAN_AGAIN,
- CFG80211_CONN_AUTHENTICATE_NEXT,
- CFG80211_CONN_AUTHENTICATING,
-+ CFG80211_CONN_AUTH_FAILED,
- CFG80211_CONN_ASSOCIATE_NEXT,
- CFG80211_CONN_ASSOCIATING,
-+ CFG80211_CONN_ASSOC_FAILED,
- CFG80211_CONN_DEAUTH,
- CFG80211_CONN_CONNECTED,
- } state;
-@@ -164,6 +166,8 @@ static int cfg80211_conn_do_work(struct
- NULL, 0,
- params->key, params->key_len,
- params->key_idx, NULL, 0);
-+ case CFG80211_CONN_AUTH_FAILED:
-+ return -ENOTCONN;
- case CFG80211_CONN_ASSOCIATE_NEXT:
- BUG_ON(!rdev->ops->assoc);
- wdev->conn->state = CFG80211_CONN_ASSOCIATING;
-@@ -188,10 +192,17 @@ static int cfg80211_conn_do_work(struct
- WLAN_REASON_DEAUTH_LEAVING,
- false);
- return err;
-+ case CFG80211_CONN_ASSOC_FAILED:
-+ cfg80211_mlme_deauth(rdev, wdev->netdev, params->bssid,
-+ NULL, 0,
-+ WLAN_REASON_DEAUTH_LEAVING, false);
-+ return -ENOTCONN;
- case CFG80211_CONN_DEAUTH:
- cfg80211_mlme_deauth(rdev, wdev->netdev, params->bssid,
- NULL, 0,
- WLAN_REASON_DEAUTH_LEAVING, false);
-+ /* free directly, disconnected event already sent */
-+ cfg80211_sme_free(wdev);
- return 0;
- default:
- return 0;
-@@ -371,7 +382,7 @@ bool cfg80211_sme_rx_assoc_resp(struct w
- return true;
- }
+ REG_WRITE(ah, AR_SLEEP1,
+ SM((CAB_TIMEOUT_VAL << 3), AR_SLEEP1_CAB_TIMEOUT)
+@@ -2350,8 +2305,8 @@ void ath9k_hw_set_sta_beacon_timers(stru
+ REG_WRITE(ah, AR_SLEEP2,
+ SM(beacontimeout, AR_SLEEP2_BEACON_TIMEOUT));
-- wdev->conn->state = CFG80211_CONN_DEAUTH;
-+ wdev->conn->state = CFG80211_CONN_ASSOC_FAILED;
- schedule_work(&rdev->conn_work);
- return false;
- }
-@@ -383,7 +394,13 @@ void cfg80211_sme_deauth(struct wireless
+- REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));
+- REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
++ REG_WRITE(ah, AR_TIM_PERIOD, beaconintval);
++ REG_WRITE(ah, AR_DTIM_PERIOD, dtimperiod);
+
+ REGWRITE_BUFFER_FLUSH(ah);
+
+@@ -2987,20 +2942,6 @@ static const struct ath_gen_timer_config
+
+ /* HW generic timer primitives */
- void cfg80211_sme_auth_timeout(struct wireless_dev *wdev)
+-/* compute and clear index of rightmost 1 */
+-static u32 rightmost_index(struct ath_gen_timer_table *timer_table, u32 *mask)
+-{
+- u32 b;
+-
+- b = *mask;
+- b &= (0-b);
+- *mask &= ~b;
+- b *= debruijn32;
+- b >>= 27;
+-
+- return timer_table->gen_timer_index[b];
+-}
+-
+ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
{
-- cfg80211_sme_free(wdev);
-+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
-+
-+ if (!wdev->conn)
-+ return;
+ return REG_READ(ah, AR_TSF_L32);
+@@ -3016,6 +2957,10 @@ struct ath_gen_timer *ath_gen_timer_allo
+ struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
+ struct ath_gen_timer *timer;
+
++ if ((timer_index < AR_FIRST_NDP_TIMER) ||
++ (timer_index >= ATH_MAX_GEN_TIMER))
++ return NULL;
+
-+ wdev->conn->state = CFG80211_CONN_AUTH_FAILED;
-+ schedule_work(&rdev->conn_work);
- }
+ timer = kzalloc(sizeof(struct ath_gen_timer), GFP_KERNEL);
+ if (timer == NULL)
+ return NULL;
+@@ -3033,23 +2978,13 @@ EXPORT_SYMBOL(ath_gen_timer_alloc);
+
+ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
+ struct ath_gen_timer *timer,
+- u32 trig_timeout,
++ u32 timer_next,
+ u32 timer_period)
+ {
+ struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
+- u32 tsf, timer_next;
+-
+- BUG_ON(!timer_period);
+-
+- set_bit(timer->index, &timer_table->timer_mask.timer_bits);
+-
+- tsf = ath9k_hw_gettsf32(ah);
++ u32 mask = 0;
- void cfg80211_sme_disassoc(struct wireless_dev *wdev)
-@@ -399,7 +416,13 @@ void cfg80211_sme_disassoc(struct wirele
+- timer_next = tsf + trig_timeout;
+-
+- ath_dbg(ath9k_hw_common(ah), BTCOEX,
+- "current tsf %x period %x timer_next %x\n",
+- tsf, timer_period, timer_next);
++ timer_table->timer_mask |= BIT(timer->index);
- void cfg80211_sme_assoc_timeout(struct wireless_dev *wdev)
- {
-- cfg80211_sme_disassoc(wdev);
-+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
+ /*
+ * Program generic timer registers
+@@ -3075,10 +3010,19 @@ void ath9k_hw_gen_timer_start(struct ath
+ (1 << timer->index));
+ }
+
+- /* Enable both trigger and thresh interrupt masks */
+- REG_SET_BIT(ah, AR_IMR_S5,
+- (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
+- SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
++ if (timer->trigger)
++ mask |= SM(AR_GENTMR_BIT(timer->index),
++ AR_IMR_S5_GENTIMER_TRIG);
++ if (timer->overflow)
++ mask |= SM(AR_GENTMR_BIT(timer->index),
++ AR_IMR_S5_GENTIMER_THRESH);
+
-+ if (!wdev->conn)
-+ return;
++ REG_SET_BIT(ah, AR_IMR_S5, mask);
+
-+ wdev->conn->state = CFG80211_CONN_ASSOC_FAILED;
-+ schedule_work(&rdev->conn_work);
- }
-
- static int cfg80211_sme_connect(struct wireless_dev *wdev,
---- a/net/mac80211/rc80211_minstrel.c
-+++ b/net/mac80211/rc80211_minstrel.c
-@@ -290,7 +290,7 @@ minstrel_get_rate(void *priv, struct iee
- struct minstrel_rate *msr, *mr;
- unsigned int ndx;
- bool mrr_capable;
-- bool prev_sample = mi->prev_sample;
-+ bool prev_sample;
- int delta;
- int sampling_ratio;
-
-@@ -314,6 +314,7 @@ minstrel_get_rate(void *priv, struct iee
- (mi->sample_count + mi->sample_deferred / 2);
-
- /* delta < 0: no sampling required */
-+ prev_sample = mi->prev_sample;
- mi->prev_sample = false;
- if (delta < 0 || (!mrr_capable && prev_sample))
- return;
---- a/drivers/net/wireless/rt2x00/rt2x00queue.c
-+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
-@@ -936,13 +936,8 @@ void rt2x00queue_index_inc(struct queue_
- spin_unlock_irqrestore(&queue->index_lock, irqflags);
++ if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
++ ah->imask |= ATH9K_INT_GENTIMER;
++ ath9k_hw_set_interrupts(ah);
++ }
}
+ EXPORT_SYMBOL(ath9k_hw_gen_timer_start);
--void rt2x00queue_pause_queue(struct data_queue *queue)
-+void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
+@@ -3086,11 +3030,6 @@ void ath9k_hw_gen_timer_stop(struct ath_
{
-- if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
-- !test_bit(QUEUE_STARTED, &queue->flags) ||
-- test_and_set_bit(QUEUE_PAUSED, &queue->flags))
+ struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
+
+- if ((timer->index < AR_FIRST_NDP_TIMER) ||
+- (timer->index >= ATH_MAX_GEN_TIMER)) {
- return;
+- }
-
- switch (queue->qid) {
- case QID_AC_VO:
- case QID_AC_VI:
-@@ -958,6 +953,15 @@ void rt2x00queue_pause_queue(struct data
- break;
- }
- }
-+void rt2x00queue_pause_queue(struct data_queue *queue)
-+{
-+ if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
-+ !test_bit(QUEUE_STARTED, &queue->flags) ||
-+ test_and_set_bit(QUEUE_PAUSED, &queue->flags))
-+ return;
+ /* Clear generic timer enable bits. */
+ REG_CLR_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
+ gen_tmr_configuration[timer->index].mode_mask);
+@@ -3110,7 +3049,12 @@ void ath9k_hw_gen_timer_stop(struct ath_
+ (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
+ SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
+
+- clear_bit(timer->index, &timer_table->timer_mask.timer_bits);
++ timer_table->timer_mask &= ~BIT(timer->index);
+
-+ rt2x00queue_pause_queue_nocheck(queue);
-+}
- EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
++ if (timer_table->timer_mask == 0) {
++ ah->imask &= ~ATH9K_INT_GENTIMER;
++ ath9k_hw_set_interrupts(ah);
++ }
+ }
+ EXPORT_SYMBOL(ath9k_hw_gen_timer_stop);
- void rt2x00queue_unpause_queue(struct data_queue *queue)
-@@ -1019,7 +1023,7 @@ void rt2x00queue_stop_queue(struct data_
- return;
+@@ -3131,32 +3075,32 @@ void ath_gen_timer_isr(struct ath_hw *ah
+ {
+ struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
+ struct ath_gen_timer *timer;
+- struct ath_common *common = ath9k_hw_common(ah);
+- u32 trigger_mask, thresh_mask, index;
++ unsigned long trigger_mask, thresh_mask;
++ unsigned int index;
+
+ /* get hardware generic timer interrupt status */
+ trigger_mask = ah->intr_gen_timer_trigger;
+ thresh_mask = ah->intr_gen_timer_thresh;
+- trigger_mask &= timer_table->timer_mask.val;
+- thresh_mask &= timer_table->timer_mask.val;
++ trigger_mask &= timer_table->timer_mask;
++ thresh_mask &= timer_table->timer_mask;
+
+- trigger_mask &= ~thresh_mask;
+-
+- while (thresh_mask) {
+- index = rightmost_index(timer_table, &thresh_mask);
++ for_each_set_bit(index, &thresh_mask, ARRAY_SIZE(timer_table->timers)) {
+ timer = timer_table->timers[index];
+- BUG_ON(!timer);
+- ath_dbg(common, BTCOEX, "TSF overflow for Gen timer %d\n",
+- index);
++ if (!timer)
++ continue;
++ if (!timer->overflow)
++ continue;
++
++ trigger_mask &= ~BIT(index);
+ timer->overflow(timer->arg);
}
-- rt2x00queue_pause_queue(queue);
-+ rt2x00queue_pause_queue_nocheck(queue);
-
- queue->rt2x00dev->ops->lib->stop_queue(queue);
-
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -31,10 +31,12 @@
- #include "led.h"
-
- #define IEEE80211_AUTH_TIMEOUT (HZ / 5)
-+#define IEEE80211_AUTH_TIMEOUT_LONG (HZ / 2)
- #define IEEE80211_AUTH_TIMEOUT_SHORT (HZ / 10)
- #define IEEE80211_AUTH_MAX_TRIES 3
- #define IEEE80211_AUTH_WAIT_ASSOC (HZ * 5)
- #define IEEE80211_ASSOC_TIMEOUT (HZ / 5)
-+#define IEEE80211_ASSOC_TIMEOUT_LONG (HZ / 2)
- #define IEEE80211_ASSOC_TIMEOUT_SHORT (HZ / 10)
- #define IEEE80211_ASSOC_MAX_TRIES 3
-
-@@ -209,8 +211,9 @@ ieee80211_determine_chantype(struct ieee
- struct ieee80211_channel *channel,
- const struct ieee80211_ht_operation *ht_oper,
- const struct ieee80211_vht_operation *vht_oper,
-- struct cfg80211_chan_def *chandef, bool verbose)
-+ struct cfg80211_chan_def *chandef, bool tracking)
- {
-+ struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;
- struct cfg80211_chan_def vht_chandef;
- u32 ht_cfreq, ret;
-
-@@ -229,7 +232,7 @@ ieee80211_determine_chantype(struct ieee
- ht_cfreq = ieee80211_channel_to_frequency(ht_oper->primary_chan,
- channel->band);
- /* check that channel matches the right operating channel */
-- if (channel->center_freq != ht_cfreq) {
-+ if (!tracking && channel->center_freq != ht_cfreq) {
- /*
- * It's possible that some APs are confused here;
- * Netgear WNDR3700 sometimes reports 4 higher than
-@@ -237,11 +240,10 @@ ieee80211_determine_chantype(struct ieee
- * since we look at probe response/beacon data here
- * it should be OK.
- */
-- if (verbose)
-- sdata_info(sdata,
-- "Wrong control channel: center-freq: %d ht-cfreq: %d ht->primary_chan: %d band: %d - Disabling HT\n",
-- channel->center_freq, ht_cfreq,
-- ht_oper->primary_chan, channel->band);
-+ sdata_info(sdata,
-+ "Wrong control channel: center-freq: %d ht-cfreq: %d ht->primary_chan: %d band: %d - Disabling HT\n",
-+ channel->center_freq, ht_cfreq,
-+ ht_oper->primary_chan, channel->band);
- ret = IEEE80211_STA_DISABLE_HT | IEEE80211_STA_DISABLE_VHT;
- goto out;
+- while (trigger_mask) {
+- index = rightmost_index(timer_table, &trigger_mask);
++ for_each_set_bit(index, &trigger_mask, ARRAY_SIZE(timer_table->timers)) {
+ timer = timer_table->timers[index];
+- BUG_ON(!timer);
+- ath_dbg(common, BTCOEX,
+- "Gen timer[%d] trigger\n", index);
++ if (!timer)
++ continue;
++ if (!timer->trigger)
++ continue;
+ timer->trigger(timer->arg);
}
-@@ -295,7 +297,7 @@ ieee80211_determine_chantype(struct ieee
- channel->band);
- break;
- default:
-- if (verbose)
-+ if (!(ifmgd->flags & IEEE80211_STA_DISABLE_VHT))
- sdata_info(sdata,
- "AP VHT operation IE has invalid channel width (%d), disable VHT\n",
- vht_oper->chan_width);
-@@ -304,7 +306,7 @@ ieee80211_determine_chantype(struct ieee
- }
-
- if (!cfg80211_chandef_valid(&vht_chandef)) {
-- if (verbose)
-+ if (!(ifmgd->flags & IEEE80211_STA_DISABLE_VHT))
- sdata_info(sdata,
- "AP VHT information is invalid, disable VHT\n");
- ret = IEEE80211_STA_DISABLE_VHT;
-@@ -317,7 +319,7 @@ ieee80211_determine_chantype(struct ieee
- }
-
- if (!cfg80211_chandef_compatible(chandef, &vht_chandef)) {
-- if (verbose)
-+ if (!(ifmgd->flags & IEEE80211_STA_DISABLE_VHT))
- sdata_info(sdata,
- "AP VHT information doesn't match HT, disable VHT\n");
- ret = IEEE80211_STA_DISABLE_VHT;
-@@ -333,18 +335,27 @@ out:
- if (ret & IEEE80211_STA_DISABLE_VHT)
- vht_chandef = *chandef;
+ }
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -168,7 +168,7 @@
+ #define CAB_TIMEOUT_VAL 10
+ #define BEACON_TIMEOUT_VAL 10
+ #define MIN_BEACON_TIMEOUT_VAL 1
+-#define SLEEP_SLOP 3
++#define SLEEP_SLOP TU_TO_USEC(3)
+
+ #define INIT_CONFIG_STATUS 0x00000000
+ #define INIT_RSSI_THR 0x00000700
+@@ -280,11 +280,8 @@ struct ath9k_hw_capabilities {
+ struct ath9k_ops_config {
+ int dma_beacon_response_time;
+ int sw_beacon_response_time;
+- int additional_swba_backoff;
+ int ack_6mb;
+ u32 cwm_ignore_extcca;
+- bool pcieSerDesWrite;
+- u8 pcie_clock_req;
+ u32 pcie_waen;
+ u8 analog_shiftreg;
+ u32 ofdm_trig_low;
+@@ -295,18 +292,11 @@ struct ath9k_ops_config {
+ int serialize_regmode;
+ bool rx_intr_mitigation;
+ bool tx_intr_mitigation;
+-#define SPUR_DISABLE 0
+-#define SPUR_ENABLE_IOCTL 1
+-#define SPUR_ENABLE_EEPROM 2
+-#define AR_SPUR_5413_1 1640
+-#define AR_SPUR_5413_2 1200
+ #define AR_NO_SPUR 0x8000
+ #define AR_BASE_FREQ_2GHZ 2300
+ #define AR_BASE_FREQ_5GHZ 4900
+ #define AR_SPUR_FEEQ_BOUND_HT40 19
+ #define AR_SPUR_FEEQ_BOUND_HT20 10
+- int spurmode;
+- u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
+ u8 max_txtrig_level;
+ u16 ani_poll_interval; /* ANI poll interval in ms */
+
+@@ -316,6 +306,8 @@ struct ath9k_ops_config {
+ u32 ant_ctrl_comm2g_switch_enable;
+ bool xatten_margin_cfg;
+ bool alt_mingainidx;
++ bool no_pll_pwrsave;
++ bool tx_gain_buffalo;
+ };
-+ /*
-+ * Ignore the DISABLED flag when we're already connected and only
-+ * tracking the APs beacon for bandwidth changes - otherwise we
-+ * might get disconnected here if we connect to an AP, update our
-+ * regulatory information based on the AP's country IE and the
-+ * information we have is wrong/outdated and disables the channel
-+ * that we're actually using for the connection to the AP.
-+ */
- while (!cfg80211_chandef_usable(sdata->local->hw.wiphy, chandef,
-- IEEE80211_CHAN_DISABLED)) {
-+ tracking ? 0 :
-+ IEEE80211_CHAN_DISABLED)) {
- if (WARN_ON(chandef->width == NL80211_CHAN_WIDTH_20_NOHT)) {
- ret = IEEE80211_STA_DISABLE_HT |
- IEEE80211_STA_DISABLE_VHT;
-- goto out;
-+ break;
- }
+ enum ath9k_int {
+@@ -459,10 +451,6 @@ struct ath9k_beacon_state {
+ u32 bs_intval;
+ #define ATH9K_TSFOOR_THRESHOLD 0x00004240 /* 16k us */
+ u32 bs_dtimperiod;
+- u16 bs_cfpperiod;
+- u16 bs_cfpmaxduration;
+- u32 bs_cfpnext;
+- u16 bs_timoffset;
+ u16 bs_bmissthreshold;
+ u32 bs_sleepduration;
+ u32 bs_tsfoor_threshold;
+@@ -498,12 +486,6 @@ struct ath9k_hw_version {
+
+ #define AR_GENTMR_BIT(_index) (1 << (_index))
+
+-/*
+- * Using de Bruijin sequence to look up 1's index in a 32 bit number
+- * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001
+- */
+-#define debruijn32 0x077CB531U
+-
+ struct ath_gen_timer_configuration {
+ u32 next_addr;
+ u32 period_addr;
+@@ -519,12 +501,8 @@ struct ath_gen_timer {
+ };
- ret |= chandef_downgrade(chandef);
- }
+ struct ath_gen_timer_table {
+- u32 gen_timer_index[32];
+ struct ath_gen_timer *timers[ATH_MAX_GEN_TIMER];
+- union {
+- unsigned long timer_bits;
+- u16 val;
+- } timer_mask;
++ u16 timer_mask;
+ };
-- if (chandef->width != vht_chandef.width && verbose)
-+ if (chandef->width != vht_chandef.width && !tracking)
- sdata_info(sdata,
- "capabilities/regulatory prevented using AP HT/VHT configuration, downgraded\n");
+ struct ath_hw_antcomb_conf {
+@@ -689,7 +667,8 @@ struct ath_hw_ops {
+ struct ath9k_channel *chan,
+ u8 rxchainmask,
+ bool longcal);
+- bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
++ bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked,
++ u32 *sync_cause_p);
+ void (*set_txdesc)(struct ath_hw *ah, void *ds,
+ struct ath_tx_info *i);
+ int (*proc_txdesc)(struct ath_hw *ah, void *ds,
+@@ -785,7 +764,6 @@ struct ath_hw {
+ u32 txurn_interrupt_mask;
+ atomic_t intr_ref_cnt;
+ bool chip_fullsleep;
+- u32 atim_window;
+ u32 modes_index;
+
+ /* Calibration */
+@@ -864,6 +842,7 @@ struct ath_hw {
+ u32 gpio_mask;
+ u32 gpio_val;
+
++ struct ar5416IniArray ini_dfs;
+ struct ar5416IniArray iniModes;
+ struct ar5416IniArray iniCommon;
+ struct ar5416IniArray iniBB_RfGain;
+@@ -920,7 +899,7 @@ struct ath_hw {
+ /* Enterprise mode cap */
+ u32 ent_mode;
+
+-#ifdef CONFIG_PM_SLEEP
++#ifdef CONFIG_ATH9K_WOW
+ u32 wow_event_mask;
+ #endif
+ bool is_clk_25mhz;
+@@ -1016,13 +995,6 @@ bool ath9k_hw_check_alive(struct ath_hw
-@@ -384,7 +395,7 @@ static int ieee80211_config_bw(struct ie
+ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
- /* calculate new channel (type) based on HT/VHT operation IEs */
- flags = ieee80211_determine_chantype(sdata, sband, chan, ht_oper,
-- vht_oper, &chandef, false);
-+ vht_oper, &chandef, true);
+-#ifdef CPTCFG_ATH9K_DEBUGFS
+-void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause);
+-#else
+-static inline void ath9k_debug_sync_cause(struct ath_common *common,
+- u32 sync_cause) {}
+-#endif
+-
+ /* Generic hw timer primitives */
+ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
+ void (*trigger)(void *),
+@@ -1126,7 +1098,7 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw
+ #endif /* CPTCFG_ATH9K_BTCOEX_SUPPORT */
+
+
+-#ifdef CONFIG_PM_SLEEP
++#ifdef CONFIG_ATH9K_WOW
+ const char *ath9k_hw_wow_event_to_string(u32 wow_event);
+ void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
+ u8 *user_mask, int pattern_count,
+--- a/drivers/net/wireless/ath/ath9k/init.c
++++ b/drivers/net/wireless/ath/ath9k/init.c
+@@ -470,7 +470,6 @@ static int ath9k_init_queues(struct ath_
+
+ sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah);
+ sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
+-
+ ath_cabq_update(sc);
- /*
- * Downgrade the new channel if we associated with restricted
-@@ -3394,10 +3405,13 @@ static int ieee80211_probe_auth(struct i
-
- if (tx_flags == 0) {
- auth_data->timeout = jiffies + IEEE80211_AUTH_TIMEOUT;
-- ifmgd->auth_data->timeout_started = true;
-+ auth_data->timeout_started = true;
- run_again(sdata, auth_data->timeout);
- } else {
-- auth_data->timeout_started = false;
-+ auth_data->timeout =
-+ round_jiffies_up(jiffies + IEEE80211_AUTH_TIMEOUT_LONG);
-+ auth_data->timeout_started = true;
-+ run_again(sdata, auth_data->timeout);
- }
+ sc->tx.uapsdq = ath_txq_setup(sc, ATH9K_TX_QUEUE_UAPSD, 0);
+@@ -554,7 +553,7 @@ static void ath9k_init_misc(struct ath_s
+ sc->spec_config.fft_period = 0xF;
+ }
- return 0;
-@@ -3434,7 +3448,11 @@ static int ieee80211_do_assoc(struct iee
- assoc_data->timeout_started = true;
- run_again(sdata, assoc_data->timeout);
- } else {
-- assoc_data->timeout_started = false;
-+ assoc_data->timeout =
-+ round_jiffies_up(jiffies +
-+ IEEE80211_ASSOC_TIMEOUT_LONG);
-+ assoc_data->timeout_started = true;
-+ run_again(sdata, assoc_data->timeout);
+-static void ath9k_init_platform(struct ath_softc *sc)
++static void ath9k_init_pcoem_platform(struct ath_softc *sc)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath9k_hw_capabilities *pCap = &ah->caps;
+@@ -609,6 +608,11 @@ static void ath9k_init_platform(struct a
+ ah->config.pcie_waen = 0x0040473b;
+ ath_info(common, "Enable WAR for ASPM D3/L1\n");
}
++
++ if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
++ ah->config.no_pll_pwrsave = true;
++ ath_info(common, "Disable PLL PowerSave\n");
++ }
+ }
- return 0;
-@@ -3829,7 +3847,7 @@ static int ieee80211_prep_channel(struct
- ifmgd->flags |= ieee80211_determine_chantype(sdata, sband,
- cbss->channel,
- ht_oper, vht_oper,
-- &chandef, true);
-+ &chandef, false);
-
- sdata->needed_rx_chains = min(ieee80211_ht_vht_rx_chains(sdata, cbss),
- local->rx_chains);
---- a/net/wireless/core.c
-+++ b/net/wireless/core.c
-@@ -772,6 +772,7 @@ void cfg80211_leave(struct cfg80211_regi
- cfg80211_leave_mesh(rdev, dev);
- break;
- case NL80211_IFTYPE_AP:
-+ case NL80211_IFTYPE_P2P_GO:
- cfg80211_stop_ap(rdev, dev);
- break;
- default:
---- a/drivers/net/wireless/rtlwifi/Kconfig
-+++ b/drivers/net/wireless/rtlwifi/Kconfig
-@@ -1,29 +1,22 @@
--config RTLWIFI
-- tristate "Realtek wireless card support"
-+menuconfig RTL_CARDS
-+ tristate "Realtek rtlwifi family of devices"
- depends on m
-- depends on MAC80211
-- select BACKPORT_FW_LOADER
-- ---help---
-- This is common code for RTL8192CE/RTL8192CU/RTL8192SE/RTL8723AE
-- drivers. This module does nothing by itself - the various front-end
-- drivers need to be enabled to support any desired devices.
--
-- If you choose to build as a module, it'll be called rtlwifi.
--
--config RTLWIFI_DEBUG
-- bool "Debugging output for rtlwifi driver family"
-- depends on RTLWIFI
-+ depends on MAC80211 && (PCI || USB)
- default y
- ---help---
-- To use the module option that sets the dynamic-debugging level for,
-- the front-end driver, this parameter must be "Y". For memory-limited
-- systems, choose "N". If in doubt, choose "Y".
-+ This option will enable support for the Realtek mac80211-based
-+ wireless drivers. Drivers rtl8192ce, rtl8192cu, rtl8192se, rtl8192de,
-+ rtl8723eu, and rtl8188eu share some common code.
-+
-+if RTL_CARDS
-
- config RTL8192CE
- tristate "Realtek RTL8192CE/RTL8188CE Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && PCI
-+ depends on PCI
- select RTL8192C_COMMON
-+ select RTLWIFI
-+ select RTLWIFI_PCI
- ---help---
- This is the driver for Realtek RTL8192CE/RTL8188CE 802.11n PCIe
- wireless network adapters.
-@@ -33,7 +26,9 @@ config RTL8192CE
- config RTL8192SE
- tristate "Realtek RTL8192SE/RTL8191SE PCIe Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && PCI
-+ depends on PCI
-+ select RTLWIFI
-+ select RTLWIFI_PCI
- ---help---
- This is the driver for Realtek RTL8192SE/RTL8191SE 802.11n PCIe
- wireless network adapters.
-@@ -43,7 +38,9 @@ config RTL8192SE
- config RTL8192DE
- tristate "Realtek RTL8192DE/RTL8188DE PCIe Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && PCI
-+ depends on PCI
-+ select RTLWIFI
-+ select RTLWIFI_PCI
- ---help---
- This is the driver for Realtek RTL8192DE/RTL8188DE 802.11n PCIe
- wireless network adapters.
-@@ -53,7 +50,9 @@ config RTL8192DE
- config RTL8723AE
- tristate "Realtek RTL8723AE PCIe Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && PCI
-+ depends on PCI
-+ select RTLWIFI
-+ select RTLWIFI_PCI
- ---help---
- This is the driver for Realtek RTL8723AE 802.11n PCIe
- wireless network adapters.
-@@ -63,7 +62,9 @@ config RTL8723AE
- config RTL8188EE
- tristate "Realtek RTL8188EE Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && PCI
-+ depends on PCI
-+ select RTLWIFI
-+ select RTLWIFI_PCI
- ---help---
- This is the driver for Realtek RTL8188EE 802.11n PCIe
- wireless network adapters.
-@@ -73,7 +74,9 @@ config RTL8188EE
- config RTL8192CU
- tristate "Realtek RTL8192CU/RTL8188CU USB Wireless Network Adapter"
- depends on m
-- depends on RTLWIFI && USB
-+ depends on USB
-+ select RTLWIFI
-+ select RTLWIFI_USB
- select RTL8192C_COMMON
- ---help---
- This is the driver for Realtek RTL8192CU/RTL8188CU 802.11n USB
-@@ -81,8 +84,32 @@ config RTL8192CU
-
- If you choose to build it as a module, it will be called rtl8192cu
+ static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
+@@ -656,6 +660,27 @@ static void ath9k_eeprom_release(struct
+ release_firmware(sc->sc_ah->eeprom_blob);
+ }
-+config RTLWIFI
-+ tristate "Realtek common driver part"
-+ depends on m
-+ select BACKPORT_FW_LOADER
++static int ath9k_init_soc_platform(struct ath_softc *sc)
++{
++ struct ath9k_platform_data *pdata = sc->dev->platform_data;
++ struct ath_hw *ah = sc->sc_ah;
++ int ret = 0;
++
++ if (!pdata)
++ return 0;
+
-+config RTLWIFI_PCI
-+ depends on m
-+ tristate
++ if (pdata->eeprom_name) {
++ ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
++ if (ret)
++ return ret;
++ }
+
-+config RTLWIFI_USB
-+ depends on m
-+ tristate
++ if (pdata->tx_gain_buffalo)
++ ah->config.tx_gain_buffalo = true;
+
-+config RTLWIFI_DEBUG
-+ bool "Debugging output for rtlwifi driver family"
-+ depends on RTLWIFI
-+ default y
-+ ---help---
-+ To use the module option that sets the dynamic-debugging level for,
-+ the front-end driver, this parameter must be "Y". For memory-limited
-+ systems, choose "N". If in doubt, choose "Y".
-+
- config RTL8192C_COMMON
- tristate
- depends on m
- depends on RTL8192CE || RTL8192CU
- default m
-+
-+endif
---- a/drivers/net/wireless/rtlwifi/Makefile
-+++ b/drivers/net/wireless/rtlwifi/Makefile
-@@ -12,13 +12,11 @@ rtlwifi-objs := \
-
- rtl8192c_common-objs += \
-
--ifneq ($(CONFIG_PCI),)
--rtlwifi-objs += pci.o
--endif
-+obj-$(CPTCFG_RTLWIFI_PCI) += rtl_pci.o
-+rtl_pci-objs := pci.o
-
--ifneq ($(CONFIG_USB),)
--rtlwifi-objs += usb.o
--endif
-+obj-$(CPTCFG_RTLWIFI_USB) += rtl_usb.o
-+rtl_usb-objs := usb.o
-
- obj-$(CPTCFG_RTL8192C_COMMON) += rtl8192c/
- obj-$(CPTCFG_RTL8192CE) += rtl8192ce/
---- a/drivers/net/wireless/rtlwifi/base.c
-+++ b/drivers/net/wireless/rtlwifi/base.c
-@@ -173,6 +173,7 @@ u8 rtl_tid_to_ac(u8 tid)
++ return ret;
++}
++
+ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
+ const struct ath_bus_ops *bus_ops)
{
- return tid_to_ac[tid];
- }
-+EXPORT_SYMBOL_GPL(rtl_tid_to_ac);
+@@ -676,13 +701,13 @@ static int ath9k_init_softc(u16 devid, s
+ ah->reg_ops.read = ath9k_ioread32;
+ ah->reg_ops.write = ath9k_iowrite32;
+ ah->reg_ops.rmw = ath9k_reg_rmw;
+- atomic_set(&ah->intr_ref_cnt, -1);
+ sc->sc_ah = ah;
+ pCap = &ah->caps;
+
+ common = ath9k_hw_common(ah);
+ sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
+ sc->tx99_power = MAX_RATE_POWER + 1;
++ init_waitqueue_head(&sc->tx_wait);
+
+ if (!pdata) {
+ ah->ah_flags |= AH_USE_EEPROM;
+@@ -708,7 +733,11 @@ static int ath9k_init_softc(u16 devid, s
+ /*
+ * Platform quirks.
+ */
+- ath9k_init_platform(sc);
++ ath9k_init_pcoem_platform(sc);
++
++ ret = ath9k_init_soc_platform(sc);
++ if (ret)
++ return ret;
- static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
- struct ieee80211_sta_ht_cap *ht_cap)
-@@ -407,6 +408,7 @@ void rtl_deinit_deferred_work(struct iee
- cancel_delayed_work(&rtlpriv->works.ps_rfon_wq);
- cancel_delayed_work(&rtlpriv->works.fwevt_wq);
- }
-+EXPORT_SYMBOL_GPL(rtl_deinit_deferred_work);
+ /*
+ * Enable WLAN/BT RX Antenna diversity only when:
+@@ -722,7 +751,6 @@ static int ath9k_init_softc(u16 devid, s
+ common->bt_ant_diversity = 1;
- void rtl_init_rfkill(struct ieee80211_hw *hw)
- {
-@@ -440,6 +442,7 @@ void rtl_deinit_rfkill(struct ieee80211_
- {
- wiphy_rfkill_stop_polling(hw->wiphy);
- }
-+EXPORT_SYMBOL_GPL(rtl_deinit_rfkill);
+ spin_lock_init(&common->cc_lock);
+-
+ spin_lock_init(&sc->sc_serial_rw);
+ spin_lock_init(&sc->sc_pm_lock);
+ mutex_init(&sc->mutex);
+@@ -730,6 +758,7 @@ static int ath9k_init_softc(u16 devid, s
+ tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
+ (unsigned long)sc);
+
++ setup_timer(&sc->sleep_timer, ath_ps_full_sleep, (unsigned long)sc);
+ INIT_WORK(&sc->hw_reset_work, ath_reset_work);
+ INIT_WORK(&sc->hw_check_work, ath_hw_check);
+ INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
+@@ -743,12 +772,6 @@ static int ath9k_init_softc(u16 devid, s
+ ath_read_cachesize(common, &csz);
+ common->cachelsz = csz << 2; /* convert to bytes */
+
+- if (pdata && pdata->eeprom_name) {
+- ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
+- if (ret)
+- return ret;
+- }
+-
+ /* Initializes the hardware for all supported chipsets */
+ ret = ath9k_hw_init(ah);
+ if (ret)
+@@ -845,7 +868,8 @@ static const struct ieee80211_iface_limi
+ };
- int rtl_init_core(struct ieee80211_hw *hw)
- {
-@@ -490,10 +493,12 @@ int rtl_init_core(struct ieee80211_hw *h
+ static const struct ieee80211_iface_limit if_dfs_limits[] = {
+- { .max = 1, .types = BIT(NL80211_IFTYPE_AP) },
++ { .max = 1, .types = BIT(NL80211_IFTYPE_AP) |
++ BIT(NL80211_IFTYPE_ADHOC) },
+ };
- return 0;
- }
-+EXPORT_SYMBOL_GPL(rtl_init_core);
+ static const struct ieee80211_iface_combination if_comb[] = {
+@@ -862,21 +886,12 @@ static const struct ieee80211_iface_comb
+ .max_interfaces = 1,
+ .num_different_channels = 1,
+ .beacon_int_infra_match = true,
+- .radar_detect_widths = BIT(NL80211_CHAN_NO_HT) |
+- BIT(NL80211_CHAN_HT20),
++ .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
++ BIT(NL80211_CHAN_WIDTH_20),
+ }
+ };
- void rtl_deinit_core(struct ieee80211_hw *hw)
+-#ifdef CONFIG_PM
+-static const struct wiphy_wowlan_support ath9k_wowlan_support = {
+- .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
+- .n_patterns = MAX_NUM_USER_PATTERN,
+- .pattern_min_len = 1,
+- .pattern_max_len = MAX_PATTERN_SIZE,
+-};
+-#endif
+-
+-void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
++static void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
{
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -925,16 +940,6 @@ void ath9k_set_hw_capab(struct ath_softc
+ hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ;
+ hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
+
+-#ifdef CONFIG_PM_SLEEP
+- if ((ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
+- (sc->driver_data & ATH9K_PCI_WOW) &&
+- device_can_wakeup(sc->dev))
+- hw->wiphy->wowlan = &ath9k_wowlan_support;
+-
+- atomic_set(&sc->wow_sleep_proc_intr, -1);
+- atomic_set(&sc->wow_got_bmiss_intr, -1);
+-#endif
+-
+ hw->queues = 4;
+ hw->max_rates = 4;
+ hw->channel_change_time = 5000;
+@@ -960,6 +965,7 @@ void ath9k_set_hw_capab(struct ath_softc
+ hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
+ &sc->sbands[IEEE80211_BAND_5GHZ];
+
++ ath9k_init_wow(hw);
+ ath9k_reload_chainmask_settings(sc);
+
+ SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
+@@ -1058,6 +1064,7 @@ static void ath9k_deinit_softc(struct at
+ if (ATH_TXQ_SETUP(sc, i))
+ ath_tx_cleanupq(sc, &sc->tx.txq[i]);
+
++ del_timer_sync(&sc->sleep_timer);
+ ath9k_hw_deinit(sc->sc_ah);
+ if (sc->dfs_detector != NULL)
+ sc->dfs_detector->exit(sc->dfs_detector);
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -82,6 +82,22 @@ static bool ath9k_setpower(struct ath_so
+ return ret;
}
-+EXPORT_SYMBOL_GPL(rtl_deinit_core);
- void rtl_init_rx_config(struct ieee80211_hw *hw)
++void ath_ps_full_sleep(unsigned long data)
++{
++ struct ath_softc *sc = (struct ath_softc *) data;
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ bool reset;
++
++ spin_lock(&common->cc_lock);
++ ath_hw_cycle_counters_update(common);
++ spin_unlock(&common->cc_lock);
++
++ ath9k_hw_setrxabort(sc->sc_ah, 1);
++ ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
++
++ ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
++}
++
+ void ath9k_ps_wakeup(struct ath_softc *sc)
{
-@@ -502,6 +507,7 @@ void rtl_init_rx_config(struct ieee80211
-
- rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *) (&mac->rx_conf));
- }
-+EXPORT_SYMBOL_GPL(rtl_init_rx_config);
-
- /*********************************************************
- *
-@@ -880,6 +886,7 @@ bool rtl_tx_mgmt_proc(struct ieee80211_h
-
- return true;
- }
-+EXPORT_SYMBOL_GPL(rtl_tx_mgmt_proc);
-
- void rtl_get_tcb_desc(struct ieee80211_hw *hw,
- struct ieee80211_tx_info *info,
-@@ -1053,6 +1060,7 @@ bool rtl_action_proc(struct ieee80211_hw
-
- return true;
- }
-+EXPORT_SYMBOL_GPL(rtl_action_proc);
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+@@ -92,6 +108,7 @@ void ath9k_ps_wakeup(struct ath_softc *s
+ if (++sc->ps_usecount != 1)
+ goto unlock;
- /*should call before software enc*/
- u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
-@@ -1126,6 +1134,7 @@ u8 rtl_is_special_data(struct ieee80211_
++ del_timer_sync(&sc->sleep_timer);
+ power_mode = sc->sc_ah->power_mode;
+ ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
- return false;
+@@ -117,17 +134,17 @@ void ath9k_ps_restore(struct ath_softc *
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ enum ath9k_power_mode mode;
+ unsigned long flags;
+- bool reset;
+
+ spin_lock_irqsave(&sc->sc_pm_lock, flags);
+ if (--sc->ps_usecount != 0)
+ goto unlock;
+
+ if (sc->ps_idle) {
+- ath9k_hw_setrxabort(sc->sc_ah, 1);
+- ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
+- mode = ATH9K_PM_FULL_SLEEP;
+- } else if (sc->ps_enabled &&
++ mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
++ goto unlock;
++ }
++
++ if (sc->ps_enabled &&
+ !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
+ PS_WAIT_FOR_CAB |
+ PS_WAIT_FOR_PSPOLL_DATA |
+@@ -163,13 +180,13 @@ static void __ath_cancel_work(struct ath
+ #endif
}
-+EXPORT_SYMBOL_GPL(rtl_is_special_data);
- /*********************************************************
- *
-@@ -1301,6 +1310,7 @@ void rtl_beacon_statistic(struct ieee802
-
- rtlpriv->link_info.bcn_rx_inperiod++;
+-static void ath_cancel_work(struct ath_softc *sc)
++void ath_cancel_work(struct ath_softc *sc)
+ {
+ __ath_cancel_work(sc);
+ cancel_work_sync(&sc->hw_reset_work);
}
-+EXPORT_SYMBOL_GPL(rtl_beacon_statistic);
- void rtl_watchdog_wq_callback(void *data)
+-static void ath_restart_work(struct ath_softc *sc)
++void ath_restart_work(struct ath_softc *sc)
{
-@@ -1794,6 +1804,7 @@ void rtl_recognize_peer(struct ieee80211
+ ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
- mac->vendor = vendor;
- }
-+EXPORT_SYMBOL_GPL(rtl_recognize_peer);
+@@ -487,8 +504,13 @@ void ath9k_tasklet(unsigned long data)
+ ath_tx_edma_tasklet(sc);
+ else
+ ath_tx_tasklet(sc);
++
++ wake_up(&sc->tx_wait);
+ }
- /*********************************************************
- *
-@@ -1850,6 +1861,7 @@ struct attribute_group rtl_attribute_gro
- .name = "rtlsysfs",
- .attrs = rtl_sysfs_entries,
- };
-+EXPORT_SYMBOL_GPL(rtl_attribute_group);
++ if (status & ATH9K_INT_GENTIMER)
++ ath_gen_timer_isr(sc->sc_ah);
++
+ ath9k_btcoex_handle_interrupt(sc, status);
- MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
- MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
-@@ -1857,7 +1869,8 @@ MODULE_AUTHOR("Larry Finger <Larry.FInge
- MODULE_LICENSE("GPL");
- MODULE_DESCRIPTION("Realtek 802.11n PCI wireless core");
+ /* re-enable hardware interrupt */
+@@ -519,6 +541,7 @@ irqreturn_t ath_isr(int irq, void *dev)
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ enum ath9k_int status;
++ u32 sync_cause;
+ bool sched = false;
--struct rtl_global_var global_var = {};
-+struct rtl_global_var rtl_global_var = {};
-+EXPORT_SYMBOL_GPL(rtl_global_var);
+ /*
+@@ -545,7 +568,8 @@ irqreturn_t ath_isr(int irq, void *dev)
+ * bits we haven't explicitly enabled so we mask the
+ * value to insure we only process bits we requested.
+ */
+- ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
++ ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
++ ath9k_debug_sync_cause(sc, sync_cause);
+ status &= ah->imask; /* discard unasked-for bits */
- static int __init rtl_core_module_init(void)
- {
-@@ -1865,8 +1878,8 @@ static int __init rtl_core_module_init(v
- pr_err("Unable to register rtl_rc, use default RC !!\n");
+ /*
+@@ -579,7 +603,8 @@ irqreturn_t ath_isr(int irq, void *dev)
- /* init some global vars */
-- INIT_LIST_HEAD(&global_var.glb_priv_list);
-- spin_lock_init(&global_var.glb_list_lock);
-+ INIT_LIST_HEAD(&rtl_global_var.glb_priv_list);
-+ spin_lock_init(&rtl_global_var.glb_list_lock);
+ goto chip_reset;
+ }
+-#ifdef CONFIG_PM_SLEEP
++
++#ifdef CONFIG_ATH9K_WOW
+ if (status & ATH9K_INT_BMISS) {
+ if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
+ ath_dbg(common, ANY, "during WoW we got a BMISS\n");
+@@ -588,6 +613,8 @@ irqreturn_t ath_isr(int irq, void *dev)
+ }
+ }
+ #endif
++
++
+ if (status & ATH9K_INT_SWBA)
+ tasklet_schedule(&sc->bcon_tasklet);
- return 0;
+@@ -627,7 +654,7 @@ chip_reset:
+ #undef SCHED_INTR
}
---- a/drivers/net/wireless/rtlwifi/base.h
-+++ b/drivers/net/wireless/rtlwifi/base.h
-@@ -147,7 +147,7 @@ void rtl_recognize_peer(struct ieee80211
- u8 rtl_tid_to_ac(u8 tid);
- extern struct attribute_group rtl_attribute_group;
- void rtl_easy_concurrent_retrytimer_callback(unsigned long data);
--extern struct rtl_global_var global_var;
-+extern struct rtl_global_var rtl_global_var;
- int rtlwifi_rate_mapping(struct ieee80211_hw *hw,
- bool isht, u8 desc_rate, bool first_ampdu);
- bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb);
---- a/drivers/net/wireless/rtlwifi/core.c
-+++ b/drivers/net/wireless/rtlwifi/core.c
-@@ -1330,3 +1330,4 @@ const struct ieee80211_ops rtl_ops = {
- .rfkill_poll = rtl_op_rfkill_poll,
- .flush = rtl_op_flush,
- };
-+EXPORT_SYMBOL_GPL(rtl_ops);
---- a/drivers/net/wireless/rtlwifi/debug.c
-+++ b/drivers/net/wireless/rtlwifi/debug.c
-@@ -51,3 +51,4 @@ void rtl_dbgp_flag_init(struct ieee80211
-
- /*Init Debug flag enable condition */
- }
-+EXPORT_SYMBOL_GPL(rtl_dbgp_flag_init);
---- a/drivers/net/wireless/rtlwifi/efuse.c
-+++ b/drivers/net/wireless/rtlwifi/efuse.c
-@@ -229,6 +229,7 @@ void read_efuse_byte(struct ieee80211_hw
-
- *pbuf = (u8) (value32 & 0xff);
- }
-+EXPORT_SYMBOL_GPL(read_efuse_byte);
-
- void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf)
- {
---- a/drivers/net/wireless/rtlwifi/pci.c
-+++ b/drivers/net/wireless/rtlwifi/pci.c
-@@ -35,6 +35,13 @@
- #include "efuse.h"
- #include <linux/export.h>
- #include <linux/kmemleak.h>
-+#include <linux/module.h>
-+
-+MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
-+MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
-+MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
-
- static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
- PCI_VENDOR_ID_INTEL,
-@@ -1899,7 +1906,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
- rtlpriv->rtlhal.interface = INTF_PCI;
- rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
- rtlpriv->intf_ops = &rtl_pci_ops;
-- rtlpriv->glb_var = &global_var;
-+ rtlpriv->glb_var = &rtl_global_var;
- /*
- *init dbgp flags before all
---- a/drivers/net/wireless/rtlwifi/ps.c
-+++ b/drivers/net/wireless/rtlwifi/ps.c
-@@ -269,6 +269,7 @@ void rtl_ips_nic_on(struct ieee80211_hw
+-static int ath_reset(struct ath_softc *sc)
++int ath_reset(struct ath_softc *sc)
+ {
+ int r;
- spin_unlock_irqrestore(&rtlpriv->locks.ips_lock, flags);
- }
-+EXPORT_SYMBOL_GPL(rtl_ips_nic_on);
+@@ -735,6 +762,8 @@ static int ath9k_start(struct ieee80211_
+ */
+ ath9k_cmn_init_crypto(sc->sc_ah);
- /*for FW LPS*/
++ ath9k_hw_reset_tsf(ah);
++
+ spin_unlock_bh(&sc->sc_pcu_lock);
-@@ -518,6 +519,7 @@ void rtl_swlps_beacon(struct ieee80211_h
- "u_bufferd: %x, m_buffered: %x\n", u_buffed, m_buffed);
+ mutex_unlock(&sc->mutex);
+@@ -1635,13 +1664,8 @@ static void ath9k_bss_info_changed(struc
}
+
+ if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
+- (changed & BSS_CHANGED_BEACON_INT)) {
+- if (ah->opmode == NL80211_IFTYPE_AP &&
+- bss_conf->enable_beacon)
+- ath9k_set_tsfadjust(sc, vif);
+- if (ath9k_allow_beacon_config(sc, vif))
+- ath9k_beacon_config(sc, vif, changed);
+- }
++ (changed & BSS_CHANGED_BEACON_INT))
++ ath9k_beacon_config(sc, vif, changed);
+
+ if (changed & BSS_CHANGED_ERP_SLOT) {
+ if (bss_conf->use_short_slot)
+@@ -1817,13 +1841,31 @@ static void ath9k_set_coverage_class(str
+ mutex_unlock(&sc->mutex);
}
-+EXPORT_SYMBOL_GPL(rtl_swlps_beacon);
- void rtl_swlps_rf_awake(struct ieee80211_hw *hw)
- {
-@@ -922,3 +924,4 @@ void rtl_p2p_info(struct ieee80211_hw *h
- else
- rtl_p2p_noa_ie(hw, data, len - FCS_LEN);
- }
-+EXPORT_SYMBOL_GPL(rtl_p2p_info);
---- a/drivers/net/wireless/rtlwifi/usb.c
-+++ b/drivers/net/wireless/rtlwifi/usb.c
-@@ -32,6 +32,13 @@
- #include "ps.h"
- #include "rtl8192c/fw_common.h"
- #include <linux/export.h>
-+#include <linux/module.h>
++static bool ath9k_has_tx_pending(struct ath_softc *sc)
++{
++ int i, npend;
+
-+MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
-+MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
-+MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("USB basic driver for rtlwifi");
-
- #define REALTEK_USB_VENQT_READ 0xC0
- #define REALTEK_USB_VENQT_WRITE 0x40
---- a/drivers/net/wireless/ath/ath9k/ath9k.h
-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -79,10 +79,6 @@ struct ath_config {
- sizeof(struct ath_buf_state)); \
- } while (0)
++ for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
++ if (!ATH_TXQ_SETUP(sc, i))
++ continue;
++
++ if (!sc->tx.txq[i].axq_depth)
++ continue;
++
++ npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
++ if (npend)
++ break;
++ }
++
++ return !!npend;
++}
++
+ static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
+ {
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+- int timeout = 200; /* ms */
+- int i, j;
++ int timeout = HZ / 5; /* 200 ms */
+ bool drain_txq;
+
+ mutex_lock(&sc->mutex);
+@@ -1841,25 +1883,9 @@ static void ath9k_flush(struct ieee80211
+ return;
+ }
+
+- for (j = 0; j < timeout; j++) {
+- bool npend = false;
+-
+- if (j)
+- usleep_range(1000, 2000);
+-
+- for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+- if (!ATH_TXQ_SETUP(sc, i))
+- continue;
+-
+- npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
+-
+- if (npend)
+- break;
+- }
+-
+- if (!npend)
+- break;
+- }
++ if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
++ timeout) > 0)
++ drop = false;
+
+ if (drop) {
+ ath9k_ps_wakeup(sc);
+@@ -2021,333 +2047,6 @@ static int ath9k_get_antenna(struct ieee
+ return 0;
+ }
+
+-#ifdef CONFIG_PM_SLEEP
+-
+-static void ath9k_wow_map_triggers(struct ath_softc *sc,
+- struct cfg80211_wowlan *wowlan,
+- u32 *wow_triggers)
+-{
+- if (wowlan->disconnect)
+- *wow_triggers |= AH_WOW_LINK_CHANGE |
+- AH_WOW_BEACON_MISS;
+- if (wowlan->magic_pkt)
+- *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
+-
+- if (wowlan->n_patterns)
+- *wow_triggers |= AH_WOW_USER_PATTERN_EN;
+-
+- sc->wow_enabled = *wow_triggers;
+-
+-}
+-
+-static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
+-{
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+- int pattern_count = 0;
+- int i, byte_cnt;
+- u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
+- u8 dis_deauth_mask[MAX_PATTERN_SIZE];
+-
+- memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
+- memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
+-
+- /*
+- * Create Dissassociate / Deauthenticate packet filter
+- *
+- * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
+- * +--------------+----------+---------+--------+--------+----
+- * + Frame Control+ Duration + DA + SA + BSSID +
+- * +--------------+----------+---------+--------+--------+----
+- *
+- * The above is the management frame format for disassociate/
+- * deauthenticate pattern, from this we need to match the first byte
+- * of 'Frame Control' and DA, SA, and BSSID fields
+- * (skipping 2nd byte of FC and Duration feild.
+- *
+- * Disassociate pattern
+- * --------------------
+- * Frame control = 00 00 1010
+- * DA, SA, BSSID = x:x:x:x:x:x
+- * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
+- * | x:x:x:x:x:x -- 22 bytes
+- *
+- * Deauthenticate pattern
+- * ----------------------
+- * Frame control = 00 00 1100
+- * DA, SA, BSSID = x:x:x:x:x:x
+- * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
+- * | x:x:x:x:x:x -- 22 bytes
+- */
+-
+- /* Create Disassociate Pattern first */
+-
+- byte_cnt = 0;
+-
+- /* Fill out the mask with all FF's */
+-
+- for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
+- dis_deauth_mask[i] = 0xff;
+-
+- /* copy the first byte of frame control field */
+- dis_deauth_pattern[byte_cnt] = 0xa0;
+- byte_cnt++;
+-
+- /* skip 2nd byte of frame control and Duration field */
+- byte_cnt += 3;
+-
+- /*
+- * need not match the destination mac address, it can be a broadcast
+- * mac address or an unicast to this station
+- */
+- byte_cnt += 6;
+-
+- /* copy the source mac address */
+- memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+-
+- byte_cnt += 6;
+-
+- /* copy the bssid, its same as the source mac address */
+-
+- memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+-
+- /* Create Disassociate pattern mask */
+-
+- dis_deauth_mask[0] = 0xfe;
+- dis_deauth_mask[1] = 0x03;
+- dis_deauth_mask[2] = 0xc0;
+-
+- ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
+-
+- ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
+- pattern_count, byte_cnt);
+-
+- pattern_count++;
+- /*
+- * for de-authenticate pattern, only the first byte of the frame
+- * control field gets changed from 0xA0 to 0xC0
+- */
+- dis_deauth_pattern[0] = 0xC0;
+-
+- ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
+- pattern_count, byte_cnt);
+-
+-}
+-
+-static void ath9k_wow_add_pattern(struct ath_softc *sc,
+- struct cfg80211_wowlan *wowlan)
+-{
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath9k_wow_pattern *wow_pattern = NULL;
+- struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
+- int mask_len;
+- s8 i = 0;
+-
+- if (!wowlan->n_patterns)
+- return;
+-
+- /*
+- * Add the new user configured patterns
+- */
+- for (i = 0; i < wowlan->n_patterns; i++) {
+-
+- wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
+-
+- if (!wow_pattern)
+- return;
+-
+- /*
+- * TODO: convert the generic user space pattern to
+- * appropriate chip specific/802.11 pattern.
+- */
+-
+- mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
+- memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
+- memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
+- memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
+- patterns[i].pattern_len);
+- memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
+- wow_pattern->pattern_len = patterns[i].pattern_len;
+-
+- /*
+- * just need to take care of deauth and disssoc pattern,
+- * make sure we don't overwrite them.
+- */
+-
+- ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
+- wow_pattern->mask_bytes,
+- i + 2,
+- wow_pattern->pattern_len);
+- kfree(wow_pattern);
+-
+- }
+-
+-}
+-
+-static int ath9k_suspend(struct ieee80211_hw *hw,
+- struct cfg80211_wowlan *wowlan)
+-{
+- struct ath_softc *sc = hw->priv;
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+- u32 wow_triggers_enabled = 0;
+- int ret = 0;
+-
+- mutex_lock(&sc->mutex);
+-
+- ath_cancel_work(sc);
+- ath_stop_ani(sc);
+- del_timer_sync(&sc->rx_poll_timer);
+-
+- if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
+- ath_dbg(common, ANY, "Device not present\n");
+- ret = -EINVAL;
+- goto fail_wow;
+- }
+-
+- if (WARN_ON(!wowlan)) {
+- ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
+- ret = -EINVAL;
+- goto fail_wow;
+- }
+-
+- if (!device_can_wakeup(sc->dev)) {
+- ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
+- ret = 1;
+- goto fail_wow;
+- }
+-
+- /*
+- * none of the sta vifs are associated
+- * and we are not currently handling multivif
+- * cases, for instance we have to seperately
+- * configure 'keep alive frame' for each
+- * STA.
+- */
+-
+- if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
+- ath_dbg(common, WOW, "None of the STA vifs are associated\n");
+- ret = 1;
+- goto fail_wow;
+- }
+-
+- if (sc->nvifs > 1) {
+- ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
+- ret = 1;
+- goto fail_wow;
+- }
+-
+- ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
+-
+- ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
+- wow_triggers_enabled);
+-
+- ath9k_ps_wakeup(sc);
+-
+- ath9k_stop_btcoex(sc);
+-
+- /*
+- * Enable wake up on recieving disassoc/deauth
+- * frame by default.
+- */
+- ath9k_wow_add_disassoc_deauth_pattern(sc);
+-
+- if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
+- ath9k_wow_add_pattern(sc, wowlan);
+-
+- spin_lock_bh(&sc->sc_pcu_lock);
+- /*
+- * To avoid false wake, we enable beacon miss interrupt only
+- * when we go to sleep. We save the current interrupt mask
+- * so we can restore it after the system wakes up
+- */
+- sc->wow_intr_before_sleep = ah->imask;
+- ah->imask &= ~ATH9K_INT_GLOBAL;
+- ath9k_hw_disable_interrupts(ah);
+- ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+-
+- spin_unlock_bh(&sc->sc_pcu_lock);
+-
+- /*
+- * we can now sync irq and kill any running tasklets, since we already
+- * disabled interrupts and not holding a spin lock
+- */
+- synchronize_irq(sc->irq);
+- tasklet_kill(&sc->intr_tq);
+-
+- ath9k_hw_wow_enable(ah, wow_triggers_enabled);
+-
+- ath9k_ps_restore(sc);
+- ath_dbg(common, ANY, "WoW enabled in ath9k\n");
+- atomic_inc(&sc->wow_sleep_proc_intr);
+-
+-fail_wow:
+- mutex_unlock(&sc->mutex);
+- return ret;
+-}
+-
+-static int ath9k_resume(struct ieee80211_hw *hw)
+-{
+- struct ath_softc *sc = hw->priv;
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+- u32 wow_status;
+-
+- mutex_lock(&sc->mutex);
+-
+- ath9k_ps_wakeup(sc);
+-
+- spin_lock_bh(&sc->sc_pcu_lock);
+-
+- ath9k_hw_disable_interrupts(ah);
+- ah->imask = sc->wow_intr_before_sleep;
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+-
+- spin_unlock_bh(&sc->sc_pcu_lock);
+-
+- wow_status = ath9k_hw_wow_wakeup(ah);
+-
+- if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
+- /*
+- * some devices may not pick beacon miss
+- * as the reason they woke up so we add
+- * that here for that shortcoming.
+- */
+- wow_status |= AH_WOW_BEACON_MISS;
+- atomic_dec(&sc->wow_got_bmiss_intr);
+- ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
+- }
+-
+- atomic_dec(&sc->wow_sleep_proc_intr);
+-
+- if (wow_status) {
+- ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
+- ath9k_hw_wow_event_to_string(wow_status), wow_status);
+- }
+-
+- ath_restart_work(sc);
+- ath9k_start_btcoex(sc);
+-
+- ath9k_ps_restore(sc);
+- mutex_unlock(&sc->mutex);
+-
+- return 0;
+-}
+-
+-static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
+-{
+- struct ath_softc *sc = hw->priv;
+-
+- mutex_lock(&sc->mutex);
+- device_init_wakeup(sc->dev, 1);
+- device_set_wakeup_enable(sc->dev, enabled);
+- mutex_unlock(&sc->mutex);
+-}
+-
+-#endif
+ static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
+ {
+ struct ath_softc *sc = hw->priv;
+@@ -2373,134 +2072,6 @@ static void ath9k_channel_switch_beacon(
+ sc->csa_vif = vif;
+ }
+
+-static void ath9k_tx99_stop(struct ath_softc *sc)
+-{
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+-
+- ath_drain_all_txq(sc);
+- ath_startrecv(sc);
+-
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+-
+- ieee80211_wake_queues(sc->hw);
+-
+- kfree_skb(sc->tx99_skb);
+- sc->tx99_skb = NULL;
+- sc->tx99_state = false;
+-
+- ath9k_hw_tx99_stop(sc->sc_ah);
+- ath_dbg(common, XMIT, "TX99 stopped\n");
+-}
+-
+-static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
+-{
+- static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
+- 0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
+- 0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
+- 0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
+- 0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
+- 0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
+- 0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
+- 0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
+- u32 len = 1200;
+- struct ieee80211_hw *hw = sc->hw;
+- struct ieee80211_hdr *hdr;
+- struct ieee80211_tx_info *tx_info;
+- struct sk_buff *skb;
+-
+- skb = alloc_skb(len, GFP_KERNEL);
+- if (!skb)
+- return NULL;
+-
+- skb_put(skb, len);
+-
+- memset(skb->data, 0, len);
+-
+- hdr = (struct ieee80211_hdr *)skb->data;
+- hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
+- hdr->duration_id = 0;
+-
+- memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
+- memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
+- memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
+-
+- hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
+-
+- tx_info = IEEE80211_SKB_CB(skb);
+- memset(tx_info, 0, sizeof(*tx_info));
+- tx_info->band = hw->conf.chandef.chan->band;
+- tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
+- tx_info->control.vif = sc->tx99_vif;
+-
+- memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
+-
+- return skb;
+-}
+-
+-void ath9k_tx99_deinit(struct ath_softc *sc)
+-{
+- ath_reset(sc);
+-
+- ath9k_ps_wakeup(sc);
+- ath9k_tx99_stop(sc);
+- ath9k_ps_restore(sc);
+-}
+-
+-int ath9k_tx99_init(struct ath_softc *sc)
+-{
+- struct ieee80211_hw *hw = sc->hw;
+- struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+- struct ath_tx_control txctl;
+- int r;
+-
+- if (sc->sc_flags & SC_OP_INVALID) {
+- ath_err(common,
+- "driver is in invalid state unable to use TX99");
+- return -EINVAL;
+- }
+-
+- sc->tx99_skb = ath9k_build_tx99_skb(sc);
+- if (!sc->tx99_skb)
+- return -ENOMEM;
+-
+- memset(&txctl, 0, sizeof(txctl));
+- txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
+-
+- ath_reset(sc);
+-
+- ath9k_ps_wakeup(sc);
+-
+- ath9k_hw_disable_interrupts(ah);
+- atomic_set(&ah->intr_ref_cnt, -1);
+- ath_drain_all_txq(sc);
+- ath_stoprecv(sc);
+-
+- sc->tx99_state = true;
+-
+- ieee80211_stop_queues(hw);
+-
+- if (sc->tx99_power == MAX_RATE_POWER + 1)
+- sc->tx99_power = MAX_RATE_POWER;
+-
+- ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
+- r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
+- if (r) {
+- ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
+- return r;
+- }
+-
+- ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
+- sc->tx99_power,
+- sc->tx99_power / 2);
+-
+- /* We leave the harware awake as it will be chugging on */
+-
+- return 0;
+-}
+-
+ struct ieee80211_ops ath9k_ops = {
+ .tx = ath9k_tx,
+ .start = ath9k_start,
+@@ -2531,7 +2102,7 @@ struct ieee80211_ops ath9k_ops = {
+ .set_antenna = ath9k_set_antenna,
+ .get_antenna = ath9k_get_antenna,
+
+-#ifdef CONFIG_PM_SLEEP
++#ifdef CONFIG_ATH9K_WOW
+ .suspend = ath9k_suspend,
+ .resume = ath9k_resume,
+ .set_wakeup = ath9k_set_wakeup,
+--- a/drivers/net/wireless/ath/ath9k/wow.c
++++ b/drivers/net/wireless/ath/ath9k/wow.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2012 Qualcomm Atheros, Inc.
++ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+@@ -14,409 +14,348 @@
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+-#include <linux/export.h>
+ #include "ath9k.h"
+-#include "reg.h"
+-#include "hw-ops.h"
+
+-const char *ath9k_hw_wow_event_to_string(u32 wow_event)
++static const struct wiphy_wowlan_support ath9k_wowlan_support = {
++ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
++ .n_patterns = MAX_NUM_USER_PATTERN,
++ .pattern_min_len = 1,
++ .pattern_max_len = MAX_PATTERN_SIZE,
++};
++
++static void ath9k_wow_map_triggers(struct ath_softc *sc,
++ struct cfg80211_wowlan *wowlan,
++ u32 *wow_triggers)
+ {
+- if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
+- return "Magic pattern";
+- if (wow_event & AH_WOW_USER_PATTERN_EN)
+- return "User pattern";
+- if (wow_event & AH_WOW_LINK_CHANGE)
+- return "Link change";
+- if (wow_event & AH_WOW_BEACON_MISS)
+- return "Beacon miss";
++ if (wowlan->disconnect)
++ *wow_triggers |= AH_WOW_LINK_CHANGE |
++ AH_WOW_BEACON_MISS;
++ if (wowlan->magic_pkt)
++ *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
++
++ if (wowlan->n_patterns)
++ *wow_triggers |= AH_WOW_USER_PATTERN_EN;
++
++ sc->wow_enabled = *wow_triggers;
+
+- return "unknown reason";
+ }
+-EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
+
+-static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
++static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
+ {
++ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
++ int pattern_count = 0;
++ int i, byte_cnt;
++ u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
++ u8 dis_deauth_mask[MAX_PATTERN_SIZE];
+
+- REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
++ memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
++ memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
+
+- /* set rx disable bit */
+- REG_WRITE(ah, AR_CR, AR_CR_RXD);
++ /*
++ * Create Dissassociate / Deauthenticate packet filter
++ *
++ * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
++ * +--------------+----------+---------+--------+--------+----
++ * + Frame Control+ Duration + DA + SA + BSSID +
++ * +--------------+----------+---------+--------+--------+----
++ *
++ * The above is the management frame format for disassociate/
++ * deauthenticate pattern, from this we need to match the first byte
++ * of 'Frame Control' and DA, SA, and BSSID fields
++ * (skipping 2nd byte of FC and Duration feild.
++ *
++ * Disassociate pattern
++ * --------------------
++ * Frame control = 00 00 1010
++ * DA, SA, BSSID = x:x:x:x:x:x
++ * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
++ * | x:x:x:x:x:x -- 22 bytes
++ *
++ * Deauthenticate pattern
++ * ----------------------
++ * Frame control = 00 00 1100
++ * DA, SA, BSSID = x:x:x:x:x:x
++ * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
++ * | x:x:x:x:x:x -- 22 bytes
++ */
+
+- if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
+- ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
+- REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
+- return;
+- }
++ /* Create Disassociate Pattern first */
+
+- REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
+-}
++ byte_cnt = 0;
+
+-static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
+-{
+- struct ath_common *common = ath9k_hw_common(ah);
+- u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
+- u32 ctl[13] = {0};
+- u32 data_word[KAL_NUM_DATA_WORDS];
+- u8 i;
+- u32 wow_ka_data_word0;
+-
+- memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
+- memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
+-
+- /* set the transmit buffer */
+- ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
+- ctl[1] = 0;
+- ctl[3] = 0xb; /* OFDM_6M hardware value for this rate */
+- ctl[4] = 0;
+- ctl[7] = (ah->txchainmask) << 2;
+- ctl[2] = 0xf << 16; /* tx_tries 0 */
+-
+- for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
+- REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
+-
+- REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
+-
+- data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
+- (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
+- data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
+- (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
+- data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
+- (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
+- data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
+- (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
+- data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
+- (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
+- data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
+-
+- if (AR_SREV_9462_20(ah)) {
+- /* AR9462 2.0 has an extra descriptor word (time based
+- * discard) compared to other chips */
+- REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
+- wow_ka_data_word0 = AR_WOW_TXBUF(13);
+- } else {
+- wow_ka_data_word0 = AR_WOW_TXBUF(12);
+- }
++ /* Fill out the mask with all FF's */
+
+- for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
+- REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
++ for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
++ dis_deauth_mask[i] = 0xff;
+
+-}
++ /* copy the first byte of frame control field */
++ dis_deauth_pattern[byte_cnt] = 0xa0;
++ byte_cnt++;
+
+-void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
+- u8 *user_mask, int pattern_count,
+- int pattern_len)
+-{
+- int i;
+- u32 pattern_val, mask_val;
+- u32 set, clr;
++ /* skip 2nd byte of frame control and Duration field */
++ byte_cnt += 3;
+
+- /* FIXME: should check count by querying the hardware capability */
+- if (pattern_count >= MAX_NUM_PATTERN)
+- return;
++ /*
++ * need not match the destination mac address, it can be a broadcast
++ * mac address or an unicast to this station
++ */
++ byte_cnt += 6;
+
+- REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
++ /* copy the source mac address */
++ memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+
+- /* set the registers for pattern */
+- for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
+- memcpy(&pattern_val, user_pattern, 4);
+- REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
+- pattern_val);
+- user_pattern += 4;
+- }
++ byte_cnt += 6;
+
+- /* set the registers for mask */
+- for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
+- memcpy(&mask_val, user_mask, 4);
+- REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
+- user_mask += 4;
+- }
++ /* copy the bssid, its same as the source mac address */
+
+- /* set the pattern length to be matched
+- *
+- * AR_WOW_LENGTH1_REG1
+- * bit 31:24 pattern 0 length
+- * bit 23:16 pattern 1 length
+- * bit 15:8 pattern 2 length
+- * bit 7:0 pattern 3 length
+- *
+- * AR_WOW_LENGTH1_REG2
+- * bit 31:24 pattern 4 length
+- * bit 23:16 pattern 5 length
+- * bit 15:8 pattern 6 length
+- * bit 7:0 pattern 7 length
+- *
+- * the below logic writes out the new
+- * pattern length for the corresponding
+- * pattern_count, while masking out the
+- * other fields
+- */
++ memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+
+- ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
++ /* Create Disassociate pattern mask */
+
+- if (pattern_count < 4) {
+- /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
+- set = (pattern_len & AR_WOW_LENGTH_MAX) <<
+- AR_WOW_LEN1_SHIFT(pattern_count);
+- clr = AR_WOW_LENGTH1_MASK(pattern_count);
+- REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
+- } else {
+- /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
+- set = (pattern_len & AR_WOW_LENGTH_MAX) <<
+- AR_WOW_LEN2_SHIFT(pattern_count);
+- clr = AR_WOW_LENGTH2_MASK(pattern_count);
+- REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
+- }
++ dis_deauth_mask[0] = 0xfe;
++ dis_deauth_mask[1] = 0x03;
++ dis_deauth_mask[2] = 0xc0;
+
+-}
+-EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
++ ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
+
+-u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
+-{
+- u32 wow_status = 0;
+- u32 val = 0, rval;
++ ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
++ pattern_count, byte_cnt);
+
++ pattern_count++;
+ /*
+- * read the WoW status register to know
+- * the wakeup reason
++ * for de-authenticate pattern, only the first byte of the frame
++ * control field gets changed from 0xA0 to 0xC0
+ */
+- rval = REG_READ(ah, AR_WOW_PATTERN);
+- val = AR_WOW_STATUS(rval);
++ dis_deauth_pattern[0] = 0xC0;
+
+- /*
+- * mask only the WoW events that we have enabled. Sometimes
+- * we have spurious WoW events from the AR_WOW_PATTERN
+- * register. This mask will clean it up.
+- */
++ ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
++ pattern_count, byte_cnt);
+
+- val &= ah->wow_event_mask;
++}
+
+- if (val) {
+- if (val & AR_WOW_MAGIC_PAT_FOUND)
+- wow_status |= AH_WOW_MAGIC_PATTERN_EN;
+- if (AR_WOW_PATTERN_FOUND(val))
+- wow_status |= AH_WOW_USER_PATTERN_EN;
+- if (val & AR_WOW_KEEP_ALIVE_FAIL)
+- wow_status |= AH_WOW_LINK_CHANGE;
+- if (val & AR_WOW_BEACON_FAIL)
+- wow_status |= AH_WOW_BEACON_MISS;
+- }
++static void ath9k_wow_add_pattern(struct ath_softc *sc,
++ struct cfg80211_wowlan *wowlan)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath9k_wow_pattern *wow_pattern = NULL;
++ struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
++ int mask_len;
++ s8 i = 0;
++
++ if (!wowlan->n_patterns)
++ return;
+
+ /*
+- * set and clear WOW_PME_CLEAR registers for the chip to
+- * generate next wow signal.
+- * disable D3 before accessing other registers ?
++ * Add the new user configured patterns
+ */
++ for (i = 0; i < wowlan->n_patterns; i++) {
+
+- /* do we need to check the bit value 0x01000000 (7-10) ?? */
+- REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
+- AR_PMCTRL_PWR_STATE_D1D3);
++ wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
+
+- /*
+- * clear all events
+- */
+- REG_WRITE(ah, AR_WOW_PATTERN,
+- AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
++ if (!wow_pattern)
++ return;
+
+- /*
+- * restore the beacon threshold to init value
+- */
+- REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
++ /*
++ * TODO: convert the generic user space pattern to
++ * appropriate chip specific/802.11 pattern.
++ */
+
+- /*
+- * Restore the way the PCI-E reset, Power-On-Reset, external
+- * PCIE_POR_SHORT pins are tied to its original value.
+- * Previously just before WoW sleep, we untie the PCI-E
+- * reset to our Chip's Power On Reset so that any PCI-E
+- * reset from the bus will not reset our chip
+- */
+- if (ah->is_pciexpress)
+- ath9k_hw_configpcipowersave(ah, false);
++ mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
++ memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
++ memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
++ memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
++ patterns[i].pattern_len);
++ memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
++ wow_pattern->pattern_len = patterns[i].pattern_len;
++
++ /*
++ * just need to take care of deauth and disssoc pattern,
++ * make sure we don't overwrite them.
++ */
++
++ ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
++ wow_pattern->mask_bytes,
++ i + 2,
++ wow_pattern->pattern_len);
++ kfree(wow_pattern);
+
+- ah->wow_event_mask = 0;
++ }
+
+- return wow_status;
+ }
+-EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
+
+-void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
++int ath9k_suspend(struct ieee80211_hw *hw,
++ struct cfg80211_wowlan *wowlan)
+ {
+- u32 wow_event_mask;
+- u32 set, clr;
++ struct ath_softc *sc = hw->priv;
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
++ u32 wow_triggers_enabled = 0;
++ int ret = 0;
+
+- /*
+- * wow_event_mask is a mask to the AR_WOW_PATTERN register to
+- * indicate which WoW events we have enabled. The WoW events
+- * are from the 'pattern_enable' in this function and
+- * 'pattern_count' of ath9k_hw_wow_apply_pattern()
+- */
+- wow_event_mask = ah->wow_event_mask;
++ mutex_lock(&sc->mutex);
+
+- /*
+- * Untie Power-on-Reset from the PCI-E-Reset. When we are in
+- * WOW sleep, we do want the Reset from the PCI-E to disturb
+- * our hw state
+- */
+- if (ah->is_pciexpress) {
+- /*
+- * we need to untie the internal POR (power-on-reset)
+- * to the external PCI-E reset. We also need to tie
+- * the PCI-E Phy reset to the PCI-E reset.
+- */
+- set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
+- clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
+- REG_RMW(ah, AR_WA, set, clr);
++ ath_cancel_work(sc);
++ ath_stop_ani(sc);
++ del_timer_sync(&sc->rx_poll_timer);
++
++ if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
++ ath_dbg(common, ANY, "Device not present\n");
++ ret = -EINVAL;
++ goto fail_wow;
+ }
+
+- /*
+- * set the power states appropriately and enable PME
+- */
+- set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
+- AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
++ if (WARN_ON(!wowlan)) {
++ ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
++ ret = -EINVAL;
++ goto fail_wow;
++ }
+
+- /*
+- * set and clear WOW_PME_CLEAR registers for the chip
+- * to generate next wow signal.
+- */
+- REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
+- clr = AR_PMCTRL_WOW_PME_CLR;
+- REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
++ if (!device_can_wakeup(sc->dev)) {
++ ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
++ ret = 1;
++ goto fail_wow;
++ }
+
+ /*
+- * Setup for:
+- * - beacon misses
+- * - magic pattern
+- * - keep alive timeout
+- * - pattern matching
++ * none of the sta vifs are associated
++ * and we are not currently handling multivif
++ * cases, for instance we have to seperately
++ * configure 'keep alive frame' for each
++ * STA.
+ */
+
+- /*
+- * Program default values for pattern backoff, aifs/slot/KAL count,
+- * beacon miss timeout, KAL timeout, etc.
+- */
+- set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
+- REG_SET_BIT(ah, AR_WOW_PATTERN, set);
++ if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
++ ath_dbg(common, WOW, "None of the STA vifs are associated\n");
++ ret = 1;
++ goto fail_wow;
++ }
++
++ if (sc->nvifs > 1) {
++ ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
++ ret = 1;
++ goto fail_wow;
++ }
+
+- set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
+- AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
+- AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
+- REG_SET_BIT(ah, AR_WOW_COUNT, set);
+-
+- if (pattern_enable & AH_WOW_BEACON_MISS)
+- set = AR_WOW_BEACON_TIMO;
+- /* We are not using beacon miss, program a large value */
+- else
+- set = AR_WOW_BEACON_TIMO_MAX;
++ ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
+
+- REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
++ ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
++ wow_triggers_enabled);
+
+- /*
+- * Keep alive timo in ms except AR9280
+- */
+- if (!pattern_enable)
+- set = AR_WOW_KEEP_ALIVE_NEVER;
+- else
+- set = KAL_TIMEOUT * 32;
++ ath9k_ps_wakeup(sc);
+
+- REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
++ ath9k_stop_btcoex(sc);
+
+ /*
+- * Keep alive delay in us. based on 'power on clock',
+- * therefore in usec
++ * Enable wake up on recieving disassoc/deauth
++ * frame by default.
+ */
+- set = KAL_DELAY * 1000;
+- REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
++ ath9k_wow_add_disassoc_deauth_pattern(sc);
+
+- /*
+- * Create keep alive pattern to respond to beacons
+- */
+- ath9k_wow_create_keep_alive_pattern(ah);
++ if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
++ ath9k_wow_add_pattern(sc, wowlan);
+
++ spin_lock_bh(&sc->sc_pcu_lock);
+ /*
+- * Configure MAC WoW Registers
++ * To avoid false wake, we enable beacon miss interrupt only
++ * when we go to sleep. We save the current interrupt mask
++ * so we can restore it after the system wakes up
+ */
+- set = 0;
+- /* Send keep alive timeouts anyway */
+- clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
+-
+- if (pattern_enable & AH_WOW_LINK_CHANGE)
+- wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
+- else
+- set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
++ sc->wow_intr_before_sleep = ah->imask;
++ ah->imask &= ~ATH9K_INT_GLOBAL;
++ ath9k_hw_disable_interrupts(ah);
++ ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
++ ath9k_hw_set_interrupts(ah);
++ ath9k_hw_enable_interrupts(ah);
+
+- set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
+- REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
++ spin_unlock_bh(&sc->sc_pcu_lock);
+
+ /*
+- * we are relying on a bmiss failure. ensure we have
+- * enough threshold to prevent false positives
++ * we can now sync irq and kill any running tasklets, since we already
++ * disabled interrupts and not holding a spin lock
+ */
+- REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
+- AR_WOW_BMISSTHRESHOLD);
++ synchronize_irq(sc->irq);
++ tasklet_kill(&sc->intr_tq);
++
++ ath9k_hw_wow_enable(ah, wow_triggers_enabled);
+
+- set = 0;
+- clr = 0;
++ ath9k_ps_restore(sc);
++ ath_dbg(common, ANY, "WoW enabled in ath9k\n");
++ atomic_inc(&sc->wow_sleep_proc_intr);
+
+- if (pattern_enable & AH_WOW_BEACON_MISS) {
+- set = AR_WOW_BEACON_FAIL_EN;
+- wow_event_mask |= AR_WOW_BEACON_FAIL;
+- } else {
+- clr = AR_WOW_BEACON_FAIL_EN;
++fail_wow:
++ mutex_unlock(&sc->mutex);
++ return ret;
++}
++
++int ath9k_resume(struct ieee80211_hw *hw)
++{
++ struct ath_softc *sc = hw->priv;
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
++ u32 wow_status;
++
++ mutex_lock(&sc->mutex);
++
++ ath9k_ps_wakeup(sc);
++
++ spin_lock_bh(&sc->sc_pcu_lock);
++
++ ath9k_hw_disable_interrupts(ah);
++ ah->imask = sc->wow_intr_before_sleep;
++ ath9k_hw_set_interrupts(ah);
++ ath9k_hw_enable_interrupts(ah);
++
++ spin_unlock_bh(&sc->sc_pcu_lock);
++
++ wow_status = ath9k_hw_wow_wakeup(ah);
++
++ if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
++ /*
++ * some devices may not pick beacon miss
++ * as the reason they woke up so we add
++ * that here for that shortcoming.
++ */
++ wow_status |= AH_WOW_BEACON_MISS;
++ atomic_dec(&sc->wow_got_bmiss_intr);
++ ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
+ }
+
+- REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
++ atomic_dec(&sc->wow_sleep_proc_intr);
+
+- set = 0;
+- clr = 0;
+- /*
+- * Enable the magic packet registers
+- */
+- if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
+- set = AR_WOW_MAGIC_EN;
+- wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
+- } else {
+- clr = AR_WOW_MAGIC_EN;
++ if (wow_status) {
++ ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
++ ath9k_hw_wow_event_to_string(wow_status), wow_status);
+ }
+- set |= AR_WOW_MAC_INTR_EN;
+- REG_RMW(ah, AR_WOW_PATTERN, set, clr);
+
+- REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
+- AR_WOW_PATTERN_SUPPORTED);
++ ath_restart_work(sc);
++ ath9k_start_btcoex(sc);
+
+- /*
+- * Set the power states appropriately and enable PME
+- */
+- clr = 0;
+- set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
+- AR_PMCTRL_PWR_PM_CTRL_ENA;
++ ath9k_ps_restore(sc);
++ mutex_unlock(&sc->mutex);
+
+- clr = AR_PCIE_PM_CTRL_ENA;
+- REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
++ return 0;
++}
+
+- /*
+- * this is needed to prevent the chip waking up
+- * the host within 3-4 seconds with certain
+- * platform/BIOS. The fix is to enable
+- * D1 & D3 to match original definition and
+- * also match the OTP value. Anyway this
+- * is more related to SW WOW.
+- */
+- clr = AR_PMCTRL_PWR_STATE_D1D3;
+- REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
++void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
++{
++ struct ath_softc *sc = hw->priv;
+
+- set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
+- REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
++ mutex_lock(&sc->mutex);
++ device_init_wakeup(sc->dev, 1);
++ device_set_wakeup_enable(sc->dev, enabled);
++ mutex_unlock(&sc->mutex);
++}
+
+- REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
++void ath9k_init_wow(struct ieee80211_hw *hw)
++{
++ struct ath_softc *sc = hw->priv;
+
+- /* to bring down WOW power low margin */
+- set = BIT(13);
+- REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
+- /* HW WoW */
+- clr = BIT(5);
+- REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
++ if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
++ (sc->driver_data & ATH9K_PCI_WOW) &&
++ device_can_wakeup(sc->dev))
++ hw->wiphy->wowlan = &ath9k_wowlan_support;
+
+- ath9k_hw_set_powermode_wow_sleep(ah);
+- ah->wow_event_mask = wow_event_mask;
++ atomic_set(&sc->wow_sleep_proc_intr, -1);
++ atomic_set(&sc->wow_got_bmiss_intr, -1);
+ }
+-EXPORT_SYMBOL(ath9k_hw_wow_enable);
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -174,14 +174,7 @@ static void ath_txq_skb_done(struct ath_
+ static struct ath_atx_tid *
+ ath_get_skb_tid(struct ath_softc *sc, struct ath_node *an, struct sk_buff *skb)
+ {
+- struct ieee80211_hdr *hdr;
+- u8 tidno = 0;
+-
+- hdr = (struct ieee80211_hdr *) skb->data;
+- if (ieee80211_is_data_qos(hdr->frame_control))
+- tidno = ieee80211_get_qos_ctl(hdr)[0];
+-
+- tidno &= IEEE80211_QOS_CTL_TID_MASK;
++ u8 tidno = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
+ return ATH_AN_2_TID(an, tidno);
+ }
+
+@@ -1276,6 +1269,10 @@ static void ath_tx_fill_desc(struct ath_
+ if (!rts_thresh || (len > rts_thresh))
+ rts = true;
+ }
++
++ if (!aggr)
++ len = fi->framelen;
++
+ ath_buf_set_rate(sc, bf, &info, len, rts);
+ }
+
+@@ -1786,6 +1783,9 @@ bool ath_drain_all_txq(struct ath_softc
+ if (!ATH_TXQ_SETUP(sc, i))
+ continue;
+
++ if (!sc->tx.txq[i].axq_depth)
++ continue;
++
+ if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
+ npend |= BIT(i);
+ }
+@@ -2749,6 +2749,8 @@ void ath_tx_node_cleanup(struct ath_soft
+ }
+ }
+
++#ifdef CONFIG_ATH9K_TX99
++
+ int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
+ struct ath_tx_control *txctl)
+ {
+@@ -2791,3 +2793,5 @@ int ath9k_tx99_send(struct ath_softc *sc
+
+ return 0;
+ }
++
++#endif /* CONFIG_ATH9K_TX99 */
+--- a/drivers/net/wireless/ath/regd.c
++++ b/drivers/net/wireless/ath/regd.c
+@@ -37,17 +37,17 @@ static int __ath_regd_init(struct ath_re
+
+ /* We enable active scan on these a case by case basis by regulatory domain */
+ #define ATH9K_2GHZ_CH12_13 REG_RULE(2467-10, 2472+10, 40, 0, 20,\
+- NL80211_RRF_PASSIVE_SCAN)
++ NL80211_RRF_NO_IR)
+ #define ATH9K_2GHZ_CH14 REG_RULE(2484-10, 2484+10, 40, 0, 20,\
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_OFDM)
++ NL80211_RRF_NO_IR | NL80211_RRF_NO_OFDM)
+
+ /* We allow IBSS on these on a case by case basis by regulatory domain */
+ #define ATH9K_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 80, 0, 30,\
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+ #define ATH9K_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 80, 0, 30,\
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+ #define ATH9K_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ #define ATH9K_2GHZ_ALL ATH9K_2GHZ_CH01_11, \
+ ATH9K_2GHZ_CH12_13, \
+@@ -224,17 +224,16 @@ ath_reg_apply_beaconing_flags(struct wip
+ * regulatory_hint().
+ */
+ if (!(reg_rule->flags &
+- NL80211_RRF_NO_IBSS))
++ NL80211_RRF_NO_IR))
+ ch->flags &=
+- ~IEEE80211_CHAN_NO_IBSS;
++ ~IEEE80211_CHAN_NO_IR;
+ if (!(reg_rule->flags &
+- NL80211_RRF_PASSIVE_SCAN))
++ NL80211_RRF_NO_IR))
+ ch->flags &=
+- ~IEEE80211_CHAN_PASSIVE_SCAN;
++ ~IEEE80211_CHAN_NO_IR;
+ } else {
+ if (ch->beacon_found)
+- ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN);
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+ }
+ }
+@@ -260,11 +259,11 @@ ath_reg_apply_active_scan_flags(struct w
+ */
+ if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
+ ch = &sband->channels[11]; /* CH 12 */
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ ch = &sband->channels[12]; /* CH 13 */
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ return;
+ }
+
+@@ -278,17 +277,17 @@ ath_reg_apply_active_scan_flags(struct w
+ ch = &sband->channels[11]; /* CH 12 */
+ reg_rule = freq_reg_info(wiphy, ch->center_freq);
+ if (!IS_ERR(reg_rule)) {
+- if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (!(reg_rule->flags & NL80211_RRF_NO_IR))
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+
+ ch = &sband->channels[12]; /* CH 13 */
+ reg_rule = freq_reg_info(wiphy, ch->center_freq);
+ if (!IS_ERR(reg_rule)) {
+- if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (!(reg_rule->flags & NL80211_RRF_NO_IR))
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+ }
+
+@@ -320,8 +319,8 @@ static void ath_reg_apply_radar_flags(st
+ */
+ if (!(ch->flags & IEEE80211_CHAN_DISABLED))
+ ch->flags |= IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR;
+ }
+ }
+
+--- a/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
++++ b/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
+@@ -812,7 +812,7 @@ static s32 brcmf_p2p_run_escan(struct br
+ struct ieee80211_channel *chan = request->channels[i];
+
+ if (chan->flags & (IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_PASSIVE_SCAN))
++ IEEE80211_CHAN_NO_IR))
+ continue;
+
+ chanspecs[i] = channel_to_chanspec(&p2p->cfg->d11inf,
+--- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
++++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
+@@ -202,9 +202,9 @@ static struct ieee80211_supported_band _
+
+ /* This is to override regulatory domains defined in cfg80211 module (reg.c)
+ * By default world regulatory domain defined in reg.c puts the flags
+- * NL80211_RRF_PASSIVE_SCAN and NL80211_RRF_NO_IBSS for 5GHz channels (for
+- * 36..48 and 149..165). With respect to these flags, wpa_supplicant doesn't
+- * start p2p operations on 5GHz channels. All the changes in world regulatory
++ * NL80211_RRF_NO_IR for 5GHz channels (for * 36..48 and 149..165).
++ * With respect to these flags, wpa_supplicant doesn't * start p2p
++ * operations on 5GHz channels. All the changes in world regulatory
+ * domain are to be done here.
+ */
+ static const struct ieee80211_regdomain brcmf_regdom = {
+@@ -5197,10 +5197,10 @@ static s32 brcmf_construct_reginfo(struc
+ if (channel & WL_CHAN_RADAR)
+ band_chan_arr[index].flags |=
+ (IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_NO_IBSS);
++ IEEE80211_CHAN_NO_IR);
+ if (channel & WL_CHAN_PASSIVE)
+ band_chan_arr[index].flags |=
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR;
+ }
+ }
+ if (!update)
+--- a/drivers/net/wireless/brcm80211/brcmsmac/channel.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/channel.c
+@@ -59,23 +59,20 @@
+
+ #define BRCM_2GHZ_2412_2462 REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
+ #define BRCM_2GHZ_2467_2472 REG_RULE(2467-10, 2472+10, 20, 0, 19, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ #define BRCM_5GHZ_5180_5240 REG_RULE(5180-10, 5240+10, 40, 0, 21, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+ #define BRCM_5GHZ_5260_5320 REG_RULE(5260-10, 5320+10, 40, 0, 21, \
+- NL80211_RRF_PASSIVE_SCAN | \
++ NL80211_RRF_NO_IR | \
+ NL80211_RRF_DFS | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+ #define BRCM_5GHZ_5500_5700 REG_RULE(5500-10, 5700+10, 40, 0, 21, \
+- NL80211_RRF_PASSIVE_SCAN | \
++ NL80211_RRF_NO_IR | \
+ NL80211_RRF_DFS | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+ #define BRCM_5GHZ_5745_5825 REG_RULE(5745-10, 5825+10, 40, 0, 21, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ static const struct ieee80211_regdomain brcms_regdom_x2 = {
+ .n_reg_rules = 6,
+@@ -395,7 +392,7 @@ brcms_c_channel_set_chanspec(struct brcm
+ brcms_c_set_gmode(wlc, wlc->protection->gmode_user, false);
+
+ brcms_b_set_chanspec(wlc->hw, chanspec,
+- !!(ch->flags & IEEE80211_CHAN_PASSIVE_SCAN),
++ !!(ch->flags & IEEE80211_CHAN_NO_IR),
+ &txpwr);
+ }
+
+@@ -657,8 +654,8 @@ static void brcms_reg_apply_radar_flags(
+ */
+ if (!(ch->flags & IEEE80211_CHAN_DISABLED))
+ ch->flags |= IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR;
+ }
+ }
+
+@@ -688,14 +685,13 @@ brcms_reg_apply_beaconing_flags(struct w
+ if (IS_ERR(rule))
+ continue;
+
+- if (!(rule->flags & NL80211_RRF_NO_IBSS))
+- ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
+- if (!(rule->flags & NL80211_RRF_PASSIVE_SCAN))
++ if (!(rule->flags & NL80211_RRF_NO_IR))
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
++ if (!(rule->flags & NL80211_RRF_NO_IR))
+ ch->flags &=
+- ~IEEE80211_CHAN_PASSIVE_SCAN;
++ ~IEEE80211_CHAN_NO_IR;
+ } else if (ch->beacon_found) {
+- ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN);
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+ }
+ }
+--- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
+@@ -125,13 +125,13 @@ static struct ieee80211_channel brcms_2g
+ CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN2GHZ(12, 2467,
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
++ IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN2GHZ(13, 2472,
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
++ IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN2GHZ(14, 2484,
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
++ IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS |
+ IEEE80211_CHAN_NO_OFDM)
+ };
+@@ -144,51 +144,51 @@ static struct ieee80211_channel brcms_5g
+ CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS),
+ /* UNII-2 */
+ CHAN5GHZ(52,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(56,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(60,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(64,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ /* MID */
+ CHAN5GHZ(100,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(104,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(108,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(112,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(116,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(120,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(124,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(128,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(132,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
+ CHAN5GHZ(136,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
+ CHAN5GHZ(140,
+- IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS |
++ IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS |
+ IEEE80211_CHAN_NO_HT40MINUS),
+ /* UNII-3 */
+ CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS),
+--- a/drivers/net/wireless/cw1200/scan.c
++++ b/drivers/net/wireless/cw1200/scan.c
+@@ -197,9 +197,9 @@ void cw1200_scan_work(struct work_struct
+ if ((*it)->band != first->band)
+ break;
+ if (((*it)->flags ^ first->flags) &
+- IEEE80211_CHAN_PASSIVE_SCAN)
++ IEEE80211_CHAN_NO_IR)
+ break;
+- if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
++ if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
+ (*it)->max_power != first->max_power)
+ break;
+ }
+@@ -210,7 +210,7 @@ void cw1200_scan_work(struct work_struct
+ else
+ scan.max_tx_rate = WSM_TRANSMIT_RATE_1;
+ scan.num_probes =
+- (first->flags & IEEE80211_CHAN_PASSIVE_SCAN) ? 0 : 2;
++ (first->flags & IEEE80211_CHAN_NO_IR) ? 0 : 2;
+ scan.num_ssids = priv->scan.n_ssids;
+ scan.ssids = &priv->scan.ssids[0];
+ scan.num_channels = it - priv->scan.curr;
+@@ -233,7 +233,7 @@ void cw1200_scan_work(struct work_struct
+ }
+ for (i = 0; i < scan.num_channels; ++i) {
+ scan.ch[i].number = priv->scan.curr[i]->hw_value;
+- if (priv->scan.curr[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
++ if (priv->scan.curr[i]->flags & IEEE80211_CHAN_NO_IR) {
+ scan.ch[i].min_chan_time = 50;
+ scan.ch[i].max_chan_time = 100;
+ } else {
+@@ -241,7 +241,7 @@ void cw1200_scan_work(struct work_struct
+ scan.ch[i].max_chan_time = 25;
+ }
+ }
+- if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
++ if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
+ priv->scan.output_power != first->max_power) {
+ priv->scan.output_power = first->max_power;
+ wsm_set_output_power(priv,
+--- a/drivers/net/wireless/ipw2x00/ipw2100.c
++++ b/drivers/net/wireless/ipw2x00/ipw2100.c
+@@ -1934,10 +1934,10 @@ static int ipw2100_wdev_init(struct net_
+ bg_band->channels[i].max_power = geo->bg[i].max_power;
+ if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
+ bg_band->channels[i].flags |=
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
+ bg_band->channels[i].flags |=
+- IEEE80211_CHAN_NO_IBSS;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
+ bg_band->channels[i].flags |=
+ IEEE80211_CHAN_RADAR;
+--- a/drivers/net/wireless/ipw2x00/ipw2200.c
++++ b/drivers/net/wireless/ipw2x00/ipw2200.c
+@@ -11472,10 +11472,10 @@ static int ipw_wdev_init(struct net_devi
+ bg_band->channels[i].max_power = geo->bg[i].max_power;
+ if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
+ bg_band->channels[i].flags |=
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
+ bg_band->channels[i].flags |=
+- IEEE80211_CHAN_NO_IBSS;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
+ bg_band->channels[i].flags |=
+ IEEE80211_CHAN_RADAR;
+@@ -11511,10 +11511,10 @@ static int ipw_wdev_init(struct net_devi
+ a_band->channels[i].max_power = geo->a[i].max_power;
+ if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
+ a_band->channels[i].flags |=
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
+ a_band->channels[i].flags |=
+- IEEE80211_CHAN_NO_IBSS;
++ IEEE80211_CHAN_NO_IR;
+ if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
+ a_band->channels[i].flags |=
+ IEEE80211_CHAN_RADAR;
+--- a/drivers/net/wireless/iwlegacy/3945-mac.c
++++ b/drivers/net/wireless/iwlegacy/3945-mac.c
+@@ -1595,7 +1595,7 @@ il3945_get_channels_for_scan(struct il_p
+ * and use long active_dwell time.
+ */
+ if (!is_active || il_is_channel_passive(ch_info) ||
+- (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
++ (chan->flags & IEEE80211_CHAN_NO_IR)) {
+ scan_ch->type = 0; /* passive */
+ if (IL_UCODE_API(il->ucode_ver) == 1)
+ scan_ch->active_dwell =
+--- a/drivers/net/wireless/iwlegacy/4965-mac.c
++++ b/drivers/net/wireless/iwlegacy/4965-mac.c
+@@ -805,7 +805,7 @@ il4965_get_channels_for_scan(struct il_p
+ }
+
+ if (!is_active || il_is_channel_passive(ch_info) ||
+- (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
++ (chan->flags & IEEE80211_CHAN_NO_IR))
+ scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
+ else
+ scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
+--- a/drivers/net/wireless/iwlegacy/common.c
++++ b/drivers/net/wireless/iwlegacy/common.c
+@@ -3447,10 +3447,10 @@ il_init_geos(struct il_priv *il)
+
+ if (il_is_channel_valid(ch)) {
+ if (!(ch->flags & EEPROM_CHANNEL_IBSS))
+- geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
++ geo_ch->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
+- geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
++ geo_ch->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (ch->flags & EEPROM_CHANNEL_RADAR)
+ geo_ch->flags |= IEEE80211_CHAN_RADAR;
+--- a/drivers/net/wireless/iwlegacy/debug.c
++++ b/drivers/net/wireless/iwlegacy/debug.c
+@@ -567,12 +567,12 @@ il_dbgfs_channels_read(struct file *file
+ flags & IEEE80211_CHAN_RADAR ?
+ " (IEEE 802.11h required)" : "",
+ ((channels[i].
+- flags & IEEE80211_CHAN_NO_IBSS) ||
++ flags & IEEE80211_CHAN_NO_IR) ||
+ (channels[i].
+ flags & IEEE80211_CHAN_RADAR)) ? "" :
+ ", IBSS",
+ channels[i].
+- flags & IEEE80211_CHAN_PASSIVE_SCAN ?
++ flags & IEEE80211_CHAN_NO_IR ?
+ "passive only" : "active/passive");
+ }
+ supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ);
+@@ -594,12 +594,12 @@ il_dbgfs_channels_read(struct file *file
+ flags & IEEE80211_CHAN_RADAR ?
+ " (IEEE 802.11h required)" : "",
+ ((channels[i].
+- flags & IEEE80211_CHAN_NO_IBSS) ||
++ flags & IEEE80211_CHAN_NO_IR) ||
+ (channels[i].
+ flags & IEEE80211_CHAN_RADAR)) ? "" :
+ ", IBSS",
+ channels[i].
+- flags & IEEE80211_CHAN_PASSIVE_SCAN ?
++ flags & IEEE80211_CHAN_NO_IR ?
+ "passive only" : "active/passive");
+ }
+ ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
+--- a/drivers/net/wireless/iwlwifi/dvm/debugfs.c
++++ b/drivers/net/wireless/iwlwifi/dvm/debugfs.c
+@@ -352,12 +352,12 @@ static ssize_t iwl_dbgfs_channels_read(s
+ channels[i].max_power,
+ channels[i].flags & IEEE80211_CHAN_RADAR ?
+ " (IEEE 802.11h required)" : "",
+- ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
++ ((channels[i].flags & IEEE80211_CHAN_NO_IR)
+ || (channels[i].flags &
+ IEEE80211_CHAN_RADAR)) ? "" :
+ ", IBSS",
+ channels[i].flags &
+- IEEE80211_CHAN_PASSIVE_SCAN ?
++ IEEE80211_CHAN_NO_IR ?
+ "passive only" : "active/passive");
+ }
+ supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
+@@ -375,12 +375,12 @@ static ssize_t iwl_dbgfs_channels_read(s
+ channels[i].max_power,
+ channels[i].flags & IEEE80211_CHAN_RADAR ?
+ " (IEEE 802.11h required)" : "",
+- ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
++ ((channels[i].flags & IEEE80211_CHAN_NO_IR)
+ || (channels[i].flags &
+ IEEE80211_CHAN_RADAR)) ? "" :
+ ", IBSS",
+ channels[i].flags &
+- IEEE80211_CHAN_PASSIVE_SCAN ?
++ IEEE80211_CHAN_NO_IR ?
+ "passive only" : "active/passive");
+ }
+ ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
+--- a/drivers/net/wireless/iwlwifi/dvm/scan.c
++++ b/drivers/net/wireless/iwlwifi/dvm/scan.c
+@@ -544,7 +544,7 @@ static int iwl_get_channels_for_scan(str
+ channel = chan->hw_value;
+ scan_ch->channel = cpu_to_le16(channel);
+
+- if (!is_active || (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
++ if (!is_active || (chan->flags & IEEE80211_CHAN_NO_IR))
+ scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
+ else
+ scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
+--- a/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
++++ b/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
+@@ -614,10 +614,10 @@ static int iwl_init_channel_map(struct d
+ channel->flags = IEEE80211_CHAN_NO_HT40;
+
+ if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
+- channel->flags |= IEEE80211_CHAN_NO_IBSS;
++ channel->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
+- channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
++ channel->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
+ channel->flags |= IEEE80211_CHAN_RADAR;
+--- a/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
++++ b/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
+@@ -223,10 +223,10 @@ static int iwl_init_channel_map(struct d
+ channel->flags |= IEEE80211_CHAN_NO_160MHZ;
+
+ if (!(ch_flags & NVM_CHANNEL_IBSS))
+- channel->flags |= IEEE80211_CHAN_NO_IBSS;
++ channel->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (!(ch_flags & NVM_CHANNEL_ACTIVE))
+- channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
++ channel->flags |= IEEE80211_CHAN_NO_IR;
+
+ if (ch_flags & NVM_CHANNEL_RADAR)
+ channel->flags |= IEEE80211_CHAN_RADAR;
+--- a/drivers/net/wireless/iwlwifi/mvm/scan.c
++++ b/drivers/net/wireless/iwlwifi/mvm/scan.c
+@@ -192,7 +192,7 @@ static void iwl_mvm_scan_fill_channels(s
+ for (i = 0; i < cmd->channel_count; i++) {
+ chan->channel = cpu_to_le16(req->channels[i]->hw_value);
+ chan->type = cpu_to_le32(type);
+- if (req->channels[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN)
++ if (req->channels[i]->flags & IEEE80211_CHAN_NO_IR)
+ chan->type &= cpu_to_le32(~SCAN_CHANNEL_TYPE_ACTIVE);
+ chan->active_dwell = cpu_to_le16(active_dwell);
+ chan->passive_dwell = cpu_to_le16(passive_dwell);
+@@ -642,7 +642,7 @@ static void iwl_build_channel_cfg(struct
+ channels->iter_count[index] = cpu_to_le16(1);
+ channels->iter_interval[index] = 0;
+
+- if (!(s_band->channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
++ if (!(s_band->channels[i].flags & IEEE80211_CHAN_NO_IR))
+ channels->type[index] |=
+ cpu_to_le32(IWL_SCAN_OFFLOAD_CHANNEL_ACTIVE);
+
+--- a/drivers/net/wireless/mac80211_hwsim.c
++++ b/drivers/net/wireless/mac80211_hwsim.c
+@@ -159,7 +159,7 @@ static const struct ieee80211_regdomain
+ .reg_rules = {
+ REG_RULE(2412-10, 2462+10, 40, 0, 20, 0),
+ REG_RULE(5725-10, 5850+10, 40, 0, 30,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+ }
+ };
+
+@@ -1485,7 +1485,7 @@ static void hw_scan_work(struct work_str
+ req->channels[hwsim->scan_chan_idx]->center_freq);
+
+ hwsim->tmp_chan = req->channels[hwsim->scan_chan_idx];
+- if (hwsim->tmp_chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
++ if (hwsim->tmp_chan->flags & IEEE80211_CHAN_NO_IR ||
+ !req->n_ssids) {
+ dwell = 120;
+ } else {
+--- a/drivers/net/wireless/mwifiex/cfg80211.c
++++ b/drivers/net/wireless/mwifiex/cfg80211.c
+@@ -50,24 +50,24 @@ static const struct ieee80211_regdomain
+ REG_RULE(2412-10, 2462+10, 40, 3, 20, 0),
+ /* Channel 12 - 13 */
+ REG_RULE(2467-10, 2472+10, 20, 3, 20,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+ /* Channel 14 */
+ REG_RULE(2484-10, 2484+10, 20, 3, 20,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_NO_OFDM),
+ /* Channel 36 - 48 */
+ REG_RULE(5180-10, 5240+10, 40, 3, 20,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+ /* Channel 149 - 165 */
+ REG_RULE(5745-10, 5825+10, 40, 3, 20,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+ /* Channel 52 - 64 */
+ REG_RULE(5260-10, 5320+10, 40, 3, 30,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_DFS),
+ /* Channel 100 - 140 */
+ REG_RULE(5500-10, 5700+10, 40, 3, 30,
+- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_DFS),
+ }
+ };
+@@ -1968,7 +1968,7 @@ mwifiex_cfg80211_scan(struct wiphy *wiph
+ user_scan_cfg->chan_list[i].chan_number = chan->hw_value;
+ user_scan_cfg->chan_list[i].radio_type = chan->band;
+
+- if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
++ if (chan->flags & IEEE80211_CHAN_NO_IR)
+ user_scan_cfg->chan_list[i].scan_type =
+ MWIFIEX_SCAN_TYPE_PASSIVE;
+ else
+--- a/drivers/net/wireless/mwifiex/scan.c
++++ b/drivers/net/wireless/mwifiex/scan.c
+@@ -515,14 +515,14 @@ mwifiex_scan_create_channel_list(struct
+ scan_chan_list[chan_idx].max_scan_time =
+ cpu_to_le16((u16) user_scan_in->
+ chan_list[0].scan_time);
+- else if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
++ else if (ch->flags & IEEE80211_CHAN_NO_IR)
+ scan_chan_list[chan_idx].max_scan_time =
+ cpu_to_le16(adapter->passive_scan_time);
+ else
+ scan_chan_list[chan_idx].max_scan_time =
+ cpu_to_le16(adapter->active_scan_time);
+
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
+ scan_chan_list[chan_idx].chan_scan_mode_bitmap
+ |= MWIFIEX_PASSIVE_SCAN;
+ else
+--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
++++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
+@@ -146,7 +146,7 @@ void rt2x00queue_remove_l2pad(struct sk_
+ * @local: frame is not from mac80211
+ */
+ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
+- bool local);
++ struct ieee80211_sta *sta, bool local);
+
+ /**
+ * rt2x00queue_update_beacon - Send new beacon from mac80211
+--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
++++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
+@@ -90,7 +90,7 @@ static int rt2x00mac_tx_rts_cts(struct r
+ frag_skb->data, data_length, tx_info,
+ (struct ieee80211_rts *)(skb->data));
+
+- retval = rt2x00queue_write_tx_frame(queue, skb, true);
++ retval = rt2x00queue_write_tx_frame(queue, skb, NULL, true);
+ if (retval) {
+ dev_kfree_skb_any(skb);
+ rt2x00_warn(rt2x00dev, "Failed to send RTS/CTS frame\n");
+@@ -151,7 +151,7 @@ void rt2x00mac_tx(struct ieee80211_hw *h
+ goto exit_fail;
+ }
+
+- if (unlikely(rt2x00queue_write_tx_frame(queue, skb, false)))
++ if (unlikely(rt2x00queue_write_tx_frame(queue, skb, control->sta, false)))
+ goto exit_fail;
+
+ /*
+--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
++++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
+@@ -635,7 +635,7 @@ static void rt2x00queue_bar_check(struct
+ }
+
+ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
+- bool local)
++ struct ieee80211_sta *sta, bool local)
+ {
+ struct ieee80211_tx_info *tx_info;
+ struct queue_entry *entry;
+@@ -649,7 +649,7 @@ int rt2x00queue_write_tx_frame(struct da
+ * after that we are free to use the skb->cb array
+ * for our information.
+ */
+- rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, NULL);
++ rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
+
+ /*
+ * All information is retrieved from the skb->cb array,
+--- a/drivers/net/wireless/rtl818x/rtl8187/dev.c
++++ b/drivers/net/wireless/rtl818x/rtl8187/dev.c
+@@ -416,7 +416,7 @@ static int rtl8187_init_urbs(struct ieee
+ struct rtl8187_rx_info *info;
+ int ret = 0;
+
+- while (skb_queue_len(&priv->rx_queue) < 16) {
++ while (skb_queue_len(&priv->rx_queue) < 32) {
+ skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
+ if (!skb) {
+ ret = -ENOMEM;
+--- a/drivers/net/wireless/rtlwifi/base.c
++++ b/drivers/net/wireless/rtlwifi/base.c
+@@ -1078,8 +1078,8 @@ u8 rtl_is_special_data(struct ieee80211_
+
+ ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
+ SNAP_SIZE + PROTOC_TYPE_SIZE);
+- ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
+- /* ether_type = ntohs(ether_type); */
++ ether_type = be16_to_cpu(*(__be16 *)((u8 *)skb->data + mac_hdr_len +
++ SNAP_SIZE));
+
+ if (ETH_P_IP == ether_type) {
+ if (IPPROTO_UDP == ip->protocol) {
+--- a/drivers/net/wireless/rtlwifi/regd.c
++++ b/drivers/net/wireless/rtlwifi/regd.c
+@@ -59,30 +59,27 @@ static struct country_code_to_enum_rd al
+ */
+ #define RTL819x_2GHZ_CH12_13 \
+ REG_RULE(2467-10, 2472+10, 40, 0, 20,\
+- NL80211_RRF_PASSIVE_SCAN)
++ NL80211_RRF_NO_IR)
+
+ #define RTL819x_2GHZ_CH14 \
+ REG_RULE(2484-10, 2484+10, 40, 0, 20, \
+- NL80211_RRF_PASSIVE_SCAN | \
++ NL80211_RRF_NO_IR | \
+ NL80211_RRF_NO_OFDM)
+
+ /* 5G chan 36 - chan 64*/
+ #define RTL819x_5GHZ_5150_5350 \
+ REG_RULE(5150-10, 5350+10, 40, 0, 30, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ /* 5G chan 100 - chan 165*/
+ #define RTL819x_5GHZ_5470_5850 \
+ REG_RULE(5470-10, 5850+10, 40, 0, 30, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ /* 5G chan 149 - chan 165*/
+ #define RTL819x_5GHZ_5725_5850 \
+ REG_RULE(5725-10, 5850+10, 40, 0, 30, \
+- NL80211_RRF_PASSIVE_SCAN | \
+- NL80211_RRF_NO_IBSS)
++ NL80211_RRF_NO_IR)
+
+ #define RTL819x_5GHZ_ALL \
+ (RTL819x_5GHZ_5150_5350, RTL819x_5GHZ_5470_5850)
+@@ -185,16 +182,15 @@ static void _rtl_reg_apply_beaconing_fla
+ *regulatory_hint().
+ */
+
+- if (!(reg_rule->flags & NL80211_RRF_NO_IBSS))
+- ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
++ if (!(reg_rule->flags & NL80211_RRF_NO_IR))
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ if (!(reg_rule->
+- flags & NL80211_RRF_PASSIVE_SCAN))
++ flags & NL80211_RRF_NO_IR))
+ ch->flags &=
+- ~IEEE80211_CHAN_PASSIVE_SCAN;
++ ~IEEE80211_CHAN_NO_IR;
+ } else {
+ if (ch->beacon_found)
+- ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN);
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+ }
+ }
+@@ -219,11 +215,11 @@ static void _rtl_reg_apply_active_scan_f
+ */
+ if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
+ ch = &sband->channels[11]; /* CH 12 */
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ ch = &sband->channels[12]; /* CH 13 */
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ return;
+ }
+
+@@ -237,17 +233,17 @@ static void _rtl_reg_apply_active_scan_f
+ ch = &sband->channels[11]; /* CH 12 */
+ reg_rule = freq_reg_info(wiphy, ch->center_freq);
+ if (!IS_ERR(reg_rule)) {
+- if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (!(reg_rule->flags & NL80211_RRF_NO_IR))
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+
+ ch = &sband->channels[12]; /* CH 13 */
+ reg_rule = freq_reg_info(wiphy, ch->center_freq);
+ if (!IS_ERR(reg_rule)) {
+- if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+- if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+- ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
++ if (!(reg_rule->flags & NL80211_RRF_NO_IR))
++ if (ch->flags & IEEE80211_CHAN_NO_IR)
++ ch->flags &= ~IEEE80211_CHAN_NO_IR;
+ }
+ }
+
+@@ -284,8 +280,8 @@ static void _rtl_reg_apply_radar_flags(s
+ */
+ if (!(ch->flags & IEEE80211_CHAN_DISABLED))
+ ch->flags |= IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_NO_IR;
+ }
+ }
+
+--- a/drivers/net/wireless/ti/wl12xx/scan.c
++++ b/drivers/net/wireless/ti/wl12xx/scan.c
+@@ -47,7 +47,7 @@ static int wl1271_get_scan_channels(stru
+ * In active scans, we only scan channels not
+ * marked as passive.
+ */
+- (passive || !(flags & IEEE80211_CHAN_PASSIVE_SCAN))) {
++ (passive || !(flags & IEEE80211_CHAN_NO_IR))) {
+ wl1271_debug(DEBUG_SCAN, "band %d, center_freq %d ",
+ req->channels[i]->band,
+ req->channels[i]->center_freq);
+--- a/drivers/net/wireless/ti/wlcore/cmd.c
++++ b/drivers/net/wireless/ti/wlcore/cmd.c
+@@ -1688,7 +1688,7 @@ int wlcore_cmd_regdomain_config_locked(s
+
+ if (channel->flags & (IEEE80211_CHAN_DISABLED |
+ IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_PASSIVE_SCAN))
++ IEEE80211_CHAN_NO_IR))
+ continue;
+
+ ch_bit_idx = wlcore_get_reg_conf_ch_idx(b, ch);
+--- a/drivers/net/wireless/ti/wlcore/main.c
++++ b/drivers/net/wireless/ti/wlcore/main.c
+@@ -91,8 +91,7 @@ static void wl1271_reg_notify(struct wip
+ continue;
+
+ if (ch->flags & IEEE80211_CHAN_RADAR)
+- ch->flags |= IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN;
++ ch->flags |= IEEE80211_CHAN_NO_IR;
+
+ }
+
+--- a/drivers/net/wireless/ti/wlcore/scan.c
++++ b/drivers/net/wireless/ti/wlcore/scan.c
+@@ -189,14 +189,14 @@ wlcore_scan_get_channels(struct wl1271 *
+ flags = req_channels[i]->flags;
+
+ if (force_passive)
+- flags |= IEEE80211_CHAN_PASSIVE_SCAN;
++ flags |= IEEE80211_CHAN_NO_IR;
+
+ if ((req_channels[i]->band == band) &&
+ !(flags & IEEE80211_CHAN_DISABLED) &&
+ (!!(flags & IEEE80211_CHAN_RADAR) == radar) &&
+ /* if radar is set, we ignore the passive flag */
+ (radar ||
+- !!(flags & IEEE80211_CHAN_PASSIVE_SCAN) == passive)) {
++ !!(flags & IEEE80211_CHAN_NO_IR) == passive)) {
+
+
+ if (flags & IEEE80211_CHAN_RADAR) {
+@@ -221,7 +221,7 @@ wlcore_scan_get_channels(struct wl1271 *
+ (band == IEEE80211_BAND_2GHZ) &&
+ (channels[j].channel >= 12) &&
+ (channels[j].channel <= 14) &&
+- (flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
++ (flags & IEEE80211_CHAN_NO_IR) &&
+ !force_passive) {
+ /* pactive channels treated as DFS */
+ channels[j].flags = SCAN_CHANNEL_FLAGS_DFS;
+@@ -244,7 +244,7 @@ wlcore_scan_get_channels(struct wl1271 *
+ max_dwell_time_active,
+ flags & IEEE80211_CHAN_RADAR ?
+ ", DFS" : "",
+- flags & IEEE80211_CHAN_PASSIVE_SCAN ?
++ flags & IEEE80211_CHAN_NO_IR ?
+ ", PASSIVE" : "");
+ j++;
+ }
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -91,9 +91,8 @@ enum ieee80211_band {
+ * Channel flags set by the regulatory control code.
+ *
+ * @IEEE80211_CHAN_DISABLED: This channel is disabled.
+- * @IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
+- * on this channel.
+- * @IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
++ * @IEEE80211_CHAN_NO_IR: do not initiate radiation, this includes
++ * sending probe requests or beaconing.
+ * @IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
+ * @IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel
+ * is not permitted.
+@@ -113,8 +112,8 @@ enum ieee80211_band {
+ */
+ enum ieee80211_channel_flags {
+ IEEE80211_CHAN_DISABLED = 1<<0,
+- IEEE80211_CHAN_PASSIVE_SCAN = 1<<1,
+- IEEE80211_CHAN_NO_IBSS = 1<<2,
++ IEEE80211_CHAN_NO_IR = 1<<1,
++ /* hole at 1<<2 */
+ IEEE80211_CHAN_RADAR = 1<<3,
+ IEEE80211_CHAN_NO_HT40PLUS = 1<<4,
+ IEEE80211_CHAN_NO_HT40MINUS = 1<<5,
+@@ -4149,6 +4148,7 @@ void cfg80211_radar_event(struct wiphy *
+ /**
+ * cfg80211_cac_event - Channel availability check (CAC) event
+ * @netdev: network device
++ * @chandef: chandef for the current channel
+ * @event: type of event
+ * @gfp: context flags
+ *
+@@ -4157,6 +4157,7 @@ void cfg80211_radar_event(struct wiphy *
+ * also by full-MAC drivers.
+ */
+ void cfg80211_cac_event(struct net_device *netdev,
++ const struct cfg80211_chan_def *chandef,
+ enum nl80211_radar_event event, gfp_t gfp);
+
+
+@@ -4282,7 +4283,8 @@ bool cfg80211_reg_can_beacon(struct wiph
+ * @dev: the device which switched channels
+ * @chandef: the new channel definition
+ *
+- * Acquires wdev_lock, so must only be called from sleepable driver context!
++ * Caller must acquire wdev_lock, therefore must only be called from sleepable
++ * driver context!
+ */
+ void cfg80211_ch_switch_notify(struct net_device *dev,
+ struct cfg80211_chan_def *chandef);
+--- a/include/uapi/linux/nl80211.h
++++ b/include/uapi/linux/nl80211.h
+@@ -1508,6 +1508,12 @@ enum nl80211_commands {
+ * to react to radar events, e.g. initiate a channel switch or leave the
+ * IBSS network.
+ *
++ * @NL80211_ATTR_SUPPORT_5_MHZ: A flag indicating that the device supports
++ * 5 MHz channel bandwidth.
++ *
++ * @NL80211_ATTR_SUPPORT_10_MHZ: A flag indicating that the device supports
++ * 10 MHz channel bandwidth.
++ *
+ * @NL80211_ATTR_MAX: highest attribute number currently defined
+ * @__NL80211_ATTR_AFTER_LAST: internal use
+ */
+@@ -1824,6 +1830,9 @@ enum nl80211_attrs {
+
+ NL80211_ATTR_HANDLE_DFS,
+
++ NL80211_ATTR_SUPPORT_5_MHZ,
++ NL80211_ATTR_SUPPORT_10_MHZ,
++
+ /* add attributes here, update the policy in nl80211.c */
+
+ __NL80211_ATTR_AFTER_LAST,
+@@ -2224,10 +2233,9 @@ enum nl80211_band_attr {
+ * @NL80211_FREQUENCY_ATTR_FREQ: Frequency in MHz
+ * @NL80211_FREQUENCY_ATTR_DISABLED: Channel is disabled in current
+ * regulatory domain.
+- * @NL80211_FREQUENCY_ATTR_PASSIVE_SCAN: Only passive scanning is
+- * permitted on this channel in current regulatory domain.
+- * @NL80211_FREQUENCY_ATTR_NO_IBSS: IBSS networks are not permitted
+- * on this channel in current regulatory domain.
++ * @NL80211_FREQUENCY_ATTR_NO_IR: no mechanisms that initiate radiation
++ * are permitted on this channel, this includes sending probe
++ * requests, or modes of operation that require beaconing.
+ * @NL80211_FREQUENCY_ATTR_RADAR: Radar detection is mandatory
+ * on this channel in current regulatory domain.
+ * @NL80211_FREQUENCY_ATTR_MAX_TX_POWER: Maximum transmission power in mBm
+@@ -2254,8 +2262,8 @@ enum nl80211_frequency_attr {
+ __NL80211_FREQUENCY_ATTR_INVALID,
+ NL80211_FREQUENCY_ATTR_FREQ,
+ NL80211_FREQUENCY_ATTR_DISABLED,
+- NL80211_FREQUENCY_ATTR_PASSIVE_SCAN,
+- NL80211_FREQUENCY_ATTR_NO_IBSS,
++ NL80211_FREQUENCY_ATTR_NO_IR,
++ __NL80211_FREQUENCY_ATTR_NO_IBSS,
+ NL80211_FREQUENCY_ATTR_RADAR,
+ NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
+ NL80211_FREQUENCY_ATTR_DFS_STATE,
+@@ -2271,6 +2279,9 @@ enum nl80211_frequency_attr {
+ };
+
+ #define NL80211_FREQUENCY_ATTR_MAX_TX_POWER NL80211_FREQUENCY_ATTR_MAX_TX_POWER
++#define NL80211_FREQUENCY_ATTR_PASSIVE_SCAN NL80211_FREQUENCY_ATTR_NO_IR
++#define NL80211_FREQUENCY_ATTR_NO_IBSS NL80211_FREQUENCY_ATTR_NO_IR
++#define NL80211_FREQUENCY_ATTR_NO_IR NL80211_FREQUENCY_ATTR_NO_IR
+
+ /**
+ * enum nl80211_bitrate_attr - bitrate attributes
+@@ -2413,8 +2424,9 @@ enum nl80211_sched_scan_match_attr {
+ * @NL80211_RRF_DFS: DFS support is required to be used
+ * @NL80211_RRF_PTP_ONLY: this is only for Point To Point links
+ * @NL80211_RRF_PTMP_ONLY: this is only for Point To Multi Point links
+- * @NL80211_RRF_PASSIVE_SCAN: passive scan is required
+- * @NL80211_RRF_NO_IBSS: no IBSS is allowed
++ * @NL80211_RRF_NO_IR: no mechanisms that initiate radiation are allowed,
++ * this includes probe requests or modes of operation that require
++ * beaconing.
+ */
+ enum nl80211_reg_rule_flags {
+ NL80211_RRF_NO_OFDM = 1<<0,
+@@ -2424,10 +2436,17 @@ enum nl80211_reg_rule_flags {
+ NL80211_RRF_DFS = 1<<4,
+ NL80211_RRF_PTP_ONLY = 1<<5,
+ NL80211_RRF_PTMP_ONLY = 1<<6,
+- NL80211_RRF_PASSIVE_SCAN = 1<<7,
+- NL80211_RRF_NO_IBSS = 1<<8,
++ NL80211_RRF_NO_IR = 1<<7,
++ __NL80211_RRF_NO_IBSS = 1<<8,
+ };
+
++#define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR
++#define NL80211_RRF_NO_IBSS NL80211_RRF_NO_IR
++#define NL80211_RRF_NO_IR NL80211_RRF_NO_IR
++
++/* For backport compatibility with older userspace */
++#define NL80211_RRF_NO_IR_ALL (NL80211_RRF_NO_IR | __NL80211_RRF_NO_IBSS)
++
+ /**
+ * enum nl80211_dfs_regions - regulatory DFS regions
+ *
+--- a/net/mac80211/cfg.c
++++ b/net/mac80211/cfg.c
+@@ -846,7 +846,7 @@ static int ieee80211_set_probe_resp(stru
+ if (!resp || !resp_len)
+ return 1;
+
+- old = rtnl_dereference(sdata->u.ap.probe_resp);
++ old = sdata_dereference(sdata->u.ap.probe_resp, sdata);
+
+ new = kzalloc(sizeof(struct probe_resp) + resp_len, GFP_KERNEL);
+ if (!new)
+@@ -870,7 +870,8 @@ int ieee80211_assign_beacon(struct ieee8
+ int size, err;
+ u32 changed = BSS_CHANGED_BEACON;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
++
+
+ /* Need to have a beacon head if we don't have one yet */
+ if (!params->head && !old)
+@@ -947,7 +948,7 @@ static int ieee80211_start_ap(struct wip
+ BSS_CHANGED_P2P_PS;
+ int err;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
+ if (old)
+ return -EALREADY;
+
+@@ -1001,7 +1002,8 @@ static int ieee80211_start_ap(struct wip
+
+ err = drv_start_ap(sdata->local, sdata);
+ if (err) {
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
++
+ if (old)
+ kfree_rcu(old, rcu_head);
+ RCU_INIT_POINTER(sdata->u.ap.beacon, NULL);
+@@ -1032,7 +1034,7 @@ static int ieee80211_change_beacon(struc
+ if (sdata->vif.csa_active)
+ return -EBUSY;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
+ if (!old)
+ return -ENOENT;
+
+@@ -1050,15 +1052,18 @@ static int ieee80211_stop_ap(struct wiph
+ struct ieee80211_local *local = sdata->local;
+ struct beacon_data *old_beacon;
+ struct probe_resp *old_probe_resp;
++ struct cfg80211_chan_def chandef;
+
+- old_beacon = rtnl_dereference(sdata->u.ap.beacon);
++ old_beacon = sdata_dereference(sdata->u.ap.beacon, sdata);
+ if (!old_beacon)
+ return -ENOENT;
+- old_probe_resp = rtnl_dereference(sdata->u.ap.probe_resp);
++ old_probe_resp = sdata_dereference(sdata->u.ap.probe_resp, sdata);
+
+ /* abort any running channel switch */
+ sdata->vif.csa_active = false;
+- cancel_work_sync(&sdata->csa_finalize_work);
++ kfree(sdata->u.ap.next_beacon);
++ sdata->u.ap.next_beacon = NULL;
++
+ cancel_work_sync(&sdata->u.ap.request_smps_work);
+
+ /* turn off carrier for this interface and dependent VLANs */
+@@ -1091,8 +1096,10 @@ static int ieee80211_stop_ap(struct wiph
+ ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED);
+
+ if (sdata->wdev.cac_started) {
++ chandef = sdata->vif.bss_conf.chandef;
+ cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
+- cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
++ cfg80211_cac_event(sdata->dev, &chandef,
++ NL80211_RADAR_CAC_ABORTED,
+ GFP_KERNEL);
+ }
+
+@@ -1368,7 +1375,7 @@ static int sta_apply_parameters(struct i
+ changed |=
+ ieee80211_mps_set_sta_local_pm(sta,
+ params->local_pm);
+- ieee80211_bss_info_change_notify(sdata, changed);
++ ieee80211_mbss_info_change_notify(sdata, changed);
+ #endif
+ }
+
+@@ -1953,7 +1960,7 @@ static int ieee80211_change_bss(struct w
+ enum ieee80211_band band;
+ u32 changed = 0;
+
+- if (!rtnl_dereference(sdata->u.ap.beacon))
++ if (!sdata_dereference(sdata->u.ap.beacon, sdata))
+ return -ENOENT;
+
+ band = ieee80211_get_sdata_band(sdata);
+@@ -2964,27 +2971,33 @@ void ieee80211_csa_finalize_work(struct
+ struct ieee80211_local *local = sdata->local;
+ int err, changed = 0;
+
++ sdata_lock(sdata);
++ /* AP might have been stopped while waiting for the lock. */
++ if (!sdata->vif.csa_active)
++ goto unlock;
++
+ if (!ieee80211_sdata_running(sdata))
+- return;
++ goto unlock;
+
+ sdata->radar_required = sdata->csa_radar_required;
+- err = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
+- &changed);
++ err = ieee80211_vif_change_channel(sdata, &changed);
+ if (WARN_ON(err < 0))
+- return;
++ goto unlock;
+
+ if (!local->use_chanctx) {
+- local->_oper_chandef = local->csa_chandef;
++ local->_oper_chandef = sdata->csa_chandef;
+ ieee80211_hw_config(local, 0);
+ }
+
+ ieee80211_bss_info_change_notify(sdata, changed);
+
++ sdata->vif.csa_active = false;
+ switch (sdata->vif.type) {
+ case NL80211_IFTYPE_AP:
+ err = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon);
+ if (err < 0)
+- return;
++ goto unlock;
++
+ changed |= err;
+ kfree(sdata->u.ap.next_beacon);
+ sdata->u.ap.next_beacon = NULL;
+@@ -2998,20 +3011,22 @@ void ieee80211_csa_finalize_work(struct
+ case NL80211_IFTYPE_MESH_POINT:
+ err = ieee80211_mesh_finish_csa(sdata);
+ if (err < 0)
+- return;
++ goto unlock;
+ break;
+ #endif
+ default:
+ WARN_ON(1);
+- return;
++ goto unlock;
+ }
+- sdata->vif.csa_active = false;
+
+ ieee80211_wake_queues_by_reason(&sdata->local->hw,
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- cfg80211_ch_switch_notify(sdata->dev, &local->csa_chandef);
++ cfg80211_ch_switch_notify(sdata->dev, &sdata->csa_chandef);
++
++unlock:
++ sdata_unlock(sdata);
+ }
+
+ static int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
+@@ -3024,6 +3039,8 @@ static int ieee80211_channel_switch(stru
+ struct ieee80211_if_mesh __maybe_unused *ifmsh;
+ int err, num_chanctx;
+
++ lockdep_assert_held(&sdata->wdev.mtx);
++
+ if (!list_empty(&local->roc_list) || local->scanning)
+ return -EBUSY;
+
+@@ -3120,9 +3137,17 @@ static int ieee80211_channel_switch(stru
+ params->chandef.chan->band)
+ return -EINVAL;
+
++ ifmsh->chsw_init = true;
++ if (!ifmsh->pre_value)
++ ifmsh->pre_value = 1;
++ else
++ ifmsh->pre_value++;
++
+ err = ieee80211_mesh_csa_beacon(sdata, params, true);
+- if (err < 0)
++ if (err < 0) {
++ ifmsh->chsw_init = false;
+ return err;
++ }
+ break;
+ #endif
+ default:
+@@ -3136,7 +3161,7 @@ static int ieee80211_channel_switch(stru
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- local->csa_chandef = params->chandef;
++ sdata->csa_chandef = params->chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
+--- a/net/mac80211/iface.c
++++ b/net/mac80211/iface.c
+@@ -749,6 +749,7 @@ static void ieee80211_do_stop(struct iee
+ u32 hw_reconf_flags = 0;
+ int i, flushed;
+ struct ps_data *ps;
++ struct cfg80211_chan_def chandef;
+
+ clear_bit(SDATA_STATE_RUNNING, &sdata->state);
+
+@@ -828,11 +829,13 @@ static void ieee80211_do_stop(struct iee
+ cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
+
+ if (sdata->wdev.cac_started) {
++ chandef = sdata->vif.bss_conf.chandef;
+ WARN_ON(local->suspended);
+ mutex_lock(&local->iflist_mtx);
+ ieee80211_vif_release_channel(sdata);
+ mutex_unlock(&local->iflist_mtx);
+- cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
++ cfg80211_cac_event(sdata->dev, &chandef,
++ NL80211_RADAR_CAC_ABORTED,
+ GFP_KERNEL);
+ }
+
+@@ -1340,7 +1343,6 @@ static void ieee80211_setup_sdata(struct
+ sdata->vif.bss_conf.bssid = NULL;
+ break;
+ case NL80211_IFTYPE_AP_VLAN:
+- break;
+ case NL80211_IFTYPE_P2P_DEVICE:
+ sdata->vif.bss_conf.bssid = sdata->vif.addr;
+ break;
+--- a/net/mac80211/mlme.c
++++ b/net/mac80211/mlme.c
+@@ -886,8 +886,7 @@ static void ieee80211_chswitch_work(stru
+ if (!ifmgd->associated)
+ goto out;
+
+- ret = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
+- &changed);
++ ret = ieee80211_vif_change_channel(sdata, &changed);
+ if (ret) {
+ sdata_info(sdata,
+ "vif channel switch failed, disconnecting\n");
+@@ -897,7 +896,7 @@ static void ieee80211_chswitch_work(stru
+ }
+
+ if (!local->use_chanctx) {
+- local->_oper_chandef = local->csa_chandef;
++ local->_oper_chandef = sdata->csa_chandef;
+ /* Call "hw_config" only if doing sw channel switch.
+ * Otherwise update the channel directly
+ */
+@@ -908,7 +907,7 @@ static void ieee80211_chswitch_work(stru
+ }
+
+ /* XXX: shouldn't really modify cfg80211-owned data! */
+- ifmgd->associated->channel = local->csa_chandef.chan;
++ ifmgd->associated->channel = sdata->csa_chandef.chan;
+
+ /* XXX: wait for a beacon first? */
+ ieee80211_wake_queues_by_reason(&local->hw,
+@@ -1035,7 +1034,7 @@ ieee80211_sta_process_chanswitch(struct
+ }
+ mutex_unlock(&local->chanctx_mtx);
+
+- local->csa_chandef = csa_ie.chandef;
++ sdata->csa_chandef = csa_ie.chandef;
+
+ if (csa_ie.mode)
+ ieee80211_stop_queues_by_reason(&local->hw,
+@@ -1398,10 +1397,12 @@ void ieee80211_dfs_cac_timer_work(struct
+ struct ieee80211_sub_if_data *sdata =
+ container_of(delayed_work, struct ieee80211_sub_if_data,
+ dfs_cac_timer_work);
++ struct cfg80211_chan_def chandef = sdata->vif.bss_conf.chandef;
+
+ ieee80211_vif_release_channel(sdata);
+-
+- cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_FINISHED, GFP_KERNEL);
++ cfg80211_cac_event(sdata->dev, &chandef,
++ NL80211_RADAR_CAC_FINISHED,
++ GFP_KERNEL);
+ }
+
+ /* MLME */
+--- a/net/mac80211/rx.c
++++ b/net/mac80211/rx.c
+@@ -729,9 +729,7 @@ static void ieee80211_release_reorder_fr
+ lockdep_assert_held(&tid_agg_rx->reorder_lock);
+
+ while (ieee80211_sn_less(tid_agg_rx->head_seq_num, head_seq_num)) {
+- index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
+- tid_agg_rx->ssn) %
+- tid_agg_rx->buf_size;
++ index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
+ ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
+ frames);
+ }
+@@ -757,8 +755,7 @@ static void ieee80211_sta_reorder_releas
+ lockdep_assert_held(&tid_agg_rx->reorder_lock);
+
+ /* release the buffer until next missing frame */
+- index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
+- tid_agg_rx->ssn) % tid_agg_rx->buf_size;
++ index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
+ if (!tid_agg_rx->reorder_buf[index] &&
+ tid_agg_rx->stored_mpdu_num) {
+ /*
+@@ -793,15 +790,11 @@ static void ieee80211_sta_reorder_releas
+ } else while (tid_agg_rx->reorder_buf[index]) {
+ ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
+ frames);
+- index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
+- tid_agg_rx->ssn) %
+- tid_agg_rx->buf_size;
++ index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
+ }
+
+ if (tid_agg_rx->stored_mpdu_num) {
+- j = index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
+- tid_agg_rx->ssn) %
+- tid_agg_rx->buf_size;
++ j = index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
+
+ for (; j != (index - 1) % tid_agg_rx->buf_size;
+ j = (j + 1) % tid_agg_rx->buf_size) {
+@@ -861,8 +854,7 @@ static bool ieee80211_sta_manage_reorder
+
+ /* Now the new frame is always in the range of the reordering buffer */
+
+- index = ieee80211_sn_sub(mpdu_seq_num,
+- tid_agg_rx->ssn) % tid_agg_rx->buf_size;
++ index = mpdu_seq_num % tid_agg_rx->buf_size;
+
+ /* check if we already stored this frame */
+ if (tid_agg_rx->reorder_buf[index]) {
+@@ -911,7 +903,8 @@ static void ieee80211_rx_reorder_ampdu(s
+ u16 sc;
+ u8 tid, ack_policy;
+
+- if (!ieee80211_is_data_qos(hdr->frame_control))
++ if (!ieee80211_is_data_qos(hdr->frame_control) ||
++ is_multicast_ether_addr(hdr->addr1))
+ goto dont_reorder;
+
+ /*
+--- a/net/mac80211/scan.c
++++ b/net/mac80211/scan.c
+@@ -526,7 +526,7 @@ static int __ieee80211_start_scan(struct
+ ieee80211_hw_config(local, 0);
+
+ if ((req->channels[0]->flags &
+- IEEE80211_CHAN_PASSIVE_SCAN) ||
++ IEEE80211_CHAN_NO_IR) ||
+ !local->scan_req->n_ssids) {
+ next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
+ } else {
+@@ -572,7 +572,7 @@ ieee80211_scan_get_channel_time(struct i
+ * TODO: channel switching also consumes quite some time,
+ * add that delay as well to get a better estimation
+ */
+- if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
++ if (chan->flags & IEEE80211_CHAN_NO_IR)
+ return IEEE80211_PASSIVE_CHANNEL_TIME;
+ return IEEE80211_PROBE_DELAY + IEEE80211_CHANNEL_TIME;
+ }
+@@ -696,7 +696,7 @@ static void ieee80211_scan_state_set_cha
+ *
+ * In any case, it is not necessary for a passive scan.
+ */
+- if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
++ if (chan->flags & IEEE80211_CHAN_NO_IR ||
+ !local->scan_req->n_ssids) {
+ *next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
+ local->next_scan_state = SCAN_DECISION;
+@@ -881,7 +881,7 @@ int ieee80211_request_ibss_scan(struct i
+ struct ieee80211_channel *tmp_ch =
+ &local->hw.wiphy->bands[band]->channels[i];
+
+- if (tmp_ch->flags & (IEEE80211_CHAN_NO_IBSS |
++ if (tmp_ch->flags & (IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_DISABLED))
+ continue;
+
+@@ -895,7 +895,7 @@ int ieee80211_request_ibss_scan(struct i
+
+ local->int_scan_req->n_channels = n_ch;
+ } else {
+- if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IBSS |
++ if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_DISABLED)))
+ goto unlock;
+
+--- a/net/mac80211/tx.c
++++ b/net/mac80211/tx.c
+@@ -463,7 +463,6 @@ ieee80211_tx_h_unicast_ps_buf(struct iee
+ {
+ struct sta_info *sta = tx->sta;
+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx->skb);
+- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx->skb->data;
+ struct ieee80211_local *local = tx->local;
+
+ if (unlikely(!sta))
+@@ -474,15 +473,6 @@ ieee80211_tx_h_unicast_ps_buf(struct iee
+ !(info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER))) {
+ int ac = skb_get_queue_mapping(tx->skb);
+
+- /* only deauth, disassoc and action are bufferable MMPDUs */
+- if (ieee80211_is_mgmt(hdr->frame_control) &&
+- !ieee80211_is_deauth(hdr->frame_control) &&
+- !ieee80211_is_disassoc(hdr->frame_control) &&
+- !ieee80211_is_action(hdr->frame_control)) {
+- info->flags |= IEEE80211_TX_CTL_NO_PS_BUFFER;
+- return TX_CONTINUE;
+- }
+-
+ ps_dbg(sta->sdata, "STA %pM aid %d: PS buffer for AC %d\n",
+ sta->sta.addr, sta->sta.aid, ac);
+ if (tx->local->total_ps_buffered >= TOTAL_MAX_TX_BUFFER)
+@@ -525,9 +515,21 @@ ieee80211_tx_h_unicast_ps_buf(struct iee
+ static ieee80211_tx_result debug_noinline
+ ieee80211_tx_h_ps_buf(struct ieee80211_tx_data *tx)
+ {
++ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx->skb);
++ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx->skb->data;
++
+ if (unlikely(tx->flags & IEEE80211_TX_PS_BUFFERED))
+ return TX_CONTINUE;
+
++ /* only deauth, disassoc and action are bufferable MMPDUs */
++ if (ieee80211_is_mgmt(hdr->frame_control) &&
++ !ieee80211_is_deauth(hdr->frame_control) &&
++ !ieee80211_is_disassoc(hdr->frame_control) &&
++ !ieee80211_is_action(hdr->frame_control)) {
++ info->flags |= IEEE80211_TX_CTL_NO_PS_BUFFER;
++ return TX_CONTINUE;
++ }
++
+ if (tx->flags & IEEE80211_TX_UNICAST)
+ return ieee80211_tx_h_unicast_ps_buf(tx);
+ else
+@@ -1728,8 +1730,7 @@ netdev_tx_t ieee80211_monitor_start_xmit
+ * radar detection by itself. We can do that later by adding a
+ * monitor flag interfaces used for AP support.
+ */
+- if ((chan->flags & (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_RADAR |
+- IEEE80211_CHAN_PASSIVE_SCAN)))
++ if ((chan->flags & (IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_RADAR)))
+ goto fail_rcu;
+
+ ieee80211_xmit(sdata, skb, chan->band);
+@@ -2530,7 +2531,8 @@ struct sk_buff *ieee80211_beacon_get_tim
+ */
+ skb = dev_alloc_skb(local->tx_headroom +
+ beacon->head_len +
+- beacon->tail_len + 256);
++ beacon->tail_len + 256 +
++ local->hw.extra_beacon_tailroom);
+ if (!skb)
+ goto out;
+
+@@ -2562,7 +2564,8 @@ struct sk_buff *ieee80211_beacon_get_tim
+ ieee80211_update_csa(sdata, presp);
+
+
+- skb = dev_alloc_skb(local->tx_headroom + presp->head_len);
++ skb = dev_alloc_skb(local->tx_headroom + presp->head_len +
++ local->hw.extra_beacon_tailroom);
+ if (!skb)
+ goto out;
+ skb_reserve(skb, local->tx_headroom);
+@@ -2589,7 +2592,8 @@ struct sk_buff *ieee80211_beacon_get_tim
+ skb = dev_alloc_skb(local->tx_headroom +
+ bcn->head_len +
+ 256 + /* TIM IE */
+- bcn->tail_len);
++ bcn->tail_len +
++ local->hw.extra_beacon_tailroom);
+ if (!skb)
+ goto out;
+ skb_reserve(skb, local->tx_headroom);
+--- a/net/mac80211/util.c
++++ b/net/mac80211/util.c
+@@ -2259,14 +2259,17 @@ u64 ieee80211_calculate_rx_timestamp(str
+ void ieee80211_dfs_cac_cancel(struct ieee80211_local *local)
+ {
+ struct ieee80211_sub_if_data *sdata;
++ struct cfg80211_chan_def chandef;
+
+ mutex_lock(&local->iflist_mtx);
+ list_for_each_entry(sdata, &local->interfaces, list) {
+ cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
+
+ if (sdata->wdev.cac_started) {
++ chandef = sdata->vif.bss_conf.chandef;
+ ieee80211_vif_release_channel(sdata);
+ cfg80211_cac_event(sdata->dev,
++ &chandef,
+ NL80211_RADAR_CAC_ABORTED,
+ GFP_KERNEL);
+ }
+@@ -2459,16 +2462,146 @@ int ieee80211_send_action_csa(struct iee
+ WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT : 0x00;
+ put_unaligned_le16(WLAN_REASON_MESH_CHAN, pos); /* Reason Cd */
+ pos += 2;
+- if (!ifmsh->pre_value)
+- ifmsh->pre_value = 1;
+- else
+- ifmsh->pre_value++;
+ pre_value = cpu_to_le16(ifmsh->pre_value);
+ memcpy(pos, &pre_value, 2); /* Precedence Value */
+ pos += 2;
+- ifmsh->chsw_init = true;
+ }
+
+ ieee80211_tx_skb(sdata, skb);
+ return 0;
+ }
++
++static bool
++ieee80211_extend_noa_desc(struct ieee80211_noa_data *data, u32 tsf, int i)
++{
++ s32 end = data->desc[i].start + data->desc[i].duration - (tsf + 1);
++ int skip;
++
++ if (end > 0)
++ return false;
++
++ /* End time is in the past, check for repetitions */
++ skip = DIV_ROUND_UP(-end, data->desc[i].interval);
++ if (data->count[i] < 255) {
++ if (data->count[i] <= skip) {
++ data->count[i] = 0;
++ return false;
++ }
++
++ data->count[i] -= skip;
++ }
++
++ data->desc[i].start += skip * data->desc[i].interval;
++
++ return true;
++}
++
++static bool
++ieee80211_extend_absent_time(struct ieee80211_noa_data *data, u32 tsf,
++ s32 *offset)
++{
++ bool ret = false;
++ int i;
++
++ for (i = 0; i < IEEE80211_P2P_NOA_DESC_MAX; i++) {
++ s32 cur;
++
++ if (!data->count[i])
++ continue;
++
++ if (ieee80211_extend_noa_desc(data, tsf + *offset, i))
++ ret = true;
++
++ cur = data->desc[i].start - tsf;
++ if (cur > *offset)
++ continue;
++
++ cur = data->desc[i].start + data->desc[i].duration - tsf;
++ if (cur > *offset)
++ *offset = cur;
++ }
++
++ return ret;
++}
++
++static u32
++ieee80211_get_noa_absent_time(struct ieee80211_noa_data *data, u32 tsf)
++{
++ s32 offset = 0;
++ int tries = 0;
++
++ ieee80211_extend_absent_time(data, tsf, &offset);
++ do {
++ if (!ieee80211_extend_absent_time(data, tsf, &offset))
++ break;
++
++ tries++;
++ } while (tries < 5);
++
++ return offset;
++}
++
++void ieee80211_update_p2p_noa(struct ieee80211_noa_data *data, u32 tsf)
++{
++ u32 next_offset = BIT(31) - 1;
++ int i;
++
++ data->absent = 0;
++ data->has_next_tsf = false;
++ for (i = 0; i < IEEE80211_P2P_NOA_DESC_MAX; i++) {
++ s32 start;
++
++ if (!data->count[i])
++ continue;
++
++ ieee80211_extend_noa_desc(data, tsf, i);
++ start = data->desc[i].start - tsf;
++ if (start <= 0)
++ data->absent |= BIT(i);
++
++ if (next_offset > start)
++ next_offset = start;
++
++ data->has_next_tsf = true;
++ }
++
++ if (data->absent)
++ next_offset = ieee80211_get_noa_absent_time(data, tsf);
++
++ data->next_tsf = tsf + next_offset;
++}
++EXPORT_SYMBOL(ieee80211_update_p2p_noa);
++
++int ieee80211_parse_p2p_noa(const struct ieee80211_p2p_noa_attr *attr,
++ struct ieee80211_noa_data *data, u32 tsf)
++{
++ int ret = 0;
++ int i;
++
++ memset(data, 0, sizeof(*data));
++
++ for (i = 0; i < IEEE80211_P2P_NOA_DESC_MAX; i++) {
++ const struct ieee80211_p2p_noa_desc *desc = &attr->desc[i];
++
++ if (!desc->count || !desc->duration)
++ continue;
++
++ data->count[i] = desc->count;
++ data->desc[i].start = le32_to_cpu(desc->start_time);
++ data->desc[i].duration = le32_to_cpu(desc->duration);
++ data->desc[i].interval = le32_to_cpu(desc->interval);
++
++ if (data->count[i] > 1 &&
++ data->desc[i].interval < data->desc[i].duration)
++ continue;
++
++ ieee80211_extend_noa_desc(data, tsf, i);
++ ret++;
++ }
++
++ if (ret)
++ ieee80211_update_p2p_noa(data, tsf);
++
++ return ret;
++}
++EXPORT_SYMBOL(ieee80211_parse_p2p_noa);
+--- a/net/wireless/chan.c
++++ b/net/wireless/chan.c
+@@ -277,6 +277,32 @@ void cfg80211_set_dfs_state(struct wiphy
+ width, dfs_state);
+ }
+
++static u32 cfg80211_get_start_freq(u32 center_freq,
++ u32 bandwidth)
++{
++ u32 start_freq;
++
++ if (bandwidth <= 20)
++ start_freq = center_freq;
++ else
++ start_freq = center_freq - bandwidth/2 + 10;
++
++ return start_freq;
++}
++
++static u32 cfg80211_get_end_freq(u32 center_freq,
++ u32 bandwidth)
++{
++ u32 end_freq;
++
++ if (bandwidth <= 20)
++ end_freq = center_freq;
++ else
++ end_freq = center_freq + bandwidth/2 - 10;
++
++ return end_freq;
++}
++
+ static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy,
+ u32 center_freq,
+ u32 bandwidth)
+@@ -284,13 +310,8 @@ static int cfg80211_get_chans_dfs_requir
+ struct ieee80211_channel *c;
+ u32 freq, start_freq, end_freq;
+
+- if (bandwidth <= 20) {
+- start_freq = center_freq;
+- end_freq = center_freq;
+- } else {
+- start_freq = center_freq - bandwidth/2 + 10;
+- end_freq = center_freq + bandwidth/2 - 10;
+- }
++ start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
++ end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
+
+ for (freq = start_freq; freq <= end_freq; freq += 20) {
+ c = ieee80211_get_channel(wiphy, freq);
+@@ -330,33 +351,159 @@ int cfg80211_chandef_dfs_required(struct
+ }
+ EXPORT_SYMBOL(cfg80211_chandef_dfs_required);
+
+-static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
+- u32 center_freq, u32 bandwidth,
+- u32 prohibited_flags)
++static int cfg80211_get_chans_dfs_usable(struct wiphy *wiphy,
++ u32 center_freq,
++ u32 bandwidth)
+ {
+ struct ieee80211_channel *c;
+ u32 freq, start_freq, end_freq;
++ int count = 0;
+
+- if (bandwidth <= 20) {
+- start_freq = center_freq;
+- end_freq = center_freq;
+- } else {
+- start_freq = center_freq - bandwidth/2 + 10;
+- end_freq = center_freq + bandwidth/2 - 10;
++ start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
++ end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
++
++ /*
++ * Check entire range of channels for the bandwidth.
++ * Check all channels are DFS channels (DFS_USABLE or
++ * DFS_AVAILABLE). Return number of usable channels
++ * (require CAC). Allow DFS and non-DFS channel mix.
++ */
++ for (freq = start_freq; freq <= end_freq; freq += 20) {
++ c = ieee80211_get_channel(wiphy, freq);
++ if (!c)
++ return -EINVAL;
++
++ if (c->flags & IEEE80211_CHAN_DISABLED)
++ return -EINVAL;
++
++ if (c->flags & IEEE80211_CHAN_RADAR) {
++ if (c->dfs_state == NL80211_DFS_UNAVAILABLE)
++ return -EINVAL;
++
++ if (c->dfs_state == NL80211_DFS_USABLE)
++ count++;
++ }
++ }
++
++ return count;
++}
++
++bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
++ const struct cfg80211_chan_def *chandef)
++{
++ int width;
++ int r1, r2 = 0;
++
++ if (WARN_ON(!cfg80211_chandef_valid(chandef)))
++ return false;
++
++ width = cfg80211_chandef_get_width(chandef);
++ if (width < 0)
++ return false;
++
++ r1 = cfg80211_get_chans_dfs_usable(wiphy, chandef->center_freq1,
++ width);
++
++ if (r1 < 0)
++ return false;
++
++ switch (chandef->width) {
++ case NL80211_CHAN_WIDTH_80P80:
++ WARN_ON(!chandef->center_freq2);
++ r2 = cfg80211_get_chans_dfs_usable(wiphy,
++ chandef->center_freq2,
++ width);
++ if (r2 < 0)
++ return false;
++ break;
++ default:
++ WARN_ON(chandef->center_freq2);
++ break;
+ }
+
++ return (r1 + r2 > 0);
++}
++
++
++static bool cfg80211_get_chans_dfs_available(struct wiphy *wiphy,
++ u32 center_freq,
++ u32 bandwidth)
++{
++ struct ieee80211_channel *c;
++ u32 freq, start_freq, end_freq;
++
++ start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
++ end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
++
++ /*
++ * Check entire range of channels for the bandwidth.
++ * If any channel in between is disabled or has not
++ * had gone through CAC return false
++ */
+ for (freq = start_freq; freq <= end_freq; freq += 20) {
+ c = ieee80211_get_channel(wiphy, freq);
+ if (!c)
+ return false;
+
+- /* check for radar flags */
+- if ((prohibited_flags & c->flags & IEEE80211_CHAN_RADAR) &&
++ if (c->flags & IEEE80211_CHAN_DISABLED)
++ return false;
++
++ if ((c->flags & IEEE80211_CHAN_RADAR) &&
+ (c->dfs_state != NL80211_DFS_AVAILABLE))
+ return false;
++ }
++
++ return true;
++}
++
++static bool cfg80211_chandef_dfs_available(struct wiphy *wiphy,
++ const struct cfg80211_chan_def *chandef)
++{
++ int width;
++ int r;
++
++ if (WARN_ON(!cfg80211_chandef_valid(chandef)))
++ return false;
+
+- /* check for the other flags */
+- if (c->flags & prohibited_flags & ~IEEE80211_CHAN_RADAR)
++ width = cfg80211_chandef_get_width(chandef);
++ if (width < 0)
++ return false;
++
++ r = cfg80211_get_chans_dfs_available(wiphy, chandef->center_freq1,
++ width);
++
++ /* If any of channels unavailable for cf1 just return */
++ if (!r)
++ return r;
++
++ switch (chandef->width) {
++ case NL80211_CHAN_WIDTH_80P80:
++ WARN_ON(!chandef->center_freq2);
++ r = cfg80211_get_chans_dfs_available(wiphy,
++ chandef->center_freq2,
++ width);
++ default:
++ WARN_ON(chandef->center_freq2);
++ break;
++ }
++
++ return r;
++}
++
++
++static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
++ u32 center_freq, u32 bandwidth,
++ u32 prohibited_flags)
++{
++ struct ieee80211_channel *c;
++ u32 freq, start_freq, end_freq;
++
++ start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
++ end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
++
++ for (freq = start_freq; freq <= end_freq; freq += 20) {
++ c = ieee80211_get_channel(wiphy, freq);
++ if (!c || c->flags & prohibited_flags)
+ return false;
+ }
+
+@@ -462,14 +609,19 @@ bool cfg80211_reg_can_beacon(struct wiph
+ struct cfg80211_chan_def *chandef)
+ {
+ bool res;
++ u32 prohibited_flags = IEEE80211_CHAN_DISABLED |
++ IEEE80211_CHAN_NO_IR |
++ IEEE80211_CHAN_RADAR;
+
+ trace_cfg80211_reg_can_beacon(wiphy, chandef);
+
+- res = cfg80211_chandef_usable(wiphy, chandef,
+- IEEE80211_CHAN_DISABLED |
+- IEEE80211_CHAN_PASSIVE_SCAN |
+- IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_RADAR);
++ if (cfg80211_chandef_dfs_required(wiphy, chandef) > 0 &&
++ cfg80211_chandef_dfs_available(wiphy, chandef)) {
++ /* We can skip IEEE80211_CHAN_NO_IR if chandef dfs available */
++ prohibited_flags = IEEE80211_CHAN_DISABLED;
++ }
++
++ res = cfg80211_chandef_usable(wiphy, chandef, prohibited_flags);
+
+ trace_cfg80211_return_bool(res);
+ return res;
+--- a/net/wireless/core.h
++++ b/net/wireless/core.h
+@@ -382,6 +382,19 @@ int cfg80211_can_use_iftype_chan(struct
+ enum cfg80211_chan_mode chanmode,
+ u8 radar_detect);
+
++/**
++ * cfg80211_chandef_dfs_usable - checks if chandef is DFS usable
++ * @wiphy: the wiphy to validate against
++ * @chandef: the channel definition to check
++ *
++ * Checks if chandef is usable and we can/need start CAC on such channel.
++ *
++ * Return: Return true if all channels available and at least
++ * one channel require CAC (NL80211_DFS_USABLE)
++ */
++bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
++ const struct cfg80211_chan_def *chandef);
++
+ void cfg80211_set_dfs_state(struct wiphy *wiphy,
+ const struct cfg80211_chan_def *chandef,
+ enum nl80211_dfs_state dfs_state);
+--- a/net/wireless/genregdb.awk
++++ b/net/wireless/genregdb.awk
+@@ -107,10 +107,13 @@ active && /^[ \t]*\(/ {
+ } else if (flagarray[arg] == "PTMP-ONLY") {
+ flags = flags "\n\t\t\tNL80211_RRF_PTMP_ONLY | "
+ } else if (flagarray[arg] == "PASSIVE-SCAN") {
+- flags = flags "\n\t\t\tNL80211_RRF_PASSIVE_SCAN | "
++ flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
+ } else if (flagarray[arg] == "NO-IBSS") {
+- flags = flags "\n\t\t\tNL80211_RRF_NO_IBSS | "
++ flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
++ } else if (flagarray[arg] == "NO-IR") {
++ flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
+ }
++
+ }
+ flags = flags "0"
+ printf "\t\tREG_RULE(%d, %d, %d, %d, %d, %s),\n", start, end, bw, gain, power, flags
+--- a/net/wireless/ibss.c
++++ b/net/wireless/ibss.c
+@@ -274,7 +274,7 @@ int cfg80211_ibss_wext_join(struct cfg80
+
+ for (i = 0; i < sband->n_channels; i++) {
+ chan = &sband->channels[i];
+- if (chan->flags & IEEE80211_CHAN_NO_IBSS)
++ if (chan->flags & IEEE80211_CHAN_NO_IR)
+ continue;
+ if (chan->flags & IEEE80211_CHAN_DISABLED)
+ continue;
+@@ -345,7 +345,7 @@ int cfg80211_ibss_wext_siwfreq(struct ne
+ chan = ieee80211_get_channel(wdev->wiphy, freq);
+ if (!chan)
+ return -EINVAL;
+- if (chan->flags & IEEE80211_CHAN_NO_IBSS ||
++ if (chan->flags & IEEE80211_CHAN_NO_IR ||
+ chan->flags & IEEE80211_CHAN_DISABLED)
+ return -EINVAL;
+ }
+--- a/net/wireless/mesh.c
++++ b/net/wireless/mesh.c
+@@ -141,8 +141,7 @@ int __cfg80211_join_mesh(struct cfg80211
+
+ for (i = 0; i < sband->n_channels; i++) {
+ chan = &sband->channels[i];
+- if (chan->flags & (IEEE80211_CHAN_NO_IBSS |
+- IEEE80211_CHAN_PASSIVE_SCAN |
++ if (chan->flags & (IEEE80211_CHAN_NO_IR |
+ IEEE80211_CHAN_DISABLED |
+ IEEE80211_CHAN_RADAR))
+ continue;
+--- a/net/wireless/mlme.c
++++ b/net/wireless/mlme.c
+@@ -763,12 +763,12 @@ void cfg80211_radar_event(struct wiphy *
+ EXPORT_SYMBOL(cfg80211_radar_event);
+
+ void cfg80211_cac_event(struct net_device *netdev,
++ const struct cfg80211_chan_def *chandef,
+ enum nl80211_radar_event event, gfp_t gfp)
+ {
+ struct wireless_dev *wdev = netdev->ieee80211_ptr;
+ struct wiphy *wiphy = wdev->wiphy;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+- struct cfg80211_chan_def chandef;
+ unsigned long timeout;
+
+ trace_cfg80211_cac_event(netdev, event);
+@@ -779,14 +779,12 @@ void cfg80211_cac_event(struct net_devic
+ if (WARN_ON(!wdev->channel))
+ return;
+
+- cfg80211_chandef_create(&chandef, wdev->channel, NL80211_CHAN_NO_HT);
+-
+ switch (event) {
+ case NL80211_RADAR_CAC_FINISHED:
+ timeout = wdev->cac_start_time +
+ msecs_to_jiffies(IEEE80211_DFS_MIN_CAC_TIME_MS);
+ WARN_ON(!time_after_eq(jiffies, timeout));
+- cfg80211_set_dfs_state(wiphy, &chandef, NL80211_DFS_AVAILABLE);
++ cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
+ break;
+ case NL80211_RADAR_CAC_ABORTED:
+ break;
+@@ -796,6 +794,6 @@ void cfg80211_cac_event(struct net_devic
+ }
+ wdev->cac_started = false;
+
+- nl80211_radar_notify(rdev, &chandef, event, netdev, gfp);
++ nl80211_radar_notify(rdev, chandef, event, netdev, gfp);
+ }
+ EXPORT_SYMBOL(cfg80211_cac_event);
+--- a/net/wireless/nl80211.c
++++ b/net/wireless/nl80211.c
+@@ -545,12 +545,12 @@ static int nl80211_msg_put_channel(struc
+ if ((chan->flags & IEEE80211_CHAN_DISABLED) &&
+ nla_put_flag(msg, NL80211_FREQUENCY_ATTR_DISABLED))
+ goto nla_put_failure;
+- if ((chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
+- nla_put_flag(msg, NL80211_FREQUENCY_ATTR_PASSIVE_SCAN))
+- goto nla_put_failure;
+- if ((chan->flags & IEEE80211_CHAN_NO_IBSS) &&
+- nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IBSS))
+- goto nla_put_failure;
++ if (chan->flags & IEEE80211_CHAN_NO_IR) {
++ if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IR))
++ goto nla_put_failure;
++ if (nla_put_flag(msg, __NL80211_FREQUENCY_ATTR_NO_IBSS))
++ goto nla_put_failure;
++ }
+ if (chan->flags & IEEE80211_CHAN_RADAR) {
+ if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR))
+ goto nla_put_failure;
+@@ -1229,7 +1229,8 @@ static int nl80211_send_wiphy(struct cfg
+ nla_put_flag(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP))
+ goto nla_put_failure;
+ if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ) &&
+- nla_put_flag(msg, WIPHY_FLAG_SUPPORTS_5_10_MHZ))
++ (nla_put_flag(msg, NL80211_ATTR_SUPPORT_5_MHZ) ||
++ nla_put_flag(msg, NL80211_ATTR_SUPPORT_10_MHZ)))
+ goto nla_put_failure;
+
+ state->split_start++;
+@@ -2170,7 +2171,7 @@ static inline u64 wdev_id(struct wireles
+ }
+
+ static int nl80211_send_chandef(struct sk_buff *msg,
+- struct cfg80211_chan_def *chandef)
++ const struct cfg80211_chan_def *chandef)
+ {
+ WARN_ON(!cfg80211_chandef_valid(chandef));
+
+@@ -3219,6 +3220,7 @@ static int nl80211_start_ap(struct sk_bu
+ return PTR_ERR(params.acl);
+ }
+
++ wdev_lock(wdev);
+ err = rdev_start_ap(rdev, dev, ¶ms);
+ if (!err) {
+ wdev->preset_chandef = params.chandef;
+@@ -3227,6 +3229,7 @@ static int nl80211_start_ap(struct sk_bu
+ wdev->ssid_len = params.ssid_len;
+ memcpy(wdev->ssid, params.ssid, wdev->ssid_len);
+ }
++ wdev_unlock(wdev);
+
+ kfree(params.acl);
+
+@@ -3255,7 +3258,11 @@ static int nl80211_set_beacon(struct sk_
+ if (err)
+ return err;
+
+- return rdev_change_beacon(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_change_beacon(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static int nl80211_stop_ap(struct sk_buff *skb, struct genl_info *info)
+@@ -4461,7 +4468,9 @@ static int nl80211_set_bss(struct sk_buf
+ {
+ struct cfg80211_registered_device *rdev = info->user_ptr[0];
+ struct net_device *dev = info->user_ptr[1];
++ struct wireless_dev *wdev = dev->ieee80211_ptr;
+ struct bss_parameters params;
++ int err;
+
+ memset(¶ms, 0, sizeof(params));
+ /* default to not changing parameters */
+@@ -4527,7 +4536,11 @@ static int nl80211_set_bss(struct sk_buf
+ dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
+ return -EOPNOTSUPP;
+
+- return rdev_change_bss(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_change_bss(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static const struct nla_policy reg_rule_policy[NL80211_REG_RULE_ATTR_MAX + 1] = {
+@@ -5653,7 +5666,7 @@ static int nl80211_start_radar_detection
+ if (err == 0)
+ return -EINVAL;
+
+- if (chandef.chan->dfs_state != NL80211_DFS_USABLE)
++ if (!cfg80211_chandef_dfs_usable(wdev->wiphy, &chandef))
+ return -EINVAL;
+
+ if (!rdev->ops->start_radar_detection)
+@@ -5793,7 +5806,11 @@ skip_beacons:
+ if (info->attrs[NL80211_ATTR_CH_SWITCH_BLOCK_TX])
+ params.block_tx = true;
+
+- return rdev_channel_switch(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_channel_switch(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
+@@ -10809,21 +10826,18 @@ void cfg80211_ch_switch_notify(struct ne
+ struct wiphy *wiphy = wdev->wiphy;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+
+- trace_cfg80211_ch_switch_notify(dev, chandef);
++ ASSERT_WDEV_LOCK(wdev);
+
+- wdev_lock(wdev);
++ trace_cfg80211_ch_switch_notify(dev, chandef);
+
+ if (WARN_ON(wdev->iftype != NL80211_IFTYPE_AP &&
+ wdev->iftype != NL80211_IFTYPE_P2P_GO &&
+ wdev->iftype != NL80211_IFTYPE_ADHOC &&
+ wdev->iftype != NL80211_IFTYPE_MESH_POINT))
+- goto out;
++ return;
+
+ wdev->channel = chandef->chan;
+ nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL);
+-out:
+- wdev_unlock(wdev);
+- return;
+ }
+ EXPORT_SYMBOL(cfg80211_ch_switch_notify);
+
+@@ -10882,7 +10896,7 @@ EXPORT_SYMBOL(cfg80211_cqm_txe_notify);
+
+ void
+ nl80211_radar_notify(struct cfg80211_registered_device *rdev,
+- struct cfg80211_chan_def *chandef,
++ const struct cfg80211_chan_def *chandef,
+ enum nl80211_radar_event event,
+ struct net_device *netdev, gfp_t gfp)
+ {
+--- a/net/wireless/nl80211.h
++++ b/net/wireless/nl80211.h
+@@ -70,7 +70,7 @@ int nl80211_send_mgmt(struct cfg80211_re
+
+ void
+ nl80211_radar_notify(struct cfg80211_registered_device *rdev,
+- struct cfg80211_chan_def *chandef,
++ const struct cfg80211_chan_def *chandef,
+ enum nl80211_radar_event event,
+ struct net_device *netdev, gfp_t gfp);
+
+--- a/net/wireless/reg.c
++++ b/net/wireless/reg.c
+@@ -163,35 +163,29 @@ static const struct ieee80211_regdomain
+ REG_RULE(2412-10, 2462+10, 40, 6, 20, 0),
+ /* IEEE 802.11b/g, channels 12..13. */
+ REG_RULE(2467-10, 2472+10, 40, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+ /* IEEE 802.11 channel 14 - Only JP enables
+ * this and for 802.11b only */
+ REG_RULE(2484-10, 2484+10, 20, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_NO_OFDM),
+ /* IEEE 802.11a, channel 36..48 */
+ REG_RULE(5180-10, 5240+10, 160, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+
+ /* IEEE 802.11a, channel 52..64 - DFS required */
+ REG_RULE(5260-10, 5320+10, 160, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_DFS),
+
+ /* IEEE 802.11a, channel 100..144 - DFS required */
+ REG_RULE(5500-10, 5720+10, 160, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS |
++ NL80211_RRF_NO_IR |
+ NL80211_RRF_DFS),
+
+ /* IEEE 802.11a, channel 149..165 */
+ REG_RULE(5745-10, 5825+10, 80, 6, 20,
+- NL80211_RRF_PASSIVE_SCAN |
+- NL80211_RRF_NO_IBSS),
++ NL80211_RRF_NO_IR),
+
+ /* IEEE 802.11ad (60gHz), channels 1..3 */
+ REG_RULE(56160+2160*1-1080, 56160+2160*3+1080, 2160, 0, 0, 0),
+@@ -698,10 +692,8 @@ regdom_intersect(const struct ieee80211_
+ static u32 map_regdom_flags(u32 rd_flags)
+ {
+ u32 channel_flags = 0;
+- if (rd_flags & NL80211_RRF_PASSIVE_SCAN)
+- channel_flags |= IEEE80211_CHAN_PASSIVE_SCAN;
+- if (rd_flags & NL80211_RRF_NO_IBSS)
+- channel_flags |= IEEE80211_CHAN_NO_IBSS;
++ if (rd_flags & NL80211_RRF_NO_IR_ALL)
++ channel_flags |= IEEE80211_CHAN_NO_IR;
+ if (rd_flags & NL80211_RRF_DFS)
+ channel_flags |= IEEE80211_CHAN_RADAR;
+ if (rd_flags & NL80211_RRF_NO_OFDM)
+@@ -1066,13 +1058,8 @@ static void handle_reg_beacon(struct wip
+ chan_before.center_freq = chan->center_freq;
+ chan_before.flags = chan->flags;
+
+- if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
+- chan->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
+- channel_changed = true;
+- }
+-
+- if (chan->flags & IEEE80211_CHAN_NO_IBSS) {
+- chan->flags &= ~IEEE80211_CHAN_NO_IBSS;
++ if (chan->flags & IEEE80211_CHAN_NO_IR) {
++ chan->flags &= ~IEEE80211_CHAN_NO_IR;
+ channel_changed = true;
+ }
+
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9003_wow.c
+@@ -0,0 +1,422 @@
++/*
++ * Copyright (c) 2012 Qualcomm Atheros, Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/export.h>
++#include "ath9k.h"
++#include "reg.h"
++#include "hw-ops.h"
++
++const char *ath9k_hw_wow_event_to_string(u32 wow_event)
++{
++ if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
++ return "Magic pattern";
++ if (wow_event & AH_WOW_USER_PATTERN_EN)
++ return "User pattern";
++ if (wow_event & AH_WOW_LINK_CHANGE)
++ return "Link change";
++ if (wow_event & AH_WOW_BEACON_MISS)
++ return "Beacon miss";
++
++ return "unknown reason";
++}
++EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
++
++static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
++{
++ struct ath_common *common = ath9k_hw_common(ah);
++
++ REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
++
++ /* set rx disable bit */
++ REG_WRITE(ah, AR_CR, AR_CR_RXD);
++
++ if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
++ ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
++ REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
++ return;
++ }
++
++ REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
++}
++
++static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
++{
++ struct ath_common *common = ath9k_hw_common(ah);
++ u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
++ u32 ctl[13] = {0};
++ u32 data_word[KAL_NUM_DATA_WORDS];
++ u8 i;
++ u32 wow_ka_data_word0;
++
++ memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
++ memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
++
++ /* set the transmit buffer */
++ ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
++ ctl[1] = 0;
++ ctl[3] = 0xb; /* OFDM_6M hardware value for this rate */
++ ctl[4] = 0;
++ ctl[7] = (ah->txchainmask) << 2;
++ ctl[2] = 0xf << 16; /* tx_tries 0 */
++
++ for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
++ REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
++
++ REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
++
++ data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
++ (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
++ data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
++ (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
++ data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
++ (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
++ data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
++ (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
++ data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
++ (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
++ data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
++
++ if (AR_SREV_9462_20(ah)) {
++ /* AR9462 2.0 has an extra descriptor word (time based
++ * discard) compared to other chips */
++ REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
++ wow_ka_data_word0 = AR_WOW_TXBUF(13);
++ } else {
++ wow_ka_data_word0 = AR_WOW_TXBUF(12);
++ }
++
++ for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
++ REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
++
++}
++
++void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
++ u8 *user_mask, int pattern_count,
++ int pattern_len)
++{
++ int i;
++ u32 pattern_val, mask_val;
++ u32 set, clr;
++
++ /* FIXME: should check count by querying the hardware capability */
++ if (pattern_count >= MAX_NUM_PATTERN)
++ return;
++
++ REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
++
++ /* set the registers for pattern */
++ for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
++ memcpy(&pattern_val, user_pattern, 4);
++ REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
++ pattern_val);
++ user_pattern += 4;
++ }
++
++ /* set the registers for mask */
++ for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
++ memcpy(&mask_val, user_mask, 4);
++ REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
++ user_mask += 4;
++ }
++
++ /* set the pattern length to be matched
++ *
++ * AR_WOW_LENGTH1_REG1
++ * bit 31:24 pattern 0 length
++ * bit 23:16 pattern 1 length
++ * bit 15:8 pattern 2 length
++ * bit 7:0 pattern 3 length
++ *
++ * AR_WOW_LENGTH1_REG2
++ * bit 31:24 pattern 4 length
++ * bit 23:16 pattern 5 length
++ * bit 15:8 pattern 6 length
++ * bit 7:0 pattern 7 length
++ *
++ * the below logic writes out the new
++ * pattern length for the corresponding
++ * pattern_count, while masking out the
++ * other fields
++ */
++
++ ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
++
++ if (pattern_count < 4) {
++ /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
++ set = (pattern_len & AR_WOW_LENGTH_MAX) <<
++ AR_WOW_LEN1_SHIFT(pattern_count);
++ clr = AR_WOW_LENGTH1_MASK(pattern_count);
++ REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
++ } else {
++ /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
++ set = (pattern_len & AR_WOW_LENGTH_MAX) <<
++ AR_WOW_LEN2_SHIFT(pattern_count);
++ clr = AR_WOW_LENGTH2_MASK(pattern_count);
++ REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
++ }
++
++}
++EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
++
++u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
++{
++ u32 wow_status = 0;
++ u32 val = 0, rval;
++
++ /*
++ * read the WoW status register to know
++ * the wakeup reason
++ */
++ rval = REG_READ(ah, AR_WOW_PATTERN);
++ val = AR_WOW_STATUS(rval);
++
++ /*
++ * mask only the WoW events that we have enabled. Sometimes
++ * we have spurious WoW events from the AR_WOW_PATTERN
++ * register. This mask will clean it up.
++ */
++
++ val &= ah->wow_event_mask;
++
++ if (val) {
++ if (val & AR_WOW_MAGIC_PAT_FOUND)
++ wow_status |= AH_WOW_MAGIC_PATTERN_EN;
++ if (AR_WOW_PATTERN_FOUND(val))
++ wow_status |= AH_WOW_USER_PATTERN_EN;
++ if (val & AR_WOW_KEEP_ALIVE_FAIL)
++ wow_status |= AH_WOW_LINK_CHANGE;
++ if (val & AR_WOW_BEACON_FAIL)
++ wow_status |= AH_WOW_BEACON_MISS;
++ }
++
++ /*
++ * set and clear WOW_PME_CLEAR registers for the chip to
++ * generate next wow signal.
++ * disable D3 before accessing other registers ?
++ */
++
++ /* do we need to check the bit value 0x01000000 (7-10) ?? */
++ REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
++ AR_PMCTRL_PWR_STATE_D1D3);
++
++ /*
++ * clear all events
++ */
++ REG_WRITE(ah, AR_WOW_PATTERN,
++ AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
++
++ /*
++ * restore the beacon threshold to init value
++ */
++ REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
++
++ /*
++ * Restore the way the PCI-E reset, Power-On-Reset, external
++ * PCIE_POR_SHORT pins are tied to its original value.
++ * Previously just before WoW sleep, we untie the PCI-E
++ * reset to our Chip's Power On Reset so that any PCI-E
++ * reset from the bus will not reset our chip
++ */
++ if (ah->is_pciexpress)
++ ath9k_hw_configpcipowersave(ah, false);
++
++ ah->wow_event_mask = 0;
++
++ return wow_status;
++}
++EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
++
++void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
++{
++ u32 wow_event_mask;
++ u32 set, clr;
++
++ /*
++ * wow_event_mask is a mask to the AR_WOW_PATTERN register to
++ * indicate which WoW events we have enabled. The WoW events
++ * are from the 'pattern_enable' in this function and
++ * 'pattern_count' of ath9k_hw_wow_apply_pattern()
++ */
++ wow_event_mask = ah->wow_event_mask;
++
++ /*
++ * Untie Power-on-Reset from the PCI-E-Reset. When we are in
++ * WOW sleep, we do want the Reset from the PCI-E to disturb
++ * our hw state
++ */
++ if (ah->is_pciexpress) {
++ /*
++ * we need to untie the internal POR (power-on-reset)
++ * to the external PCI-E reset. We also need to tie
++ * the PCI-E Phy reset to the PCI-E reset.
++ */
++ set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
++ clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
++ REG_RMW(ah, AR_WA, set, clr);
++ }
++
++ /*
++ * set the power states appropriately and enable PME
++ */
++ set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
++ AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
++
++ /*
++ * set and clear WOW_PME_CLEAR registers for the chip
++ * to generate next wow signal.
++ */
++ REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
++ clr = AR_PMCTRL_WOW_PME_CLR;
++ REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
++
++ /*
++ * Setup for:
++ * - beacon misses
++ * - magic pattern
++ * - keep alive timeout
++ * - pattern matching
++ */
++
++ /*
++ * Program default values for pattern backoff, aifs/slot/KAL count,
++ * beacon miss timeout, KAL timeout, etc.
++ */
++ set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
++ REG_SET_BIT(ah, AR_WOW_PATTERN, set);
++
++ set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
++ AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
++ AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
++ REG_SET_BIT(ah, AR_WOW_COUNT, set);
++
++ if (pattern_enable & AH_WOW_BEACON_MISS)
++ set = AR_WOW_BEACON_TIMO;
++ /* We are not using beacon miss, program a large value */
++ else
++ set = AR_WOW_BEACON_TIMO_MAX;
++
++ REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
++
++ /*
++ * Keep alive timo in ms except AR9280
++ */
++ if (!pattern_enable)
++ set = AR_WOW_KEEP_ALIVE_NEVER;
++ else
++ set = KAL_TIMEOUT * 32;
++
++ REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
++
++ /*
++ * Keep alive delay in us. based on 'power on clock',
++ * therefore in usec
++ */
++ set = KAL_DELAY * 1000;
++ REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
++
++ /*
++ * Create keep alive pattern to respond to beacons
++ */
++ ath9k_wow_create_keep_alive_pattern(ah);
++
++ /*
++ * Configure MAC WoW Registers
++ */
++ set = 0;
++ /* Send keep alive timeouts anyway */
++ clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
++
++ if (pattern_enable & AH_WOW_LINK_CHANGE)
++ wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
++ else
++ set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
++
++ set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
++ REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
++
++ /*
++ * we are relying on a bmiss failure. ensure we have
++ * enough threshold to prevent false positives
++ */
++ REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
++ AR_WOW_BMISSTHRESHOLD);
++
++ set = 0;
++ clr = 0;
++
++ if (pattern_enable & AH_WOW_BEACON_MISS) {
++ set = AR_WOW_BEACON_FAIL_EN;
++ wow_event_mask |= AR_WOW_BEACON_FAIL;
++ } else {
++ clr = AR_WOW_BEACON_FAIL_EN;
++ }
++
++ REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
++
++ set = 0;
++ clr = 0;
++ /*
++ * Enable the magic packet registers
++ */
++ if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
++ set = AR_WOW_MAGIC_EN;
++ wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
++ } else {
++ clr = AR_WOW_MAGIC_EN;
++ }
++ set |= AR_WOW_MAC_INTR_EN;
++ REG_RMW(ah, AR_WOW_PATTERN, set, clr);
++
++ REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
++ AR_WOW_PATTERN_SUPPORTED);
++
++ /*
++ * Set the power states appropriately and enable PME
++ */
++ clr = 0;
++ set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
++ AR_PMCTRL_PWR_PM_CTRL_ENA;
++
++ clr = AR_PCIE_PM_CTRL_ENA;
++ REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
++
++ /*
++ * this is needed to prevent the chip waking up
++ * the host within 3-4 seconds with certain
++ * platform/BIOS. The fix is to enable
++ * D1 & D3 to match original definition and
++ * also match the OTP value. Anyway this
++ * is more related to SW WOW.
++ */
++ clr = AR_PMCTRL_PWR_STATE_D1D3;
++ REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
++
++ set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
++ REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
++
++ REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
++
++ /* to bring down WOW power low margin */
++ set = BIT(13);
++ REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
++ /* HW WoW */
++ clr = BIT(5);
++ REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
++
++ ath9k_hw_set_powermode_wow_sleep(ah);
++ ah->wow_event_mask = wow_event_mask;
++}
++EXPORT_SYMBOL(ath9k_hw_wow_enable);
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/tx99.c
+@@ -0,0 +1,263 @@
++/*
++ * Copyright (c) 2013 Qualcomm Atheros, Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include "ath9k.h"
++
++static void ath9k_tx99_stop(struct ath_softc *sc)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
++
++ ath_drain_all_txq(sc);
++ ath_startrecv(sc);
++
++ ath9k_hw_set_interrupts(ah);
++ ath9k_hw_enable_interrupts(ah);
++
++ ieee80211_wake_queues(sc->hw);
++
++ kfree_skb(sc->tx99_skb);
++ sc->tx99_skb = NULL;
++ sc->tx99_state = false;
++
++ ath9k_hw_tx99_stop(sc->sc_ah);
++ ath_dbg(common, XMIT, "TX99 stopped\n");
++}
++
++static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
++{
++ static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
++ 0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
++ 0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
++ 0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
++ 0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
++ 0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
++ 0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
++ 0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
++ u32 len = 1200;
++ struct ieee80211_hw *hw = sc->hw;
++ struct ieee80211_hdr *hdr;
++ struct ieee80211_tx_info *tx_info;
++ struct sk_buff *skb;
++
++ skb = alloc_skb(len, GFP_KERNEL);
++ if (!skb)
++ return NULL;
++
++ skb_put(skb, len);
++
++ memset(skb->data, 0, len);
++
++ hdr = (struct ieee80211_hdr *)skb->data;
++ hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
++ hdr->duration_id = 0;
++
++ memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
++ memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
++ memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
++
++ hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
++
++ tx_info = IEEE80211_SKB_CB(skb);
++ memset(tx_info, 0, sizeof(*tx_info));
++ tx_info->band = hw->conf.chandef.chan->band;
++ tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
++ tx_info->control.vif = sc->tx99_vif;
++
++ memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
++
++ return skb;
++}
++
++static void ath9k_tx99_deinit(struct ath_softc *sc)
++{
++ ath_reset(sc);
++
++ ath9k_ps_wakeup(sc);
++ ath9k_tx99_stop(sc);
++ ath9k_ps_restore(sc);
++}
++
++static int ath9k_tx99_init(struct ath_softc *sc)
++{
++ struct ieee80211_hw *hw = sc->hw;
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
++ struct ath_tx_control txctl;
++ int r;
++
++ if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
++ ath_err(common,
++ "driver is in invalid state unable to use TX99");
++ return -EINVAL;
++ }
++
++ sc->tx99_skb = ath9k_build_tx99_skb(sc);
++ if (!sc->tx99_skb)
++ return -ENOMEM;
++
++ memset(&txctl, 0, sizeof(txctl));
++ txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
++
++ ath_reset(sc);
++
++ ath9k_ps_wakeup(sc);
++
++ ath9k_hw_disable_interrupts(ah);
++ atomic_set(&ah->intr_ref_cnt, -1);
++ ath_drain_all_txq(sc);
++ ath_stoprecv(sc);
++
++ sc->tx99_state = true;
++
++ ieee80211_stop_queues(hw);
++
++ if (sc->tx99_power == MAX_RATE_POWER + 1)
++ sc->tx99_power = MAX_RATE_POWER;
++
++ ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
++ r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
++ if (r) {
++ ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
++ return r;
++ }
++
++ ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
++ sc->tx99_power,
++ sc->tx99_power / 2);
++
++ /* We leave the harware awake as it will be chugging on */
++
++ return 0;
++}
++
++static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[3];
++ unsigned int len;
++
++ len = sprintf(buf, "%d\n", sc->tx99_state);
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ char buf[32];
++ bool start;
++ ssize_t len;
++ int r;
++
++ if (sc->nvifs > 1)
++ return -EOPNOTSUPP;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ if (strtobool(buf, &start))
++ return -EINVAL;
++
++ if (start == sc->tx99_state) {
++ if (!start)
++ return count;
++ ath_dbg(common, XMIT, "Resetting TX99\n");
++ ath9k_tx99_deinit(sc);
++ }
++
++ if (!start) {
++ ath9k_tx99_deinit(sc);
++ return count;
++ }
++
++ r = ath9k_tx99_init(sc);
++ if (r)
++ return r;
++
++ return count;
++}
++
++static const struct file_operations fops_tx99 = {
++ .read = read_file_tx99,
++ .write = write_file_tx99,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++static ssize_t read_file_tx99_power(struct file *file,
++ char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[32];
++ unsigned int len;
++
++ len = sprintf(buf, "%d (%d dBm)\n",
++ sc->tx99_power,
++ sc->tx99_power / 2);
++
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_tx99_power(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ int r;
++ u8 tx_power;
++
++ r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
++ if (r)
++ return r;
++
++ if (tx_power > MAX_RATE_POWER)
++ return -EINVAL;
++
++ sc->tx99_power = tx_power;
++
++ ath9k_ps_wakeup(sc);
++ ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
++ ath9k_ps_restore(sc);
++
++ return count;
++}
++
++static const struct file_operations fops_tx99_power = {
++ .read = read_file_tx99_power,
++ .write = write_file_tx99_power,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++void ath9k_tx99_init_debug(struct ath_softc *sc)
++{
++ if (!AR_SREV_9300_20_OR_LATER(sc->sc_ah))
++ return;
++
++ debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_tx99);
++ debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_tx99_power);
++}
+--- a/drivers/net/wireless/ath/ath9k/dfs_debug.c
++++ b/drivers/net/wireless/ath/ath9k/dfs_debug.c
+@@ -44,14 +44,20 @@ static ssize_t read_file_dfs(struct file
+ if (buf == NULL)
+ return -ENOMEM;
+
+- if (sc->dfs_detector)
+- dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
+-
+ len += scnprintf(buf + len, size - len, "DFS support for "
+ "macVersion = 0x%x, macRev = 0x%x: %s\n",
+ hw_ver->macVersion, hw_ver->macRev,
+ (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_DFS) ?
+ "enabled" : "disabled");
++
++ if (!sc->dfs_detector) {
++ len += scnprintf(buf + len, size - len,
++ "DFS detector not enabled\n");
++ goto exit;
++ }
++
++ dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
++
+ len += scnprintf(buf + len, size - len, "Pulse detector statistics:\n");
+ ATH9K_DFS_STAT("pulse events reported ", pulses_total);
+ ATH9K_DFS_STAT("invalid pulse events ", pulses_no_dfs);
+@@ -76,6 +82,7 @@ static ssize_t read_file_dfs(struct file
+ ATH9K_DFS_POOL_STAT("Seqs. alloc error ", pseq_alloc_error);
+ ATH9K_DFS_POOL_STAT("Seqs. in use ", pseq_used);
+
++exit:
+ if (len > size)
+ len = size;
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struc
+ else
+ ah->enabled_cals &= ~TX_IQ_CAL;
+
+- if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
+- ah->enabled_cals |= TX_CL_CAL;
+- else
+- ah->enabled_cals &= ~TX_CL_CAL;
+ }
++
++ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
++ ah->enabled_cals |= TX_CL_CAL;
++ else
++ ah->enabled_cals &= ~TX_CL_CAL;
+ }
+
+ static void ar9003_hw_prog_ini(struct ath_hw *ah,
+@@ -701,6 +702,54 @@ static int ar9550_hw_get_modes_txgain_in
+ return ret;
+ }
+
++static void ar9003_doubler_fix(struct ath_hw *ah)
++{
++ if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
++ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++
++ udelay(200);
++
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++
++ udelay(1);
++
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++
++ udelay(200);
++
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
++ AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
++
++ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ }
++}
++
+ static int ar9003_hw_process_ini(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+@@ -726,6 +775,8 @@ static int ar9003_hw_process_ini(struct
+ modesIndex);
+ }
+
++ ar9003_doubler_fix(ah);
++
+ /*
+ * RXGAIN initvals.
+ */
+@@ -1281,6 +1332,7 @@ static void ar9003_hw_ani_cache_ini_regs
+ static void ar9003_hw_set_radar_params(struct ath_hw *ah,
+ struct ath_hw_radar_conf *conf)
+ {
++ unsigned int regWrites = 0;
+ u32 radar_0 = 0, radar_1 = 0;
+
+ if (!conf) {
+@@ -1307,6 +1359,11 @@ static void ar9003_hw_set_radar_params(s
+ REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
+ else
+ REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
++
++ if (AR_SREV_9300(ah) || AR_SREV_9340(ah) || AR_SREV_9580(ah)) {
++ REG_WRITE_ARRAY(&ah->ini_dfs,
++ IS_CHAN_HT40(ah->curchan) ? 2 : 1, regWrites);
++ }
+ }
+
+ static void ar9003_hw_set_radar_conf(struct ath_hw *ah)
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -270,7 +270,7 @@
+ #define AR_PHY_AGC (AR_AGC_BASE + 0x14)
+ #define AR_PHY_EXT_ATTEN_CTL_0 (AR_AGC_BASE + 0x18)
+ #define AR_PHY_CCA_0 (AR_AGC_BASE + 0x1c)
+-#define AR_PHY_EXT_CCA0 (AR_AGC_BASE + 0x20)
++#define AR_PHY_CCA_CTRL_0 (AR_AGC_BASE + 0x20)
+ #define AR_PHY_RESTART (AR_AGC_BASE + 0x24)
+
+ /*
+@@ -341,14 +341,15 @@
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ -95
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ -100
+
++#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ -95
++#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ -100
++
+ #define AR_PHY_CCA_NOM_VAL_9462_2GHZ -127
+ #define AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ -127
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9462_2GHZ -60
+-#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ -95
+ #define AR_PHY_CCA_NOM_VAL_9462_5GHZ -127
+ #define AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ -127
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9462_5GHZ -60
+-#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ -100
+
+ #define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
+
+@@ -397,6 +398,8 @@
+ #define AR9280_PHY_CCA_THRESH62_S 12
+ #define AR_PHY_EXT_CCA0_THRESH62 0x000000FF
+ #define AR_PHY_EXT_CCA0_THRESH62_S 0
++#define AR_PHY_EXT_CCA0_THRESH62_1 0x000001FF
++#define AR_PHY_EXT_CCA0_THRESH62_1_S 0
+ #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F
+ #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0
+ #define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0
+@@ -656,13 +659,24 @@
+ #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
+ #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
+ #define AR_PHY_65NM_CH0_SYNTH7 0x16098
++#define AR_PHY_65NM_CH0_SYNTH12 0x160ac
+ #define AR_PHY_65NM_CH0_BIAS1 0x160c0
+ #define AR_PHY_65NM_CH0_BIAS2 0x160c4
+ #define AR_PHY_65NM_CH0_BIAS4 0x160cc
++#define AR_PHY_65NM_CH0_RXTX2 0x16104
++#define AR_PHY_65NM_CH1_RXTX2 0x16504
++#define AR_PHY_65NM_CH2_RXTX2 0x16904
+ #define AR_PHY_65NM_CH0_RXTX4 0x1610c
+ #define AR_PHY_65NM_CH1_RXTX4 0x1650c
+ #define AR_PHY_65NM_CH2_RXTX4 0x1690c
+
++#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3 0x00780000
++#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S 19
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK 0x00000004
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S 2
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK 0x00000008
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S 3
++
+ #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
+ (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
+ #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
+--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
++++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
+@@ -181,6 +181,7 @@ static void rt2x00lib_autowakeup(struct
+ static void rt2x00lib_bc_buffer_iter(void *data, u8 *mac,
+ struct ieee80211_vif *vif)
+ {
++ struct ieee80211_tx_control control = {};
+ struct rt2x00_dev *rt2x00dev = data;
+ struct sk_buff *skb;
+
+@@ -195,7 +196,7 @@ static void rt2x00lib_bc_buffer_iter(voi
+ */
+ skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
+ while (skb) {
+- rt2x00mac_tx(rt2x00dev->hw, NULL, skb);
++ rt2x00mac_tx(rt2x00dev->hw, &control, skb);
+ skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
+ }
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+@@ -898,7 +898,7 @@ static void ar9003_hw_tx_iq_cal_reload(s
+
+ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
+ {
+- int offset[8], total = 0, test;
++ int offset[8] = {0}, total = 0, test;
+ int agc_out, i;
+
+ REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
+@@ -923,12 +923,18 @@ static void ar9003_hw_manual_peak_cal(st
+ AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR, 0x1);
+ REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
+ AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0x1);
+- if (is_2g)
+- REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
+- AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
+- else
++
++ if (AR_SREV_9330_11(ah)) {
+ REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
+- AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
++ AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0);
++ } else {
++ if (is_2g)
++ REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
++ AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
++ else
++ REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
++ AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
++ }
+
+ for (i = 6; i > 0; i--) {
+ offset[i] = BIT(i - 1);
+@@ -964,9 +970,9 @@ static void ar9003_hw_manual_peak_cal(st
+ AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
+ }
+
+-static void ar9003_hw_do_manual_peak_cal(struct ath_hw *ah,
+- struct ath9k_channel *chan,
+- bool run_rtt_cal)
++static void ar9003_hw_do_pcoem_manual_peak_cal(struct ath_hw *ah,
++ struct ath9k_channel *chan,
++ bool run_rtt_cal)
+ {
+ struct ath9k_hw_cal_data *caldata = ah->caldata;
+ int i;
+@@ -1040,14 +1046,14 @@ static void ar9003_hw_cl_cal_post_proc(s
+ }
+ }
+
+-static bool ar9003_hw_init_cal(struct ath_hw *ah,
+- struct ath9k_channel *chan)
++static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah,
++ struct ath9k_channel *chan)
+ {
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_hw_cal_data *caldata = ah->caldata;
+ bool txiqcal_done = false;
+ bool is_reusable = true, status = true;
+- bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
++ bool run_rtt_cal = false, run_agc_cal;
+ bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
+ u32 rx_delay = 0;
+ u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
+@@ -1119,22 +1125,12 @@ static bool ar9003_hw_init_cal(struct at
+ REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
+ txiqcal_done = run_agc_cal = true;
+- } else if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags)) {
+- run_agc_cal = true;
+- sep_iq_cal = true;
+ }
+
+ skip_tx_iqcal:
+ if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
+ ar9003_mci_init_cal_req(ah, &is_reusable);
+
+- if (sep_iq_cal) {
+- txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
+- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+- udelay(5);
+- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+- }
+-
+ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
+ rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
+ /* Disable BB_active */
+@@ -1155,7 +1151,7 @@ skip_tx_iqcal:
+ AR_PHY_AGC_CONTROL_CAL,
+ 0, AH_WAIT_TIMEOUT);
+
+- ar9003_hw_do_manual_peak_cal(ah, chan, run_rtt_cal);
++ ar9003_hw_do_pcoem_manual_peak_cal(ah, chan, run_rtt_cal);
+ }
+
+ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
+@@ -1228,13 +1224,112 @@ skip_tx_iqcal:
+ return true;
+ }
+
++static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
++ struct ath9k_channel *chan)
++{
++ struct ath_common *common = ath9k_hw_common(ah);
++ struct ath9k_hw_cal_data *caldata = ah->caldata;
++ bool txiqcal_done = false;
++ bool is_reusable = true, status = true;
++ bool run_agc_cal = false, sep_iq_cal = false;
++
++ /* Use chip chainmask only for calibration */
++ ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
++
++ if (ah->enabled_cals & TX_CL_CAL) {
++ REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
++ run_agc_cal = true;
++ }
++
++ if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
++ goto skip_tx_iqcal;
++
++ /* Do Tx IQ Calibration */
++ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
++ AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
++ DELPT);
++
++ /*
++ * For AR9485 or later chips, TxIQ cal runs as part of
++ * AGC calibration. Specifically, AR9550 in SoC chips.
++ */
++ if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
++ txiqcal_done = true;
++ run_agc_cal = true;
++ } else {
++ sep_iq_cal = true;
++ run_agc_cal = true;
++ }
++
++ /*
++ * In the SoC family, this will run for AR9300, AR9331 and AR9340.
++ */
++ if (sep_iq_cal) {
++ txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
++ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
++ udelay(5);
++ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
++ }
++
++skip_tx_iqcal:
++ if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
++ if (AR_SREV_9330_11(ah))
++ ar9003_hw_manual_peak_cal(ah, 0, IS_CHAN_2GHZ(chan));
++
++ /* Calibrate the AGC */
++ REG_WRITE(ah, AR_PHY_AGC_CONTROL,
++ REG_READ(ah, AR_PHY_AGC_CONTROL) |
++ AR_PHY_AGC_CONTROL_CAL);
++
++ /* Poll for offset calibration complete */
++ status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
++ AR_PHY_AGC_CONTROL_CAL,
++ 0, AH_WAIT_TIMEOUT);
++ }
++
++ if (!status) {
++ ath_dbg(common, CALIBRATE,
++ "offset calibration failed to complete in %d ms; noisy environment?\n",
++ AH_WAIT_TIMEOUT / 1000);
++ return false;
++ }
++
++ if (txiqcal_done)
++ ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
++
++ /* Revert chainmask to runtime parameters */
++ ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
++
++ /* Initialize list pointers */
++ ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
++
++ INIT_CAL(&ah->iq_caldata);
++ INSERT_CAL(ah, &ah->iq_caldata);
++ ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
++
++ /* Initialize current pointer to first element in list */
++ ah->cal_list_curr = ah->cal_list;
++
++ if (ah->cal_list_curr)
++ ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
++
++ if (caldata)
++ caldata->CalValid = 0;
++
++ return true;
++}
++
+ void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
+ {
+ struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
+
++ if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah))
++ priv_ops->init_cal = ar9003_hw_init_cal_pcoem;
++ else
++ priv_ops->init_cal = ar9003_hw_init_cal_soc;
++
+ priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
+- priv_ops->init_cal = ar9003_hw_init_cal;
+ priv_ops->setup_calibration = ar9003_hw_setup_calibration;
+
+ ops->calibrate = ar9003_hw_calibrate;
+--- a/drivers/net/wireless/ath/ath9k/common.c
++++ b/drivers/net/wireless/ath/ath9k/common.c
+@@ -98,10 +98,8 @@ struct ath9k_channel *ath9k_cmn_get_chan
+ {
+ struct ieee80211_channel *curchan = chandef->chan;
+ struct ath9k_channel *channel;
+- u8 chan_idx;
+
+- chan_idx = curchan->hw_value;
+- channel = &ah->channels[chan_idx];
++ channel = &ah->channels[curchan->hw_value];
+ ath9k_cmn_update_ichannel(channel, chandef);
+
+ return channel;
+--- a/net/mac80211/rc80211_minstrel_ht.c
++++ b/net/mac80211/rc80211_minstrel_ht.c
+@@ -226,7 +226,7 @@ minstrel_ht_calc_tp(struct minstrel_ht_s
+ nsecs = 1000 * mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
+
+ nsecs += minstrel_mcs_groups[group].duration[rate];
+- tp = 1000000 * ((mr->probability * 1000) / nsecs);
++ tp = 1000000 * ((prob * 1000) / nsecs);
+
+ mr->cur_tp = MINSTREL_TRUNC(tp);
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -131,6 +131,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -138,7 +139,7 @@ static const struct ar9300_eeprom ar9300
+ },
+ .base_ext1 = {
+ .ant_div_control = 0,
+- .future = {0, 0, 0},
++ .future = {0, 0},
+ .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
+ },
+ .calFreqPier2G = {
+@@ -333,6 +334,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -707,6 +709,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -714,7 +717,7 @@ static const struct ar9300_eeprom ar9300
+ },
+ .base_ext1 = {
+ .ant_div_control = 0,
+- .future = {0, 0, 0},
++ .future = {0, 0},
+ .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
+ },
+ .calFreqPier2G = {
+@@ -909,6 +912,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -1284,6 +1288,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -1291,7 +1296,7 @@ static const struct ar9300_eeprom ar9300
+ },
+ .base_ext1 = {
+ .ant_div_control = 0,
+- .future = {0, 0, 0},
++ .future = {0, 0},
+ .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
+ },
+ .calFreqPier2G = {
+@@ -1486,6 +1491,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -1861,6 +1867,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -1868,7 +1875,7 @@ static const struct ar9300_eeprom ar9300
+ },
+ .base_ext1 = {
+ .ant_div_control = 0,
+- .future = {0, 0, 0},
++ .future = {0, 0},
+ .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
+ },
+ .calFreqPier2G = {
+@@ -2063,6 +2070,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -2437,6 +2445,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80C080),
+ .papdRateMaskHt40 = LE32(0x0080C080),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -2444,7 +2453,7 @@ static const struct ar9300_eeprom ar9300
+ },
+ .base_ext1 = {
+ .ant_div_control = 0,
+- .future = {0, 0, 0},
++ .future = {0, 0},
+ .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
+ },
+ .calFreqPier2G = {
+@@ -2639,6 +2648,7 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .switchcomspdt = 0,
+ .xlna_bias_strength = 0,
+ .futureModal = {
+ 0, 0, 0, 0, 0, 0, 0,
+@@ -3965,7 +3975,7 @@ static void ar9003_hw_apply_tuning_caps(
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
+
+- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
++ if (AR_SREV_9340(ah))
+ return;
+
+ if (eep->baseEepHeader.featureEnable & 0x40) {
+@@ -3984,18 +3994,20 @@ static void ar9003_hw_quick_drop_apply(s
+ int quick_drop;
+ s32 t[3], f[3] = {5180, 5500, 5785};
+
+- if (!(pBase->miscConfiguration & BIT(1)))
++ if (!(pBase->miscConfiguration & BIT(4)))
+ return;
+
+- if (freq < 4000)
+- quick_drop = eep->modalHeader2G.quick_drop;
+- else {
+- t[0] = eep->base_ext1.quick_drop_low;
+- t[1] = eep->modalHeader5G.quick_drop;
+- t[2] = eep->base_ext1.quick_drop_high;
+- quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
++ if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9340(ah)) {
++ if (freq < 4000) {
++ quick_drop = eep->modalHeader2G.quick_drop;
++ } else {
++ t[0] = eep->base_ext1.quick_drop_low;
++ t[1] = eep->modalHeader5G.quick_drop;
++ t[2] = eep->base_ext1.quick_drop_high;
++ quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
++ }
++ REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+- REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+
+ static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
+@@ -4035,7 +4047,7 @@ static void ar9003_hw_xlna_bias_strength
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u8 bias;
+
+- if (!(eep->baseEepHeader.featureEnable & 0x40))
++ if (!(eep->baseEepHeader.miscConfiguration & 0x40))
+ return;
+
+ if (!AR_SREV_9300(ah))
+@@ -4109,6 +4121,37 @@ static void ar9003_hw_thermo_cal_apply(s
+ }
+ }
+
++static void ar9003_hw_apply_minccapwr_thresh(struct ath_hw *ah,
++ bool is2ghz)
++{
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ const u_int32_t cca_ctrl[AR9300_MAX_CHAINS] = {
++ AR_PHY_CCA_CTRL_0,
++ AR_PHY_CCA_CTRL_1,
++ AR_PHY_CCA_CTRL_2,
++ };
++ int chain;
++ u32 val;
++
++ if (is2ghz) {
++ if (!(eep->base_ext1.misc_enable & BIT(2)))
++ return;
++ } else {
++ if (!(eep->base_ext1.misc_enable & BIT(3)))
++ return;
++ }
++
++ for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
++ if (!(ah->caps.tx_chainmask & BIT(chain)))
++ continue;
++
++ val = ar9003_modal_header(ah, is2ghz)->noiseFloorThreshCh[chain];
++ REG_RMW_FIELD(ah, cca_ctrl[chain],
++ AR_PHY_EXT_CCA0_THRESH62_1, val);
++ }
++
++}
++
+ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+@@ -4120,9 +4163,10 @@ static void ath9k_hw_ar9300_set_board_va
+ ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
+ ar9003_hw_atten_apply(ah, chan);
+ ar9003_hw_quick_drop_apply(ah, chan->channel);
+- if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
++ if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah))
+ ar9003_hw_internal_regulator_apply(ah);
+ ar9003_hw_apply_tuning_caps(ah);
++ ar9003_hw_apply_minccapwr_thresh(ah, chan);
+ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
+ ar9003_hw_thermometer_apply(ah);
+ ar9003_hw_thermo_cal_apply(ah);
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -735,6 +735,7 @@ struct ieee80211_sub_if_data {
+ int csa_counter_offset_beacon;
+ int csa_counter_offset_presp;
+ bool csa_radar_required;
++ struct cfg80211_chan_def csa_chandef;
+
+ /* used to reconfigure hardware SM PS */
+ struct work_struct recalc_smps;
+@@ -811,6 +812,9 @@ static inline void sdata_unlock(struct i
+ __release(&sdata->wdev.mtx);
+ }
+
++#define sdata_dereference(p, sdata) \
++ rcu_dereference_protected(p, lockdep_is_held(&sdata->wdev.mtx))
++
+ static inline void
+ sdata_assert_lock(struct ieee80211_sub_if_data *sdata)
+ {
+@@ -1098,7 +1102,6 @@ struct ieee80211_local {
+ enum mac80211_scan_state next_scan_state;
+ struct delayed_work scan_work;
+ struct ieee80211_sub_if_data __rcu *scan_sdata;
+- struct cfg80211_chan_def csa_chandef;
+ /* For backward compatibility only -- do not use */
+ struct cfg80211_chan_def _oper_chandef;
+
+@@ -1236,6 +1239,7 @@ struct ieee80211_csa_ie {
+ u8 mode;
+ u8 count;
+ u8 ttl;
++ u16 pre_value;
+ };
+
+ /* Parsed Information Elements */
+@@ -1738,7 +1742,6 @@ ieee80211_vif_change_bandwidth(struct ie
+ /* NOTE: only use ieee80211_vif_change_channel() for channel switch */
+ int __must_check
+ ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
+- const struct cfg80211_chan_def *chandef,
+ u32 *changed);
+ void ieee80211_vif_release_channel(struct ieee80211_sub_if_data *sdata);
+ void ieee80211_vif_vlan_copy_chanctx(struct ieee80211_sub_if_data *sdata);
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -411,12 +411,12 @@ int ieee80211_vif_use_channel(struct iee
+ }
+
+ int ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
+- const struct cfg80211_chan_def *chandef,
+ u32 *changed)
+ {
+ struct ieee80211_local *local = sdata->local;
+ struct ieee80211_chanctx_conf *conf;
+ struct ieee80211_chanctx *ctx;
++ const struct cfg80211_chan_def *chandef = &sdata->csa_chandef;
+ int ret;
+ u32 chanctx_changed = 0;
+
+--- a/net/mac80211/ibss.c
++++ b/net/mac80211/ibss.c
+@@ -534,7 +534,7 @@ int ieee80211_ibss_finish_csa(struct iee
+ int err;
+ u16 capability;
+
+- sdata_lock(sdata);
++ sdata_assert_lock(sdata);
+ /* update cfg80211 bss information with the new channel */
+ if (!is_zero_ether_addr(ifibss->bssid)) {
+ capability = WLAN_CAPABILITY_IBSS;
+@@ -550,16 +550,15 @@ int ieee80211_ibss_finish_csa(struct iee
+ capability);
+ /* XXX: should not really modify cfg80211 data */
+ if (cbss) {
+- cbss->channel = sdata->local->csa_chandef.chan;
++ cbss->channel = sdata->csa_chandef.chan;
+ cfg80211_put_bss(sdata->local->hw.wiphy, cbss);
+ }
+ }
+
+- ifibss->chandef = sdata->local->csa_chandef;
++ ifibss->chandef = sdata->csa_chandef;
+
+ /* generate the beacon */
+ err = ieee80211_ibss_csa_beacon(sdata, NULL);
+- sdata_unlock(sdata);
+ if (err < 0)
+ return err;
+
+@@ -922,7 +921,7 @@ ieee80211_ibss_process_chanswitch(struct
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- sdata->local->csa_chandef = params.chandef;
++ sdata->csa_chandef = params.chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
+--- a/net/mac80211/mesh.c
++++ b/net/mac80211/mesh.c
+@@ -943,14 +943,19 @@ ieee80211_mesh_process_chnswitch(struct
+ params.chandef.chan->center_freq);
+
+ params.block_tx = csa_ie.mode & WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT;
+- if (beacon)
++ if (beacon) {
+ ifmsh->chsw_ttl = csa_ie.ttl - 1;
+- else
+- ifmsh->chsw_ttl = 0;
++ if (ifmsh->pre_value >= csa_ie.pre_value)
++ return false;
++ ifmsh->pre_value = csa_ie.pre_value;
++ }
+
+- if (ifmsh->chsw_ttl > 0)
++ if (ifmsh->chsw_ttl < ifmsh->mshcfg.dot11MeshTTL) {
+ if (ieee80211_mesh_csa_beacon(sdata, ¶ms, false) < 0)
+ return false;
++ } else {
++ return false;
++ }
+
+ sdata->csa_radar_required = params.radar_required;
+
+@@ -959,7 +964,7 @@ ieee80211_mesh_process_chnswitch(struct
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- sdata->local->csa_chandef = params.chandef;
++ sdata->csa_chandef = params.chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
+@@ -1163,7 +1168,6 @@ static int mesh_fwd_csa_frame(struct iee
+ offset_ttl = (len < 42) ? 7 : 10;
+ *(pos + offset_ttl) -= 1;
+ *(pos + offset_ttl + 1) &= ~WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR;
+- sdata->u.mesh.chsw_ttl = *(pos + offset_ttl);
+
+ memcpy(mgmt_fwd, mgmt, len);
+ eth_broadcast_addr(mgmt_fwd->da);
+@@ -1182,7 +1186,7 @@ static void mesh_rx_csa_frame(struct iee
+ u16 pre_value;
+ bool fwd_csa = true;
+ size_t baselen;
+- u8 *pos, ttl;
++ u8 *pos;
+
+ if (mgmt->u.action.u.measurement.action_code !=
+ WLAN_ACTION_SPCT_CHL_SWITCH)
+@@ -1193,8 +1197,8 @@ static void mesh_rx_csa_frame(struct iee
+ u.action.u.chan_switch.variable);
+ ieee802_11_parse_elems(pos, len - baselen, false, &elems);
+
+- ttl = elems.mesh_chansw_params_ie->mesh_ttl;
+- if (!--ttl)
++ ifmsh->chsw_ttl = elems.mesh_chansw_params_ie->mesh_ttl;
++ if (!--ifmsh->chsw_ttl)
+ fwd_csa = false;
+
+ pre_value = le16_to_cpu(elems.mesh_chansw_params_ie->mesh_pre_value);
+--- a/net/mac80211/spectmgmt.c
++++ b/net/mac80211/spectmgmt.c
+@@ -78,6 +78,8 @@ int ieee80211_parse_ch_switch_ie(struct
+ if (elems->mesh_chansw_params_ie) {
+ csa_ie->ttl = elems->mesh_chansw_params_ie->mesh_ttl;
+ csa_ie->mode = elems->mesh_chansw_params_ie->mesh_flags;
++ csa_ie->pre_value = le16_to_cpu(
++ elems->mesh_chansw_params_ie->mesh_pre_value);
+ }
+
+ new_freq = ieee80211_channel_to_frequency(new_chan_no, new_band);
+--- a/drivers/net/wireless/ath/ath6kl/cfg80211.c
++++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c
+@@ -1109,7 +1109,9 @@ void ath6kl_cfg80211_ch_switch_notify(st
+ (mode == WMI_11G_HT20) ?
+ NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT);
+
++ mutex_lock(vif->wdev->mtx);
+ cfg80211_ch_switch_notify(vif->ndev, &chandef);
++ mutex_unlock(vif->wdev->mtx);
+ }
+
+ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
+--- a/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
+@@ -20,6 +20,44 @@
+
+ /* AR9462 2.1 */
+
++#define ar9462_2p1_mac_postamble ar9462_2p0_mac_postamble
++
++#define ar9462_2p1_baseband_core ar9462_2p0_baseband_core
++
++#define ar9462_2p1_radio_core ar9462_2p0_radio_core
++
++#define ar9462_2p1_radio_postamble ar9462_2p0_radio_postamble
++
++#define ar9462_2p1_soc_postamble ar9462_2p0_soc_postamble
++
++#define ar9462_2p1_radio_postamble_sys2ant ar9462_2p0_radio_postamble_sys2ant
++
++#define ar9462_2p1_common_rx_gain ar9462_2p0_common_rx_gain
++
++#define ar9462_2p1_common_mixed_rx_gain ar9462_2p0_common_mixed_rx_gain
++
++#define ar9462_2p1_common_5g_xlna_only_rxgain ar9462_2p0_common_5g_xlna_only_rxgain
++
++#define ar9462_2p1_baseband_core_mix_rxgain ar9462_2p0_baseband_core_mix_rxgain
++
++#define ar9462_2p1_baseband_postamble_mix_rxgain ar9462_2p0_baseband_postamble_mix_rxgain
++
++#define ar9462_2p1_baseband_postamble_5g_xlna ar9462_2p0_baseband_postamble_5g_xlna
++
++#define ar9462_2p1_common_wo_xlna_rx_gain ar9462_2p0_common_wo_xlna_rx_gain
++
++#define ar9462_2p1_modes_low_ob_db_tx_gain ar9462_2p0_modes_low_ob_db_tx_gain
++
++#define ar9462_2p1_modes_high_ob_db_tx_gain ar9462_2p0_modes_high_ob_db_tx_gain
++
++#define ar9462_2p1_modes_mix_ob_db_tx_gain ar9462_2p0_modes_mix_ob_db_tx_gain
++
++#define ar9462_2p1_modes_fast_clock ar9462_2p0_modes_fast_clock
++
++#define ar9462_2p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
++
++#define ar9462_2p1_pciephy_clkreq_disable_L1 ar9462_2p0_pciephy_clkreq_disable_L1
++
+ static const u32 ar9462_2p1_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+@@ -183,168 +221,6 @@ static const u32 ar9462_2p1_mac_core[][2
+ {0x000083d0, 0x000301ff},
+ };
+
+-static const u32 ar9462_2p1_mac_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core[][2] = {
+- /* Addr allmodes */
+- {0x00009800, 0xafe68e30},
+- {0x00009804, 0xfd14e000},
+- {0x00009808, 0x9c0a9f6b},
+- {0x0000980c, 0x04900000},
+- {0x00009814, 0x9280c00a},
+- {0x00009818, 0x00000000},
+- {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
+- {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
+- {0x00009880, 0x201fff00},
+- {0x00009884, 0x00001042},
+- {0x000098a4, 0x00200400},
+- {0x000098b0, 0x32440bbe},
+- {0x000098d0, 0x004b6a8e},
+- {0x000098d4, 0x00000820},
+- {0x000098dc, 0x00000000},
+- {0x000098e4, 0x01ffffff},
+- {0x000098e8, 0x01ffffff},
+- {0x000098ec, 0x01ffffff},
+- {0x000098f0, 0x00000000},
+- {0x000098f4, 0x00000000},
+- {0x00009bf0, 0x80000000},
+- {0x00009c04, 0xff55ff55},
+- {0x00009c08, 0x0320ff55},
+- {0x00009c0c, 0x00000000},
+- {0x00009c10, 0x00000000},
+- {0x00009c14, 0x00046384},
+- {0x00009c18, 0x05b6b440},
+- {0x00009c1c, 0x00b6b440},
+- {0x00009d00, 0xc080a333},
+- {0x00009d04, 0x40206c10},
+- {0x00009d08, 0x009c4060},
+- {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
+- {0x00009d14, 0x00c0040b},
+- {0x00009d18, 0x00000000},
+- {0x00009e08, 0x0038230c},
+- {0x00009e24, 0x990bb515},
+- {0x00009e28, 0x0c6f0000},
+- {0x00009e30, 0x06336f77},
+- {0x00009e34, 0x6af6532f},
+- {0x00009e38, 0x0cc80c00},
+- {0x00009e40, 0x15262820},
+- {0x00009e4c, 0x00001004},
+- {0x00009e50, 0x00ff03f1},
+- {0x00009e54, 0xe4c555c2},
+- {0x00009e58, 0xfd857722},
+- {0x00009e5c, 0xe9198724},
+- {0x00009fc0, 0x803e4788},
+- {0x00009fc4, 0x0001efb5},
+- {0x00009fcc, 0x40000014},
+- {0x00009fd0, 0x0a193b93},
+- {0x0000a20c, 0x00000000},
+- {0x0000a220, 0x00000000},
+- {0x0000a224, 0x00000000},
+- {0x0000a228, 0x10002310},
+- {0x0000a23c, 0x00000000},
+- {0x0000a244, 0x0c000000},
+- {0x0000a2a0, 0x00000001},
+- {0x0000a2c0, 0x00000001},
+- {0x0000a2c8, 0x00000000},
+- {0x0000a2cc, 0x18c43433},
+- {0x0000a2d4, 0x00000000},
+- {0x0000a2ec, 0x00000000},
+- {0x0000a2f0, 0x00000000},
+- {0x0000a2f4, 0x00000000},
+- {0x0000a2f8, 0x00000000},
+- {0x0000a344, 0x00000000},
+- {0x0000a34c, 0x00000000},
+- {0x0000a350, 0x0000a000},
+- {0x0000a364, 0x00000000},
+- {0x0000a370, 0x00000000},
+- {0x0000a390, 0x00000001},
+- {0x0000a394, 0x00000444},
+- {0x0000a398, 0x001f0e0f},
+- {0x0000a39c, 0x0075393f},
+- {0x0000a3a0, 0xb79f6427},
+- {0x0000a3c0, 0x20202020},
+- {0x0000a3c4, 0x22222220},
+- {0x0000a3c8, 0x20200020},
+- {0x0000a3cc, 0x20202020},
+- {0x0000a3d0, 0x20202020},
+- {0x0000a3d4, 0x20202020},
+- {0x0000a3d8, 0x20202020},
+- {0x0000a3dc, 0x20202020},
+- {0x0000a3e0, 0x20202020},
+- {0x0000a3e4, 0x20202020},
+- {0x0000a3e8, 0x20202020},
+- {0x0000a3ec, 0x20202020},
+- {0x0000a3f0, 0x00000000},
+- {0x0000a3f4, 0x00000006},
+- {0x0000a3f8, 0x0c9bd380},
+- {0x0000a3fc, 0x000f0f01},
+- {0x0000a400, 0x8fa91f01},
+- {0x0000a404, 0x00000000},
+- {0x0000a408, 0x0e79e5c6},
+- {0x0000a40c, 0x00820820},
+- {0x0000a414, 0x1ce739ce},
+- {0x0000a418, 0x2d001dce},
+- {0x0000a434, 0x00000000},
+- {0x0000a438, 0x00001801},
+- {0x0000a43c, 0x00100000},
+- {0x0000a444, 0x00000000},
+- {0x0000a448, 0x05000080},
+- {0x0000a44c, 0x00000001},
+- {0x0000a450, 0x00010000},
+- {0x0000a454, 0x07000000},
+- {0x0000a644, 0xbfad9d74},
+- {0x0000a648, 0x0048060a},
+- {0x0000a64c, 0x00002037},
+- {0x0000a670, 0x03020100},
+- {0x0000a674, 0x09080504},
+- {0x0000a678, 0x0d0c0b0a},
+- {0x0000a67c, 0x13121110},
+- {0x0000a680, 0x31301514},
+- {0x0000a684, 0x35343332},
+- {0x0000a688, 0x00000036},
+- {0x0000a690, 0x00000838},
+- {0x0000a6b0, 0x0000000a},
+- {0x0000a6b4, 0x00512c01},
+- {0x0000a7c0, 0x00000000},
+- {0x0000a7c4, 0xfffffffc},
+- {0x0000a7c8, 0x00000000},
+- {0x0000a7cc, 0x00000000},
+- {0x0000a7d0, 0x00000000},
+- {0x0000a7d4, 0x00000004},
+- {0x0000a7dc, 0x00000000},
+- {0x0000a7f0, 0x80000000},
+- {0x0000a8d0, 0x004b6a8e},
+- {0x0000a8d4, 0x00000820},
+- {0x0000a8dc, 0x00000000},
+- {0x0000a8f0, 0x00000000},
+- {0x0000a8f4, 0x00000000},
+- {0x0000abf0, 0x80000000},
+- {0x0000b2d0, 0x00000080},
+- {0x0000b2d4, 0x00000000},
+- {0x0000b2ec, 0x00000000},
+- {0x0000b2f0, 0x00000000},
+- {0x0000b2f4, 0x00000000},
+- {0x0000b2f8, 0x00000000},
+- {0x0000b408, 0x0e79e5c0},
+- {0x0000b40c, 0x00820820},
+- {0x0000b420, 0x00000000},
+- {0x0000b6b0, 0x0000000a},
+- {0x0000b6b4, 0x00000001},
+-};
+-
+ static const u32 ar9462_2p1_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
+@@ -361,7 +237,7 @@ static const u32 ar9462_2p1_baseband_pos
+ {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32365a5e},
+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
++ {0x00009e20, 0x000003a5, 0x000003a5, 0x000003a5, 0x000003a5},
+ {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+ {0x00009e44, 0x62321e27, 0x62321e27, 0xfe291e27, 0xfe291e27},
+@@ -400,1375 +276,16 @@ static const u32 ar9462_2p1_baseband_pos
+ {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+- {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
++ {0x0000ae20, 0x000001a6, 0x000001a6, 0x000001aa, 0x000001aa},
+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+ };
+
+-static const u32 ar9462_2p1_radio_core[][2] = {
+- /* Addr allmodes */
+- {0x00016000, 0x36db6db6},
+- {0x00016004, 0x6db6db40},
+- {0x00016008, 0x73f00000},
+- {0x0001600c, 0x00000000},
+- {0x00016010, 0x6d820001},
+- {0x00016040, 0x7f80fff8},
+- {0x0001604c, 0x2699e04f},
+- {0x00016050, 0x6db6db6c},
+- {0x00016058, 0x6c200000},
+- {0x00016080, 0x000c0000},
+- {0x00016084, 0x9a68048c},
+- {0x00016088, 0x54214514},
+- {0x0001608c, 0x1203040b},
+- {0x00016090, 0x24926490},
+- {0x00016098, 0xd2888888},
+- {0x000160a0, 0x0a108ffe},
+- {0x000160a4, 0x812fc491},
+- {0x000160a8, 0x423c8000},
+- {0x000160b4, 0x92000000},
+- {0x000160b8, 0x0285dddc},
+- {0x000160bc, 0x02908888},
+- {0x000160c0, 0x00adb6d0},
+- {0x000160c4, 0x6db6db60},
+- {0x000160c8, 0x6db6db6c},
+- {0x000160cc, 0x0de6c1b0},
+- {0x00016100, 0x3fffbe04},
+- {0x00016104, 0xfff80000},
+- {0x00016108, 0x00200400},
+- {0x00016110, 0x00000000},
+- {0x00016144, 0x02084080},
+- {0x00016148, 0x000080c0},
+- {0x00016280, 0x050a0001},
+- {0x00016284, 0x3d841418},
+- {0x00016288, 0x00000000},
+- {0x0001628c, 0xe3000000},
+- {0x00016290, 0xa1005080},
+- {0x00016294, 0x00000020},
+- {0x00016298, 0x54a82900},
+- {0x00016340, 0x121e4276},
+- {0x00016344, 0x00300000},
+- {0x00016400, 0x36db6db6},
+- {0x00016404, 0x6db6db40},
+- {0x00016408, 0x73f00000},
+- {0x0001640c, 0x00000000},
+- {0x00016410, 0x6c800001},
+- {0x00016440, 0x7f80fff8},
+- {0x0001644c, 0x4699e04f},
+- {0x00016450, 0x6db6db6c},
+- {0x00016500, 0x3fffbe04},
+- {0x00016504, 0xfff80000},
+- {0x00016508, 0x00200400},
+- {0x00016510, 0x00000000},
+- {0x00016544, 0x02084080},
+- {0x00016548, 0x000080c0},
+-};
+-
+-static const u32 ar9462_2p1_radio_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
+- {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
+- {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+- {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-};
+-
+ static const u32 ar9462_2p1_soc_preamble[][2] = {
+ /* Addr allmodes */
+- {0x000040a4, 0x00a0c1c9},
++ {0x000040a4, 0x00a0c9c9},
+ {0x00007020, 0x00000000},
+ {0x00007034, 0x00000002},
+ {0x00007038, 0x000004c2},
+ };
+
+-static const u32 ar9462_2p1_soc_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
+-};
+-
+-static const u32 ar9462_2p1_radio_postamble_sys2ant[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+- {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-};
+-
+-static const u32 ar9462_2p1_common_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x01910190},
+- {0x0000a030, 0x01930192},
+- {0x0000a034, 0x01950194},
+- {0x0000a038, 0x038a0196},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x22222229},
+- {0x0000a084, 0x1d1d1d1d},
+- {0x0000a088, 0x1d1d1d1d},
+- {0x0000a08c, 0x1d1d1d1d},
+- {0x0000a090, 0x171d1d1d},
+- {0x0000a094, 0x11111717},
+- {0x0000a098, 0x00030311},
+- {0x0000a09c, 0x00000000},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_common_mixed_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core_mix_rxgain[][2] = {
+- /* Addr allmodes */
+- {0x00009fd0, 0x0a2d6b93},
+-};
+-
+-static const u32 ar9462_2p1_baseband_postamble_mix_rxgain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00009820, 0x206a022e, 0x206a022e, 0x206a01ae, 0x206a01ae},
+- {0x00009824, 0x63c640de, 0x5ac640d0, 0x63c640da, 0x63c640da},
+- {0x00009828, 0x0796be89, 0x0696b081, 0x0916be81, 0x0916be81},
+- {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000d8, 0x6c4000d8},
+- {0x00009e10, 0x92c88d2e, 0x7ec88d2e, 0x7ec86d2e, 0x7ec86d2e},
+- {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32395c5e},
+-};
+-
+-static const u32 ar9462_2p1_baseband_postamble_5g_xlna[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+-};
+-
+-static const u32 ar9462_2p1_common_wo_xlna_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x32323232},
+- {0x0000b084, 0x2f2f3232},
+- {0x0000b088, 0x23282a2d},
+- {0x0000b08c, 0x1c1e2123},
+- {0x0000b090, 0x14171919},
+- {0x0000b094, 0x0e0e1214},
+- {0x0000b098, 0x03050707},
+- {0x0000b09c, 0x00030303},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_common_5g_xlna_only_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_modes_low_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
+- {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
+- {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
+- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+- {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
+- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9462_2p1_modes_high_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050da, 0x000050da, 0x000050de, 0x000050de},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
+- {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
+- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+- {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
+- {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
+- {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
+- {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
+- {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
+- {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
+- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
+- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
+- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
+- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
+- {0x0000a548, 0x55025eb3, 0x55025eb3, 0x3e001a81, 0x3e001a81},
+- {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x42001a83, 0x42001a83},
+- {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x44001a84, 0x44001a84},
+- {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
+- {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
+- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
+- {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
+- {0x0000a564, 0x751ffff6, 0x751ffff6, 0x56001eec, 0x56001eec},
+- {0x0000a568, 0x751ffff6, 0x751ffff6, 0x58001ef0, 0x58001ef0},
+- {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x5a001ef4, 0x5a001ef4},
+- {0x0000a570, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a574, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a578, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+- {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
+- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+- {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+- {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
+- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9462_2p1_modes_mix_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x0000d0da, 0x0000d0da, 0x0000d0de, 0x0000d0de},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x18022622, 0x18022622, 0x12000400, 0x12000400},
+- {0x0000a518, 0x1b022822, 0x1b022822, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+- {0x0000a520, 0x22022c41, 0x22022c41, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x28023042, 0x28023042, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x2c023044, 0x2c023044, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x2f023644, 0x2f023644, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x34025643, 0x34025643, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x38025a44, 0x38025a44, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x38001640, 0x38001640},
+- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x55025eb3, 0x55025eb3, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x62025f56, 0x62025f56, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x66027f56, 0x66027f56, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x70049f56, 0x70049f56, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x751ffff6, 0x751ffff6, 0x5c001eec, 0x5c001eec},
+- {0x0000a568, 0x751ffff6, 0x751ffff6, 0x5e001ef0, 0x5e001ef0},
+- {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x60001ef4, 0x60001ef4},
+- {0x0000a570, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a574, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a578, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-};
+-
+-static const u32 ar9462_2p1_modes_fast_clock[][3] = {
+- /* Addr 5G_HT20 5G_HT40 */
+- {0x00001030, 0x00000268, 0x000004d0},
+- {0x00001070, 0x0000018c, 0x00000318},
+- {0x000010b0, 0x00000fd0, 0x00001fa0},
+- {0x00008014, 0x044c044c, 0x08980898},
+- {0x0000801c, 0x148ec02b, 0x148ec057},
+- {0x00008318, 0x000044c0, 0x00008980},
+- {0x00009e00, 0x0372131c, 0x0372131c},
+- {0x0000a230, 0x0000400b, 0x00004016},
+- {0x0000a254, 0x00000898, 0x00001130},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core_txfir_coeff_japan_2484[][2] = {
+- /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
+-};
+-
+ #endif /* INITVALS_9462_2P1_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+@@ -20,24 +20,11 @@
+
+ /* AR9485 1.1 */
+
+-static const u32 ar9485_1_1_mac_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
++#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
+
+-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18012e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
++#define ar9485_1_1_mac_postamble ar9331_1p1_mac_postamble
++
++#define ar9485_1_1_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
+
+ static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
+ /* Addr allmodes */
+@@ -553,100 +540,6 @@ static const u32 ar9485Modes_low_ob_db_t
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+ };
+
+-static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+- {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+- {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+- {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+- {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+- {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+- {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+- {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+- {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+- {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+- {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+- {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+- {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+- {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+- {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+- {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+- {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+- {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+- {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+- {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+- {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+- {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+- {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+- {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+- {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
+- {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+- {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+- {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
+- {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
+- {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+- {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+- {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+- {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+- {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+- {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+- {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+-};
+-
+ static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+@@ -1101,20 +994,6 @@ static const u32 ar9485_common_rx_gain_1
+ {0x0000a1fc, 0x00000296},
+ };
+
+-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18052e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+-static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18053e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+ static const u32 ar9485_1_1_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x00004014, 0xba280400},
+@@ -1173,13 +1052,6 @@ static const u32 ar9485_1_1_baseband_pos
+ {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ };
+
+-static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18013e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+ static const u32 ar9485_1_1_radio_postamble[][2] = {
+ /* Addr allmodes */
+ {0x0001609c, 0x0b283f31},
+@@ -1351,11 +1223,18 @@ static const u32 ar9485_1_1_mac_core[][2
+ {0x000083d0, 0x000301ff},
+ };
+
+-static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
++static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
+ /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
++ {0x00018c00, 0x18013e5e},
++ {0x00018c04, 0x000801d8},
++ {0x00018c08, 0x0000080c},
++};
++
++static const u32 ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1[][2] = {
++ /* Addr allmodes */
++ {0x00018c00, 0x1801265e},
++ {0x00018c04, 0x000801d8},
++ {0x00018c08, 0x0000080c},
+ };
+
+ #endif /* INITVALS_9485_H */
+--- a/drivers/net/wireless/ath/ath9k/pci.c
++++ b/drivers/net/wireless/ath/ath9k/pci.c
+@@ -195,6 +195,93 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
+ 0x3219),
+ .driver_data = ATH9K_PCI_BT_ANT_DIV },
+
++ /* AR9485 cards with PLL power-save disabled by default. */
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x2C97),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x2100),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1C56, /* ASKEY */
++ 0x4001),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x11AD, /* LITEON */
++ 0x6627),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x11AD, /* LITEON */
++ 0x6628),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_FOXCONN,
++ 0xE04E),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_FOXCONN,
++ 0xE04F),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x144F, /* ASKEY */
++ 0x7197),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x2000),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x2001),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1186),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1F86),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1195),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1F95),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x1C00),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x1C01),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_ASUSTEK,
++ 0x850D),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++
+ { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
+ { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
+
+--- a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
+@@ -20,7 +20,15 @@
+
+ /* AR9462 2.0 */
+
+-static const u32 ar9462_modes_fast_clock_2p0[][3] = {
++#define ar9462_2p0_mac_postamble ar9331_1p1_mac_postamble
++
++#define ar9462_2p0_common_wo_xlna_rx_gain ar9300Common_wo_xlna_rx_gain_table_2p2
++
++#define ar9462_2p0_common_5g_xlna_only_rxgain ar9462_2p0_common_mixed_rx_gain
++
++#define ar9462_2p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
++
++static const u32 ar9462_2p0_modes_fast_clock[][3] = {
+ /* Addr 5G_HT20 5G_HT40 */
+ {0x00001030, 0x00000268, 0x000004d0},
+ {0x00001070, 0x0000018c, 0x00000318},
+@@ -33,13 +41,6 @@ static const u32 ar9462_modes_fast_clock
+ {0x0000a254, 0x00000898, 0x00001130},
+ };
+
+-static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18253ede},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0003780c},
+-};
+-
+ static const u32 ar9462_2p0_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
+@@ -99,7 +100,7 @@ static const u32 ar9462_2p0_baseband_pos
+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+ };
+
+-static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
++static const u32 ar9462_2p0_common_rx_gain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+@@ -359,20 +360,13 @@ static const u32 ar9462_common_rx_gain_t
+ {0x0000b1fc, 0x00000196},
+ };
+
+-static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
++static const u32 ar9462_2p0_pciephy_clkreq_disable_L1[][2] = {
+ /* Addr allmodes */
+ {0x00018c00, 0x18213ede},
+ {0x00018c04, 0x000801d8},
+ {0x00018c08, 0x0003780c},
+ };
+
+-static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18212ede},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0003780c},
+-};
+-
+ static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+@@ -380,348 +374,81 @@ static const u32 ar9462_2p0_radio_postam
+ {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+ };
+
+-static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x32323232},
+- {0x0000b084, 0x2f2f3232},
+- {0x0000b088, 0x23282a2d},
+- {0x0000b08c, 0x1c1e2123},
+- {0x0000b090, 0x14171919},
+- {0x0000b094, 0x0e0e1214},
+- {0x0000b098, 0x03050707},
+- {0x0000b09c, 0x00030303},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+- /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
+-};
+-
+-static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
+- {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
+- {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
+- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+- {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
+- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9462_2p0_soc_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
+-};
+-
+-static const u32 ar9462_2p0_baseband_core[][2] = {
++static const u32 ar9462_2p0_modes_low_ob_db_tx_gain[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
++ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
++ {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
++ {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++ {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
++ {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++ {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++ {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
++ {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++};
++
++static const u32 ar9462_2p0_soc_postamble[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
++};
++
++static const u32 ar9462_2p0_baseband_core[][2] = {
+ /* Addr allmodes */
+ {0x00009800, 0xafe68e30},
+ {0x00009804, 0xfd14e000},
+@@ -879,7 +606,7 @@ static const u32 ar9462_2p0_radio_postam
+ {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+ };
+
+-static const u32 ar9462_modes_mix_ob_db_tx_gain_table_2p0[][5] = {
++static const u32 ar9462_2p0_modes_mix_ob_db_tx_gain[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+@@ -942,7 +669,7 @@ static const u32 ar9462_modes_mix_ob_db_
+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+ };
+
+-static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
++static const u32 ar9462_2p0_modes_high_ob_db_tx_gain[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+@@ -1240,19 +967,7 @@ static const u32 ar9462_2p0_mac_core[][2
+ {0x000083d0, 0x000301ff},
+ };
+
+-static const u32 ar9462_2p0_mac_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+-static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
++static const u32 ar9462_2p0_common_mixed_rx_gain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+@@ -1517,266 +1232,6 @@ static const u32 ar9462_2p0_baseband_pos
+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+ };
+
+-static const u32 ar9462_2p0_5g_xlna_only_rxgain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+ static const u32 ar9462_2p0_baseband_core_mix_rxgain[][2] = {
+ /* Addr allmodes */
+ {0x00009fd0, 0x0a2d6b93},
+--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+@@ -303,7 +303,7 @@ static const u32 ar9300_2p2_mac_postambl
+ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
++ {0x00008120, 0x18f04800, 0x18f04800, 0x18f04810, 0x18f04810},
+ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+ };
+@@ -352,7 +352,7 @@ static const u32 ar9300_2p2_baseband_pos
+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++ {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+@@ -378,9 +378,9 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x00009814, 0x9280c00a},
+ {0x00009818, 0x00000000},
+ {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
++ {0x00009834, 0x6400a190},
+ {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
++ {0x0000983c, 0x14000600},
+ {0x00009880, 0x201fff00},
+ {0x00009884, 0x00001042},
+ {0x000098a4, 0x00200400},
+@@ -401,7 +401,7 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x00009d04, 0x40206c10},
+ {0x00009d08, 0x009c4060},
+ {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
++ {0x00009d10, 0x01884061},
+ {0x00009d14, 0x00c0040b},
+ {0x00009d18, 0x00000000},
+ {0x00009e08, 0x0038230c},
+@@ -459,7 +459,7 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x0000a3e8, 0x20202020},
+ {0x0000a3ec, 0x20202020},
+ {0x0000a3f0, 0x00000000},
+- {0x0000a3f4, 0x00000246},
++ {0x0000a3f4, 0x00000000},
+ {0x0000a3f8, 0x0c9bd380},
+ {0x0000a3fc, 0x000f0f01},
+ {0x0000a400, 0x8fa91f01},
+@@ -534,107 +534,107 @@ static const u32 ar9300_2p2_baseband_cor
+
+ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
+- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+- {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
+- {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
+- {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
+- {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
+- {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
+- {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
+- {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
+- {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
+- {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
+- {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
+- {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
+- {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
+- {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
+- {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
+- {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
+- {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
+- {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
+- {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
+- {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
+- {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
+- {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
+- {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
+- {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
+- {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
+- {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
+- {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
+- {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
+- {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
+- {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
+- {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
+- {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
+- {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
+- {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
+- {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
+- {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
+- {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
+- {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
+- {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
+- {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
+- {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
+- {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
+- {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
+- {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
+- {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
+- {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
+- {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
+- {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
+- {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
+- {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
++ {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
++ {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
++ {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
++ {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
++ {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
++ {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
++ {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
++ {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
++ {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
++ {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
++ {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
++ {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
++ {0x0000a5cc, 0x5e88442e, 0x5e88442e, 0x47801a83, 0x47801a83},
++ {0x0000a5d0, 0x628a4431, 0x628a4431, 0x4a801c84, 0x4a801c84},
++ {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
++ {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
++ {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
++ {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
++ {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+- {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+- {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+- {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+@@ -644,7 +644,7 @@ static const u32 ar9300Modes_high_ob_db_
+ {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+ {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
++ {0x0000a410, 0x000050d4, 0x000050d4, 0x000050d9, 0x000050d9},
+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+ {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
+ {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
+@@ -1086,8 +1086,8 @@ static const u32 ar9300Common_rx_gain_ta
+ {0x0000b074, 0x00000000},
+ {0x0000b078, 0x00000000},
+ {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
++ {0x0000b080, 0x23232323},
++ {0x0000b084, 0x21232323},
+ {0x0000b088, 0x19191c1e},
+ {0x0000b08c, 0x12141417},
+ {0x0000b090, 0x07070e0e},
+@@ -1385,9 +1385,9 @@ static const u32 ar9300_2p2_mac_core[][2
+ {0x000081f8, 0x00000000},
+ {0x000081fc, 0x00000000},
+ {0x00008240, 0x00100000},
+- {0x00008244, 0x0010f424},
++ {0x00008244, 0x0010f400},
+ {0x00008248, 0x00000800},
+- {0x0000824c, 0x0001e848},
++ {0x0000824c, 0x0001e800},
+ {0x00008250, 0x00000000},
+ {0x00008254, 0x00000000},
+ {0x00008258, 0x00000000},
+@@ -1726,16 +1726,30 @@ static const u32 ar9300PciePhy_pll_on_cl
+
+ static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
+ /* Addr allmodes */
+- {0x00004040, 0x08253e5e},
++ {0x00004040, 0x0825365e},
+ {0x00004040, 0x0008003b},
+ {0x00004044, 0x00000000},
+ };
+
+ static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
+ /* Addr allmodes */
+- {0x00004040, 0x08213e5e},
++ {0x00004040, 0x0821365e},
+ {0x00004040, 0x0008003b},
+ {0x00004044, 0x00000000},
+ };
+
++static const u32 ar9300_2p2_baseband_core_txfir_coeff_japan_2484[][2] = {
++ /* Addr allmodes */
++ {0x0000a398, 0x00000000},
++ {0x0000a39c, 0x6f7f0301},
++ {0x0000a3a0, 0xca9228ee},
++};
++
++static const u32 ar9300_2p2_baseband_postamble_dfs_channel[][3] = {
++ /* Addr 5G 2G */
++ {0x00009824, 0x5ac668d0, 0x5ac668d0},
++ {0x00009e0c, 0x6d4000e2, 0x6d4000e2},
++ {0x00009e14, 0x37b9625e, 0x37b9625e},
++};
++
+ #endif /* INITVALS_9003_2P2_H */
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h
+@@ -0,0 +1,64 @@
++/*
++ * Copyright (c) 2010-2011 Atheros Communications Inc.
++ * Copyright (c) 2011-2012 Qualcomm Atheros Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9565_1P1_H
++#define INITVALS_9565_1P1_H
++
++/* AR9565 1.1 */
++
++#define ar9565_1p1_mac_core ar9565_1p0_mac_core
++
++#define ar9565_1p1_mac_postamble ar9565_1p0_mac_postamble
++
++#define ar9565_1p1_baseband_core ar9565_1p0_baseband_core
++
++#define ar9565_1p1_baseband_postamble ar9565_1p0_baseband_postamble
++
++#define ar9565_1p1_radio_core ar9565_1p0_radio_core
++
++#define ar9565_1p1_soc_preamble ar9565_1p0_soc_preamble
++
++#define ar9565_1p1_soc_postamble ar9565_1p0_soc_postamble
++
++#define ar9565_1p1_Common_rx_gain_table ar9565_1p0_Common_rx_gain_table
++
++#define ar9565_1p1_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_Modes_lowest_ob_db_tx_gain_table
++
++#define ar9565_1p1_pciephy_clkreq_disable_L1 ar9565_1p0_pciephy_clkreq_disable_L1
++
++#define ar9565_1p1_modes_fast_clock ar9565_1p0_modes_fast_clock
++
++#define ar9565_1p1_common_wo_xlna_rx_gain_table ar9565_1p0_common_wo_xlna_rx_gain_table
++
++#define ar9565_1p1_modes_low_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
++
++#define ar9565_1p1_modes_high_ob_db_tx_gain_table ar9565_1p0_modes_high_ob_db_tx_gain_table
++
++#define ar9565_1p1_modes_high_power_tx_gain_table ar9565_1p0_modes_high_power_tx_gain_table
++
++#define ar9565_1p1_baseband_core_txfir_coeff_japan_2484 ar9565_1p0_baseband_core_txfir_coeff_japan_2484
++
++static const u32 ar9565_1p1_radio_postamble[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
++ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
++ {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
++ {0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
++ {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
++};
++
++#endif /* INITVALS_9565_1P1_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+@@ -20,18 +20,34 @@
+
+ /* AR9580 1.0 */
+
++#define ar9580_1p0_soc_preamble ar9300_2p2_soc_preamble
++
++#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
++
++#define ar9580_1p0_radio_core ar9300_2p2_radio_core
++
++#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
++
++#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
++
++#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
++
++#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
++
+ #define ar9580_1p0_modes_fast_clock ar9300Modes_fast_clock_2p2
+
++#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
++
+ static const u32 ar9580_1p0_radio_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
+ {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
+ {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
+- {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+ };
+
+@@ -41,12 +57,10 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x00009804, 0xfd14e000},
+ {0x00009808, 0x9c0a9f6b},
+ {0x0000980c, 0x04900000},
+- {0x00009814, 0x3280c00a},
+- {0x00009818, 0x00000000},
+ {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
++ {0x00009834, 0x6400a190},
+ {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
++ {0x0000983c, 0x14000600},
+ {0x00009880, 0x201fff00},
+ {0x00009884, 0x00001042},
+ {0x000098a4, 0x00200400},
+@@ -67,7 +81,7 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x00009d04, 0x40206c10},
+ {0x00009d08, 0x009c4060},
+ {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
++ {0x00009d10, 0x01884061},
+ {0x00009d14, 0x00c0040b},
+ {0x00009d18, 0x00000000},
+ {0x00009e08, 0x0038230c},
+@@ -198,8 +212,6 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x0000c420, 0x00000000},
+ };
+
+-#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
+-
+ static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+@@ -306,7 +318,112 @@ static const u32 ar9580_1p0_low_ob_db_tx
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_high_power_tx_gain_table ar9580_1p0_low_ob_db_tx_gain_table
++static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
++ {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
++ {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
++ {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
++ {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
++ {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
++ {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
++ {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
++ {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
++ {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
++ {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
++ {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
++ {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
++ {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
++ {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
++ {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
++ {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
++ {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
++ {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
++ {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016288, 0x05a2040a, 0x05a2040a, 0x05a20408, 0x05a20408},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
+
+ static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+@@ -414,8 +531,6 @@ static const u32 ar9580_1p0_lowest_ob_db
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+-
+ static const u32 ar9580_1p0_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+@@ -679,14 +794,6 @@ static const u32 ar9580_1p0_mixed_ob_db_
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
+-
+-#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
+-
+-#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
+-
+-#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
+-
+ static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+@@ -761,165 +868,271 @@ static const u32 ar9580_1p0_type6_tx_gai
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-static const u32 ar9580_1p0_soc_preamble[][2] = {
++static const u32 ar9580_1p0_rx_gain_table[][2] = {
+ /* Addr allmodes */
+- {0x000040a4, 0x00a0c1c9},
+- {0x00007008, 0x00000000},
+- {0x00007020, 0x00000000},
+- {0x00007034, 0x00000002},
+- {0x00007038, 0x000004c2},
+- {0x00007048, 0x00000008},
+-};
+-
+-#define ar9580_1p0_rx_gain_table ar9462_common_rx_gain_table_2p0
+-
+-static const u32 ar9580_1p0_radio_core[][2] = {
+- /* Addr allmodes */
+- {0x00016000, 0x36db6db6},
+- {0x00016004, 0x6db6db40},
+- {0x00016008, 0x73f00000},
+- {0x0001600c, 0x00000000},
+- {0x00016040, 0x7f80fff8},
+- {0x0001604c, 0x76d005b5},
+- {0x00016050, 0x556cf031},
+- {0x00016054, 0x13449440},
+- {0x00016058, 0x0c51c92c},
+- {0x0001605c, 0x3db7fffc},
+- {0x00016060, 0xfffffffc},
+- {0x00016064, 0x000f0278},
+- {0x0001606c, 0x6db60000},
+- {0x00016080, 0x00000000},
+- {0x00016084, 0x0e48048c},
+- {0x00016088, 0x54214514},
+- {0x0001608c, 0x119f481e},
+- {0x00016090, 0x24926490},
+- {0x00016098, 0xd2888888},
+- {0x000160a0, 0x0a108ffe},
+- {0x000160a4, 0x812fc370},
+- {0x000160a8, 0x423c8000},
+- {0x000160b4, 0x92480080},
+- {0x000160c0, 0x00adb6d0},
+- {0x000160c4, 0x6db6db60},
+- {0x000160c8, 0x6db6db6c},
+- {0x000160cc, 0x01e6c000},
+- {0x00016100, 0x3fffbe01},
+- {0x00016104, 0xfff80000},
+- {0x00016108, 0x00080010},
+- {0x00016144, 0x02084080},
+- {0x00016148, 0x00000000},
+- {0x00016280, 0x058a0001},
+- {0x00016284, 0x3d840208},
+- {0x00016288, 0x05a20408},
+- {0x0001628c, 0x00038c07},
+- {0x00016290, 0x00000004},
+- {0x00016294, 0x458aa14f},
+- {0x00016380, 0x00000000},
+- {0x00016384, 0x00000000},
+- {0x00016388, 0x00800700},
+- {0x0001638c, 0x00800700},
+- {0x00016390, 0x00800700},
+- {0x00016394, 0x00000000},
+- {0x00016398, 0x00000000},
+- {0x0001639c, 0x00000000},
+- {0x000163a0, 0x00000001},
+- {0x000163a4, 0x00000001},
+- {0x000163a8, 0x00000000},
+- {0x000163ac, 0x00000000},
+- {0x000163b0, 0x00000000},
+- {0x000163b4, 0x00000000},
+- {0x000163b8, 0x00000000},
+- {0x000163bc, 0x00000000},
+- {0x000163c0, 0x000000a0},
+- {0x000163c4, 0x000c0000},
+- {0x000163c8, 0x14021402},
+- {0x000163cc, 0x00001402},
+- {0x000163d0, 0x00000000},
+- {0x000163d4, 0x00000000},
+- {0x00016400, 0x36db6db6},
+- {0x00016404, 0x6db6db40},
+- {0x00016408, 0x73f00000},
+- {0x0001640c, 0x00000000},
+- {0x00016440, 0x7f80fff8},
+- {0x0001644c, 0x76d005b5},
+- {0x00016450, 0x556cf031},
+- {0x00016454, 0x13449440},
+- {0x00016458, 0x0c51c92c},
+- {0x0001645c, 0x3db7fffc},
+- {0x00016460, 0xfffffffc},
+- {0x00016464, 0x000f0278},
+- {0x0001646c, 0x6db60000},
+- {0x00016500, 0x3fffbe01},
+- {0x00016504, 0xfff80000},
+- {0x00016508, 0x00080010},
+- {0x00016544, 0x02084080},
+- {0x00016548, 0x00000000},
+- {0x00016780, 0x00000000},
+- {0x00016784, 0x00000000},
+- {0x00016788, 0x00800700},
+- {0x0001678c, 0x00800700},
+- {0x00016790, 0x00800700},
+- {0x00016794, 0x00000000},
+- {0x00016798, 0x00000000},
+- {0x0001679c, 0x00000000},
+- {0x000167a0, 0x00000001},
+- {0x000167a4, 0x00000001},
+- {0x000167a8, 0x00000000},
+- {0x000167ac, 0x00000000},
+- {0x000167b0, 0x00000000},
+- {0x000167b4, 0x00000000},
+- {0x000167b8, 0x00000000},
+- {0x000167bc, 0x00000000},
+- {0x000167c0, 0x000000a0},
+- {0x000167c4, 0x000c0000},
+- {0x000167c8, 0x14021402},
+- {0x000167cc, 0x00001402},
+- {0x000167d0, 0x00000000},
+- {0x000167d4, 0x00000000},
+- {0x00016800, 0x36db6db6},
+- {0x00016804, 0x6db6db40},
+- {0x00016808, 0x73f00000},
+- {0x0001680c, 0x00000000},
+- {0x00016840, 0x7f80fff8},
+- {0x0001684c, 0x76d005b5},
+- {0x00016850, 0x556cf031},
+- {0x00016854, 0x13449440},
+- {0x00016858, 0x0c51c92c},
+- {0x0001685c, 0x3db7fffc},
+- {0x00016860, 0xfffffffc},
+- {0x00016864, 0x000f0278},
+- {0x0001686c, 0x6db60000},
+- {0x00016900, 0x3fffbe01},
+- {0x00016904, 0xfff80000},
+- {0x00016908, 0x00080010},
+- {0x00016944, 0x02084080},
+- {0x00016948, 0x00000000},
+- {0x00016b80, 0x00000000},
+- {0x00016b84, 0x00000000},
+- {0x00016b88, 0x00800700},
+- {0x00016b8c, 0x00800700},
+- {0x00016b90, 0x00800700},
+- {0x00016b94, 0x00000000},
+- {0x00016b98, 0x00000000},
+- {0x00016b9c, 0x00000000},
+- {0x00016ba0, 0x00000001},
+- {0x00016ba4, 0x00000001},
+- {0x00016ba8, 0x00000000},
+- {0x00016bac, 0x00000000},
+- {0x00016bb0, 0x00000000},
+- {0x00016bb4, 0x00000000},
+- {0x00016bb8, 0x00000000},
+- {0x00016bbc, 0x00000000},
+- {0x00016bc0, 0x000000a0},
+- {0x00016bc4, 0x000c0000},
+- {0x00016bc8, 0x14021402},
+- {0x00016bcc, 0x00001402},
+- {0x00016bd0, 0x00000000},
+- {0x00016bd4, 0x00000000},
++ {0x0000a000, 0x00010000},
++ {0x0000a004, 0x00030002},
++ {0x0000a008, 0x00050004},
++ {0x0000a00c, 0x00810080},
++ {0x0000a010, 0x00830082},
++ {0x0000a014, 0x01810180},
++ {0x0000a018, 0x01830182},
++ {0x0000a01c, 0x01850184},
++ {0x0000a020, 0x01890188},
++ {0x0000a024, 0x018b018a},
++ {0x0000a028, 0x018d018c},
++ {0x0000a02c, 0x01910190},
++ {0x0000a030, 0x01930192},
++ {0x0000a034, 0x01950194},
++ {0x0000a038, 0x038a0196},
++ {0x0000a03c, 0x038c038b},
++ {0x0000a040, 0x0390038d},
++ {0x0000a044, 0x03920391},
++ {0x0000a048, 0x03940393},
++ {0x0000a04c, 0x03960395},
++ {0x0000a050, 0x00000000},
++ {0x0000a054, 0x00000000},
++ {0x0000a058, 0x00000000},
++ {0x0000a05c, 0x00000000},
++ {0x0000a060, 0x00000000},
++ {0x0000a064, 0x00000000},
++ {0x0000a068, 0x00000000},
++ {0x0000a06c, 0x00000000},
++ {0x0000a070, 0x00000000},
++ {0x0000a074, 0x00000000},
++ {0x0000a078, 0x00000000},
++ {0x0000a07c, 0x00000000},
++ {0x0000a080, 0x22222229},
++ {0x0000a084, 0x1d1d1d1d},
++ {0x0000a088, 0x1d1d1d1d},
++ {0x0000a08c, 0x1d1d1d1d},
++ {0x0000a090, 0x171d1d1d},
++ {0x0000a094, 0x11111717},
++ {0x0000a098, 0x00030311},
++ {0x0000a09c, 0x00000000},
++ {0x0000a0a0, 0x00000000},
++ {0x0000a0a4, 0x00000000},
++ {0x0000a0a8, 0x00000000},
++ {0x0000a0ac, 0x00000000},
++ {0x0000a0b0, 0x00000000},
++ {0x0000a0b4, 0x00000000},
++ {0x0000a0b8, 0x00000000},
++ {0x0000a0bc, 0x00000000},
++ {0x0000a0c0, 0x001f0000},
++ {0x0000a0c4, 0x01000101},
++ {0x0000a0c8, 0x011e011f},
++ {0x0000a0cc, 0x011c011d},
++ {0x0000a0d0, 0x02030204},
++ {0x0000a0d4, 0x02010202},
++ {0x0000a0d8, 0x021f0200},
++ {0x0000a0dc, 0x0302021e},
++ {0x0000a0e0, 0x03000301},
++ {0x0000a0e4, 0x031e031f},
++ {0x0000a0e8, 0x0402031d},
++ {0x0000a0ec, 0x04000401},
++ {0x0000a0f0, 0x041e041f},
++ {0x0000a0f4, 0x0502041d},
++ {0x0000a0f8, 0x05000501},
++ {0x0000a0fc, 0x051e051f},
++ {0x0000a100, 0x06010602},
++ {0x0000a104, 0x061f0600},
++ {0x0000a108, 0x061d061e},
++ {0x0000a10c, 0x07020703},
++ {0x0000a110, 0x07000701},
++ {0x0000a114, 0x00000000},
++ {0x0000a118, 0x00000000},
++ {0x0000a11c, 0x00000000},
++ {0x0000a120, 0x00000000},
++ {0x0000a124, 0x00000000},
++ {0x0000a128, 0x00000000},
++ {0x0000a12c, 0x00000000},
++ {0x0000a130, 0x00000000},
++ {0x0000a134, 0x00000000},
++ {0x0000a138, 0x00000000},
++ {0x0000a13c, 0x00000000},
++ {0x0000a140, 0x001f0000},
++ {0x0000a144, 0x01000101},
++ {0x0000a148, 0x011e011f},
++ {0x0000a14c, 0x011c011d},
++ {0x0000a150, 0x02030204},
++ {0x0000a154, 0x02010202},
++ {0x0000a158, 0x021f0200},
++ {0x0000a15c, 0x0302021e},
++ {0x0000a160, 0x03000301},
++ {0x0000a164, 0x031e031f},
++ {0x0000a168, 0x0402031d},
++ {0x0000a16c, 0x04000401},
++ {0x0000a170, 0x041e041f},
++ {0x0000a174, 0x0502041d},
++ {0x0000a178, 0x05000501},
++ {0x0000a17c, 0x051e051f},
++ {0x0000a180, 0x06010602},
++ {0x0000a184, 0x061f0600},
++ {0x0000a188, 0x061d061e},
++ {0x0000a18c, 0x07020703},
++ {0x0000a190, 0x07000701},
++ {0x0000a194, 0x00000000},
++ {0x0000a198, 0x00000000},
++ {0x0000a19c, 0x00000000},
++ {0x0000a1a0, 0x00000000},
++ {0x0000a1a4, 0x00000000},
++ {0x0000a1a8, 0x00000000},
++ {0x0000a1ac, 0x00000000},
++ {0x0000a1b0, 0x00000000},
++ {0x0000a1b4, 0x00000000},
++ {0x0000a1b8, 0x00000000},
++ {0x0000a1bc, 0x00000000},
++ {0x0000a1c0, 0x00000000},
++ {0x0000a1c4, 0x00000000},
++ {0x0000a1c8, 0x00000000},
++ {0x0000a1cc, 0x00000000},
++ {0x0000a1d0, 0x00000000},
++ {0x0000a1d4, 0x00000000},
++ {0x0000a1d8, 0x00000000},
++ {0x0000a1dc, 0x00000000},
++ {0x0000a1e0, 0x00000000},
++ {0x0000a1e4, 0x00000000},
++ {0x0000a1e8, 0x00000000},
++ {0x0000a1ec, 0x00000000},
++ {0x0000a1f0, 0x00000396},
++ {0x0000a1f4, 0x00000396},
++ {0x0000a1f8, 0x00000396},
++ {0x0000a1fc, 0x00000196},
++ {0x0000b000, 0x00010000},
++ {0x0000b004, 0x00030002},
++ {0x0000b008, 0x00050004},
++ {0x0000b00c, 0x00810080},
++ {0x0000b010, 0x00830082},
++ {0x0000b014, 0x01810180},
++ {0x0000b018, 0x01830182},
++ {0x0000b01c, 0x01850184},
++ {0x0000b020, 0x02810280},
++ {0x0000b024, 0x02830282},
++ {0x0000b028, 0x02850284},
++ {0x0000b02c, 0x02890288},
++ {0x0000b030, 0x028b028a},
++ {0x0000b034, 0x0388028c},
++ {0x0000b038, 0x038a0389},
++ {0x0000b03c, 0x038c038b},
++ {0x0000b040, 0x0390038d},
++ {0x0000b044, 0x03920391},
++ {0x0000b048, 0x03940393},
++ {0x0000b04c, 0x03960395},
++ {0x0000b050, 0x00000000},
++ {0x0000b054, 0x00000000},
++ {0x0000b058, 0x00000000},
++ {0x0000b05c, 0x00000000},
++ {0x0000b060, 0x00000000},
++ {0x0000b064, 0x00000000},
++ {0x0000b068, 0x00000000},
++ {0x0000b06c, 0x00000000},
++ {0x0000b070, 0x00000000},
++ {0x0000b074, 0x00000000},
++ {0x0000b078, 0x00000000},
++ {0x0000b07c, 0x00000000},
++ {0x0000b080, 0x23232323},
++ {0x0000b084, 0x21232323},
++ {0x0000b088, 0x19191c1e},
++ {0x0000b08c, 0x12141417},
++ {0x0000b090, 0x07070e0e},
++ {0x0000b094, 0x03030305},
++ {0x0000b098, 0x00000003},
++ {0x0000b09c, 0x00000000},
++ {0x0000b0a0, 0x00000000},
++ {0x0000b0a4, 0x00000000},
++ {0x0000b0a8, 0x00000000},
++ {0x0000b0ac, 0x00000000},
++ {0x0000b0b0, 0x00000000},
++ {0x0000b0b4, 0x00000000},
++ {0x0000b0b8, 0x00000000},
++ {0x0000b0bc, 0x00000000},
++ {0x0000b0c0, 0x003f0020},
++ {0x0000b0c4, 0x00400041},
++ {0x0000b0c8, 0x0140005f},
++ {0x0000b0cc, 0x0160015f},
++ {0x0000b0d0, 0x017e017f},
++ {0x0000b0d4, 0x02410242},
++ {0x0000b0d8, 0x025f0240},
++ {0x0000b0dc, 0x027f0260},
++ {0x0000b0e0, 0x0341027e},
++ {0x0000b0e4, 0x035f0340},
++ {0x0000b0e8, 0x037f0360},
++ {0x0000b0ec, 0x04400441},
++ {0x0000b0f0, 0x0460045f},
++ {0x0000b0f4, 0x0541047f},
++ {0x0000b0f8, 0x055f0540},
++ {0x0000b0fc, 0x057f0560},
++ {0x0000b100, 0x06400641},
++ {0x0000b104, 0x0660065f},
++ {0x0000b108, 0x067e067f},
++ {0x0000b10c, 0x07410742},
++ {0x0000b110, 0x075f0740},
++ {0x0000b114, 0x077f0760},
++ {0x0000b118, 0x07800781},
++ {0x0000b11c, 0x07a0079f},
++ {0x0000b120, 0x07c107bf},
++ {0x0000b124, 0x000007c0},
++ {0x0000b128, 0x00000000},
++ {0x0000b12c, 0x00000000},
++ {0x0000b130, 0x00000000},
++ {0x0000b134, 0x00000000},
++ {0x0000b138, 0x00000000},
++ {0x0000b13c, 0x00000000},
++ {0x0000b140, 0x003f0020},
++ {0x0000b144, 0x00400041},
++ {0x0000b148, 0x0140005f},
++ {0x0000b14c, 0x0160015f},
++ {0x0000b150, 0x017e017f},
++ {0x0000b154, 0x02410242},
++ {0x0000b158, 0x025f0240},
++ {0x0000b15c, 0x027f0260},
++ {0x0000b160, 0x0341027e},
++ {0x0000b164, 0x035f0340},
++ {0x0000b168, 0x037f0360},
++ {0x0000b16c, 0x04400441},
++ {0x0000b170, 0x0460045f},
++ {0x0000b174, 0x0541047f},
++ {0x0000b178, 0x055f0540},
++ {0x0000b17c, 0x057f0560},
++ {0x0000b180, 0x06400641},
++ {0x0000b184, 0x0660065f},
++ {0x0000b188, 0x067e067f},
++ {0x0000b18c, 0x07410742},
++ {0x0000b190, 0x075f0740},
++ {0x0000b194, 0x077f0760},
++ {0x0000b198, 0x07800781},
++ {0x0000b19c, 0x07a0079f},
++ {0x0000b1a0, 0x07c107bf},
++ {0x0000b1a4, 0x000007c0},
++ {0x0000b1a8, 0x00000000},
++ {0x0000b1ac, 0x00000000},
++ {0x0000b1b0, 0x00000000},
++ {0x0000b1b4, 0x00000000},
++ {0x0000b1b8, 0x00000000},
++ {0x0000b1bc, 0x00000000},
++ {0x0000b1c0, 0x00000000},
++ {0x0000b1c4, 0x00000000},
++ {0x0000b1c8, 0x00000000},
++ {0x0000b1cc, 0x00000000},
++ {0x0000b1d0, 0x00000000},
++ {0x0000b1d4, 0x00000000},
++ {0x0000b1d8, 0x00000000},
++ {0x0000b1dc, 0x00000000},
++ {0x0000b1e0, 0x00000000},
++ {0x0000b1e4, 0x00000000},
++ {0x0000b1e8, 0x00000000},
++ {0x0000b1ec, 0x00000000},
++ {0x0000b1f0, 0x00000396},
++ {0x0000b1f4, 0x00000396},
++ {0x0000b1f8, 0x00000396},
++ {0x0000b1fc, 0x00000196},
+ };
+
+ static const u32 ar9580_1p0_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
++ {0x00009814, 0x3280c00a, 0x3280c00a, 0x3280c00a, 0x3280c00a},
++ {0x00009818, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
+ {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+ {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
+@@ -956,7 +1169,7 @@ static const u32 ar9580_1p0_baseband_pos
+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++ {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+@@ -994,4 +1207,13 @@ static const u32 ar9580_1p0_pcie_phy_pll
+ {0x00004044, 0x00000000},
+ };
+
++static const u32 ar9580_1p0_baseband_postamble_dfs_channel[][3] = {
++ /* Addr 5G 2G */
++ {0x00009814, 0x3400c00f, 0x3400c00f},
++ {0x00009824, 0x5ac668d0, 0x5ac668d0},
++ {0x00009828, 0x06903080, 0x06903080},
++ {0x00009e0c, 0x6d4000e2, 0x6d4000e2},
++ {0x00009e14, 0x37b9625e, 0x37b9625e},
++};
++
+ #endif /* INITVALS_9580_1P0_H */
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -809,6 +809,8 @@
+ #define AR_SREV_REVISION_9462_21 3
+ #define AR_SREV_VERSION_9565 0x2C0
+ #define AR_SREV_REVISION_9565_10 0
++#define AR_SREV_REVISION_9565_101 1
++#define AR_SREV_REVISION_9565_11 2
+ #define AR_SREV_VERSION_9550 0x400
+
+ #define AR_SREV_5416(_ah) \
+@@ -881,9 +883,6 @@
+
+ #define AR_SREV_9330(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
+-#define AR_SREV_9330_10(_ah) \
+- (AR_SREV_9330((_ah)) && \
+- ((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_10))
+ #define AR_SREV_9330_11(_ah) \
+ (AR_SREV_9330((_ah)) && \
+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_11))
+@@ -927,10 +926,18 @@
+
+ #define AR_SREV_9565(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
+-
+ #define AR_SREV_9565_10(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10))
++#define AR_SREV_9565_101(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101))
++#define AR_SREV_9565_11(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11))
++#define AR_SREV_9565_11_OR_LATER(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11))
+
+ #define AR_SREV_9550(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9550))
+--- a/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h
+@@ -18,6 +18,10 @@
+ #ifndef INITVALS_9330_1P1_H
+ #define INITVALS_9330_1P1_H
+
++#define ar9331_1p1_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
++
++#define ar9331_modes_high_power_tx_gain_1p1 ar9331_modes_lowest_ob_db_tx_gain_1p1
++
+ static const u32 ar9331_1p1_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
+@@ -55,7 +59,7 @@ static const u32 ar9331_1p1_baseband_pos
+ {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
++ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00058d18, 0x00058d18},
+ {0x0000a2d0, 0x00071982, 0x00071982, 0x00071982, 0x00071982},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+@@ -252,7 +256,7 @@ static const u32 ar9331_modes_low_ob_db_
+ {0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},
+ {0x0000a2e4, 0xfffff000, 0xfffff000, 0xfffff000, 0xfffff000},
+ {0x0000a2e8, 0xfffe0000, 0xfffe0000, 0xfffe0000, 0xfffe0000},
+- {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d0, 0x000050d0},
++ {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d4, 0x000050d4},
+ {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+ {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+@@ -337,8 +341,6 @@ static const u32 ar9331_modes_low_ob_db_
+ {0x00016284, 0x14d3f000, 0x14d3f000, 0x14d3f000, 0x14d3f000},
+ };
+
+-#define ar9331_1p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+-
+ static const u32 ar9331_1p1_xtal_25M[][2] = {
+ /* Addr allmodes */
+ {0x00007038, 0x000002f8},
+@@ -373,17 +375,17 @@ static const u32 ar9331_1p1_radio_core[]
+ {0x000160b4, 0x92480040},
+ {0x000160c0, 0x006db6db},
+ {0x000160c4, 0x0186db60},
+- {0x000160c8, 0x6db4db6c},
++ {0x000160c8, 0x6db6db6c},
+ {0x000160cc, 0x6de6c300},
+ {0x000160d0, 0x14500820},
+ {0x00016100, 0x04cb0001},
+ {0x00016104, 0xfff80015},
+ {0x00016108, 0x00080010},
+ {0x0001610c, 0x00170000},
+- {0x00016140, 0x10800000},
++ {0x00016140, 0x50804000},
+ {0x00016144, 0x01884080},
+ {0x00016148, 0x000080c0},
+- {0x00016280, 0x01000015},
++ {0x00016280, 0x01001015},
+ {0x00016284, 0x14d20000},
+ {0x00016288, 0x00318000},
+ {0x0001628c, 0x50000000},
+@@ -622,12 +624,12 @@ static const u32 ar9331_1p1_baseband_cor
+ {0x0000a370, 0x00000000},
+ {0x0000a390, 0x00000001},
+ {0x0000a394, 0x00000444},
+- {0x0000a398, 0x001f0e0f},
+- {0x0000a39c, 0x0075393f},
+- {0x0000a3a0, 0xb79f6427},
+- {0x0000a3a4, 0x00000000},
+- {0x0000a3a8, 0xaaaaaaaa},
+- {0x0000a3ac, 0x3c466478},
++ {0x0000a398, 0x00000000},
++ {0x0000a39c, 0x210d0401},
++ {0x0000a3a0, 0xab9a7144},
++ {0x0000a3a4, 0x00000011},
++ {0x0000a3a8, 0x3c3c003d},
++ {0x0000a3ac, 0x30310030},
+ {0x0000a3c0, 0x20202020},
+ {0x0000a3c4, 0x22222220},
+ {0x0000a3c8, 0x20200020},
+@@ -686,100 +688,18 @@ static const u32 ar9331_1p1_baseband_cor
+ {0x0000a7dc, 0x00000001},
+ };
+
+-static const u32 ar9331_modes_high_power_tx_gain_1p1[][5] = {
++static const u32 ar9331_1p1_mac_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},
+- {0x0000a2dc, 0xffff2a52, 0xffff2a52, 0xffff2a52, 0xffff2a52},
+- {0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},
+- {0x0000a2e4, 0xfffff000, 0xfffff000, 0xfffff000, 0xfffff000},
+- {0x0000a2e8, 0xfffe0000, 0xfffe0000, 0xfffe0000, 0xfffe0000},
+- {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d0, 0x000050d0},
+- {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+- {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+- {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+- {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+- {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+- {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+- {0x0000a520, 0x2f001f04, 0x2f001f04, 0x23000a00, 0x23000a00},
+- {0x0000a524, 0x35001fc4, 0x35001fc4, 0x27000a02, 0x27000a02},
+- {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2b000a04, 0x2b000a04},
+- {0x0000a52c, 0x41023e85, 0x41023e85, 0x2d000a20, 0x2d000a20},
+- {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000a22, 0x31000a22},
+- {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000a24, 0x35000a24},
+- {0x0000a538, 0x53023f4b, 0x53023f4b, 0x38000a43, 0x38000a43},
+- {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x3b000e42, 0x3b000e42},
+- {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x3f000e44, 0x3f000e44},
+- {0x0000a544, 0x6502feca, 0x6502feca, 0x42000e64, 0x42000e64},
+- {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x46000e66, 0x46000e66},
+- {0x0000a54c, 0x7203feca, 0x7203feca, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
+- {0x0000a580, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+- {0x0000a584, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+- {0x0000a588, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+- {0x0000a58c, 0x11062202, 0x11062202, 0x0b000200, 0x0b000200},
+- {0x0000a590, 0x17022e00, 0x17022e00, 0x0f000202, 0x0f000202},
+- {0x0000a594, 0x1d000ec2, 0x1d000ec2, 0x11000400, 0x11000400},
+- {0x0000a598, 0x25020ec0, 0x25020ec0, 0x15000402, 0x15000402},
+- {0x0000a59c, 0x2b020ec3, 0x2b020ec3, 0x19000404, 0x19000404},
+- {0x0000a5a0, 0x2f001f04, 0x2f001f04, 0x1b000603, 0x1b000603},
+- {0x0000a5a4, 0x35001fc4, 0x35001fc4, 0x1f000a02, 0x1f000a02},
+- {0x0000a5a8, 0x3c022f04, 0x3c022f04, 0x23000a04, 0x23000a04},
+- {0x0000a5ac, 0x41023e85, 0x41023e85, 0x26000a20, 0x26000a20},
+- {0x0000a5b0, 0x48023ec6, 0x48023ec6, 0x2a000e20, 0x2a000e20},
+- {0x0000a5b4, 0x4d023f01, 0x4d023f01, 0x2e000e22, 0x2e000e22},
+- {0x0000a5b8, 0x53023f4b, 0x53023f4b, 0x31000e24, 0x31000e24},
+- {0x0000a5bc, 0x5a027f09, 0x5a027f09, 0x34001640, 0x34001640},
+- {0x0000a5c0, 0x5f027fc9, 0x5f027fc9, 0x38001660, 0x38001660},
+- {0x0000a5c4, 0x6502feca, 0x6502feca, 0x3b001861, 0x3b001861},
+- {0x0000a5c8, 0x6b02ff4a, 0x6b02ff4a, 0x3e001a81, 0x3e001a81},
+- {0x0000a5cc, 0x7203feca, 0x7203feca, 0x42001a83, 0x42001a83},
+- {0x0000a5d0, 0x7703ff0b, 0x7703ff0b, 0x44001c84, 0x44001c84},
+- {0x0000a5d4, 0x7d06ffcb, 0x7d06ffcb, 0x48001ce3, 0x48001ce3},
+- {0x0000a5d8, 0x8407ff0b, 0x8407ff0b, 0x4c001ce5, 0x4c001ce5},
+- {0x0000a5dc, 0x8907ffcb, 0x8907ffcb, 0x50001ce9, 0x50001ce9},
+- {0x0000a5e0, 0x900fff0b, 0x900fff0b, 0x54001ceb, 0x54001ceb},
+- {0x0000a5e4, 0x960fffcb, 0x960fffcb, 0x56001eec, 0x56001eec},
+- {0x0000a5e8, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a5ec, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a5f0, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a5f4, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a5f8, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a5fc, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x02008802, 0x02008802, 0x02008802, 0x02008802},
+- {0x0000a620, 0x0280c802, 0x0280c802, 0x0280c802, 0x0280c802},
+- {0x0000a624, 0x03010a03, 0x03010a03, 0x03010a03, 0x03010a03},
+- {0x0000a628, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x0000a62c, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x0000a630, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x0000a634, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x0000a638, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x0000a63c, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
+- {0x00016044, 0x034922db, 0x034922db, 0x034922db, 0x034922db},
+- {0x00016284, 0x14d3f000, 0x14d3f000, 0x14d3f000, 0x14d3f000},
++ {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
++ {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
++ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
++ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
++ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
++ {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
++ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
++ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+ };
+
+-#define ar9331_1p1_mac_postamble ar9300_2p2_mac_postamble
+-
+ static const u32 ar9331_1p1_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x00007020, 0x00000000},
+--- a/drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h
+@@ -18,6 +18,28 @@
+ #ifndef INITVALS_9330_1P2_H
+ #define INITVALS_9330_1P2_H
+
++#define ar9331_modes_high_power_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
++
++#define ar9331_modes_low_ob_db_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
++
++#define ar9331_modes_lowest_ob_db_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
++
++#define ar9331_1p2_baseband_core_txfir_coeff_japan_2484 ar9331_1p1_baseband_core_txfir_coeff_japan_2484
++
++#define ar9331_1p2_xtal_25M ar9331_1p1_xtal_25M
++
++#define ar9331_1p2_xtal_40M ar9331_1p1_xtal_40M
++
++#define ar9331_1p2_soc_postamble ar9331_1p1_soc_postamble
++
++#define ar9331_1p2_mac_postamble ar9331_1p1_mac_postamble
++
++#define ar9331_1p2_soc_preamble ar9331_1p1_soc_preamble
++
++#define ar9331_1p2_mac_core ar9331_1p1_mac_core
++
++#define ar9331_common_wo_xlna_rx_gain_1p2 ar9331_common_wo_xlna_rx_gain_1p1
++
+ static const u32 ar9331_modes_high_ob_db_tx_gain_1p2[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d7, 0x000050d7},
+@@ -103,57 +125,6 @@ static const u32 ar9331_modes_high_ob_db
+ {0x0000a63c, 0x04011004, 0x04011004, 0x04011004, 0x04011004},
+ };
+
+-#define ar9331_modes_high_power_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
+-
+-#define ar9331_modes_low_ob_db_tx_gain_1p2 ar9331_modes_high_power_tx_gain_1p2
+-
+-#define ar9331_modes_lowest_ob_db_tx_gain_1p2 ar9331_modes_low_ob_db_tx_gain_1p2
+-
+-static const u32 ar9331_1p2_baseband_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
+- {0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
+- {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+- {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
+- {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
+- {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
+- {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
+- {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a4, 0x037216a4},
+- {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
+- {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
+- {0x00009e10, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e},
+- {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
+- {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
+- {0x00009e2c, 0x0000001c, 0x0000001c, 0x00003221, 0x00003221},
+- {0x00009e3c, 0xcf946222, 0xcf946222, 0xcf946222, 0xcf946222},
+- {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
+- {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
+- {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
+- {0x0000a204, 0x00003fc0, 0x00003fc4, 0x00003fc4, 0x00003fc0},
+- {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+- {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
+- {0x0000a234, 0x00000fff, 0x00000fff, 0x10000fff, 0x00000fff},
+- {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
+- {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
+- {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
+- {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
+- {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
+- {0x0000a260, 0x3a021501, 0x3a021501, 0x3a021501, 0x3a021501},
+- {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+- {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
+- {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+- {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071981},
+- {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
+- {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000ae04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
+- {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-};
+-
+ static const u32 ar9331_1p2_radio_core[][2] = {
+ /* Addr allmodes */
+ {0x00016000, 0x36db6db6},
+@@ -219,24 +190,318 @@ static const u32 ar9331_1p2_radio_core[]
+ {0x000163d4, 0x00000000},
+ };
+
+-#define ar9331_1p2_baseband_core_txfir_coeff_japan_2484 ar9331_1p1_baseband_core_txfir_coeff_japan_2484
+-
+-#define ar9331_1p2_xtal_25M ar9331_1p1_xtal_25M
+-
+-#define ar9331_1p2_xtal_40M ar9331_1p1_xtal_40M
+-
+-#define ar9331_1p2_baseband_core ar9331_1p1_baseband_core
+-
+-#define ar9331_1p2_soc_postamble ar9331_1p1_soc_postamble
+-
+-#define ar9331_1p2_mac_postamble ar9331_1p1_mac_postamble
+-
+-#define ar9331_1p2_soc_preamble ar9331_1p1_soc_preamble
+-
+-#define ar9331_1p2_mac_core ar9331_1p1_mac_core
++static const u32 ar9331_1p2_baseband_core[][2] = {
++ /* Addr allmodes */
++ {0x00009800, 0xafe68e30},
++ {0x00009804, 0xfd14e000},
++ {0x00009808, 0x9c0a8f6b},
++ {0x0000980c, 0x04800000},
++ {0x00009814, 0x9280c00a},
++ {0x00009818, 0x00000000},
++ {0x0000981c, 0x00020028},
++ {0x00009834, 0x5f3ca3de},
++ {0x00009838, 0x0108ecff},
++ {0x0000983c, 0x14750600},
++ {0x00009880, 0x201fff00},
++ {0x00009884, 0x00001042},
++ {0x000098a4, 0x00200400},
++ {0x000098b0, 0x32840bbe},
++ {0x000098d0, 0x004b6a8e},
++ {0x000098d4, 0x00000820},
++ {0x000098dc, 0x00000000},
++ {0x000098f0, 0x00000000},
++ {0x000098f4, 0x00000000},
++ {0x00009c04, 0x00000000},
++ {0x00009c08, 0x03200000},
++ {0x00009c0c, 0x00000000},
++ {0x00009c10, 0x00000000},
++ {0x00009c14, 0x00046384},
++ {0x00009c18, 0x05b6b440},
++ {0x00009c1c, 0x00b6b440},
++ {0x00009d00, 0xc080a333},
++ {0x00009d04, 0x40206c10},
++ {0x00009d08, 0x009c4060},
++ {0x00009d0c, 0x1883800a},
++ {0x00009d10, 0x01834061},
++ {0x00009d14, 0x00c00400},
++ {0x00009d18, 0x00000000},
++ {0x00009e08, 0x0038233c},
++ {0x00009e24, 0x9927b515},
++ {0x00009e28, 0x12ef0200},
++ {0x00009e30, 0x06336f77},
++ {0x00009e34, 0x6af6532f},
++ {0x00009e38, 0x0cc80c00},
++ {0x00009e40, 0x0d261820},
++ {0x00009e4c, 0x00001004},
++ {0x00009e50, 0x00ff03f1},
++ {0x00009fc0, 0x803e4788},
++ {0x00009fc4, 0x0001efb5},
++ {0x00009fcc, 0x40000014},
++ {0x0000a20c, 0x00000000},
++ {0x0000a220, 0x00000000},
++ {0x0000a224, 0x00000000},
++ {0x0000a228, 0x10002310},
++ {0x0000a23c, 0x00000000},
++ {0x0000a244, 0x0c000000},
++ {0x0000a2a0, 0x00000001},
++ {0x0000a2c0, 0x00000001},
++ {0x0000a2c8, 0x00000000},
++ {0x0000a2cc, 0x18c43433},
++ {0x0000a2d4, 0x00000000},
++ {0x0000a2dc, 0x00000000},
++ {0x0000a2e0, 0x00000000},
++ {0x0000a2e4, 0x00000000},
++ {0x0000a2e8, 0x00000000},
++ {0x0000a2ec, 0x00000000},
++ {0x0000a2f0, 0x00000000},
++ {0x0000a2f4, 0x00000000},
++ {0x0000a2f8, 0x00000000},
++ {0x0000a344, 0x00000000},
++ {0x0000a34c, 0x00000000},
++ {0x0000a350, 0x0000a000},
++ {0x0000a364, 0x00000000},
++ {0x0000a370, 0x00000000},
++ {0x0000a390, 0x00000001},
++ {0x0000a394, 0x00000444},
++ {0x0000a398, 0x001f0e0f},
++ {0x0000a39c, 0x0075393f},
++ {0x0000a3a0, 0xb79f6427},
++ {0x0000a3a4, 0x00000000},
++ {0x0000a3a8, 0xaaaaaaaa},
++ {0x0000a3ac, 0x3c466478},
++ {0x0000a3c0, 0x20202020},
++ {0x0000a3c4, 0x22222220},
++ {0x0000a3c8, 0x20200020},
++ {0x0000a3cc, 0x20202020},
++ {0x0000a3d0, 0x20202020},
++ {0x0000a3d4, 0x20202020},
++ {0x0000a3d8, 0x20202020},
++ {0x0000a3dc, 0x20202020},
++ {0x0000a3e0, 0x20202020},
++ {0x0000a3e4, 0x20202020},
++ {0x0000a3e8, 0x20202020},
++ {0x0000a3ec, 0x20202020},
++ {0x0000a3f0, 0x00000000},
++ {0x0000a3f4, 0x00000006},
++ {0x0000a3f8, 0x0cdbd380},
++ {0x0000a3fc, 0x000f0f01},
++ {0x0000a400, 0x8fa91f01},
++ {0x0000a404, 0x00000000},
++ {0x0000a408, 0x0e79e5c6},
++ {0x0000a40c, 0x00820820},
++ {0x0000a414, 0x1ce739ce},
++ {0x0000a418, 0x2d001dce},
++ {0x0000a41c, 0x1ce739ce},
++ {0x0000a420, 0x000001ce},
++ {0x0000a424, 0x1ce739ce},
++ {0x0000a428, 0x000001ce},
++ {0x0000a42c, 0x1ce739ce},
++ {0x0000a430, 0x1ce739ce},
++ {0x0000a434, 0x00000000},
++ {0x0000a438, 0x00001801},
++ {0x0000a43c, 0x00000000},
++ {0x0000a440, 0x00000000},
++ {0x0000a444, 0x00000000},
++ {0x0000a448, 0x04000000},
++ {0x0000a44c, 0x00000001},
++ {0x0000a450, 0x00010000},
++ {0x0000a458, 0x00000000},
++ {0x0000a640, 0x00000000},
++ {0x0000a644, 0x3fad9d74},
++ {0x0000a648, 0x0048060a},
++ {0x0000a64c, 0x00003c37},
++ {0x0000a670, 0x03020100},
++ {0x0000a674, 0x09080504},
++ {0x0000a678, 0x0d0c0b0a},
++ {0x0000a67c, 0x13121110},
++ {0x0000a680, 0x31301514},
++ {0x0000a684, 0x35343332},
++ {0x0000a688, 0x00000036},
++ {0x0000a690, 0x00000838},
++ {0x0000a7c0, 0x00000000},
++ {0x0000a7c4, 0xfffffffc},
++ {0x0000a7c8, 0x00000000},
++ {0x0000a7cc, 0x00000000},
++ {0x0000a7d0, 0x00000000},
++ {0x0000a7d4, 0x00000004},
++ {0x0000a7dc, 0x00000001},
++};
+
+-#define ar9331_common_wo_xlna_rx_gain_1p2 ar9331_common_wo_xlna_rx_gain_1p1
++static const u32 ar9331_1p2_baseband_postamble[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
++ {0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
++ {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
++ {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
++ {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
++ {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
++ {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
++ {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a4, 0x037216a4},
++ {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
++ {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
++ {0x00009e10, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e},
++ {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
++ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
++ {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
++ {0x00009e2c, 0x0000001c, 0x0000001c, 0x00003221, 0x00003221},
++ {0x00009e3c, 0xcf946222, 0xcf946222, 0xcf946222, 0xcf946222},
++ {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
++ {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
++ {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
++ {0x0000a204, 0x00003fc0, 0x00003fc4, 0x00003fc4, 0x00003fc0},
++ {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
++ {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
++ {0x0000a234, 0x00000fff, 0x00000fff, 0x10000fff, 0x00000fff},
++ {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
++ {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
++ {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
++ {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
++ {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
++ {0x0000a260, 0x3a021501, 0x3a021501, 0x3a021501, 0x3a021501},
++ {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++ {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
++ {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
++ {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071981},
++ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
++ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000ae04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
++ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++};
+
+-#define ar9331_common_rx_gain_1p2 ar9485_common_rx_gain_1_1
++static const u32 ar9331_common_rx_gain_1p2[][2] = {
++ /* Addr allmodes */
++ {0x0000a000, 0x00010000},
++ {0x0000a004, 0x00030002},
++ {0x0000a008, 0x00050004},
++ {0x0000a00c, 0x00810080},
++ {0x0000a010, 0x01800082},
++ {0x0000a014, 0x01820181},
++ {0x0000a018, 0x01840183},
++ {0x0000a01c, 0x01880185},
++ {0x0000a020, 0x018a0189},
++ {0x0000a024, 0x02850284},
++ {0x0000a028, 0x02890288},
++ {0x0000a02c, 0x03850384},
++ {0x0000a030, 0x03890388},
++ {0x0000a034, 0x038b038a},
++ {0x0000a038, 0x038d038c},
++ {0x0000a03c, 0x03910390},
++ {0x0000a040, 0x03930392},
++ {0x0000a044, 0x03950394},
++ {0x0000a048, 0x00000396},
++ {0x0000a04c, 0x00000000},
++ {0x0000a050, 0x00000000},
++ {0x0000a054, 0x00000000},
++ {0x0000a058, 0x00000000},
++ {0x0000a05c, 0x00000000},
++ {0x0000a060, 0x00000000},
++ {0x0000a064, 0x00000000},
++ {0x0000a068, 0x00000000},
++ {0x0000a06c, 0x00000000},
++ {0x0000a070, 0x00000000},
++ {0x0000a074, 0x00000000},
++ {0x0000a078, 0x00000000},
++ {0x0000a07c, 0x00000000},
++ {0x0000a080, 0x28282828},
++ {0x0000a084, 0x28282828},
++ {0x0000a088, 0x28282828},
++ {0x0000a08c, 0x28282828},
++ {0x0000a090, 0x28282828},
++ {0x0000a094, 0x21212128},
++ {0x0000a098, 0x171c1c1c},
++ {0x0000a09c, 0x02020212},
++ {0x0000a0a0, 0x00000202},
++ {0x0000a0a4, 0x00000000},
++ {0x0000a0a8, 0x00000000},
++ {0x0000a0ac, 0x00000000},
++ {0x0000a0b0, 0x00000000},
++ {0x0000a0b4, 0x00000000},
++ {0x0000a0b8, 0x00000000},
++ {0x0000a0bc, 0x00000000},
++ {0x0000a0c0, 0x001f0000},
++ {0x0000a0c4, 0x111f1100},
++ {0x0000a0c8, 0x111d111e},
++ {0x0000a0cc, 0x111b111c},
++ {0x0000a0d0, 0x22032204},
++ {0x0000a0d4, 0x22012202},
++ {0x0000a0d8, 0x221f2200},
++ {0x0000a0dc, 0x221d221e},
++ {0x0000a0e0, 0x33013302},
++ {0x0000a0e4, 0x331f3300},
++ {0x0000a0e8, 0x4402331e},
++ {0x0000a0ec, 0x44004401},
++ {0x0000a0f0, 0x441e441f},
++ {0x0000a0f4, 0x55015502},
++ {0x0000a0f8, 0x551f5500},
++ {0x0000a0fc, 0x6602551e},
++ {0x0000a100, 0x66006601},
++ {0x0000a104, 0x661e661f},
++ {0x0000a108, 0x7703661d},
++ {0x0000a10c, 0x77017702},
++ {0x0000a110, 0x00007700},
++ {0x0000a114, 0x00000000},
++ {0x0000a118, 0x00000000},
++ {0x0000a11c, 0x00000000},
++ {0x0000a120, 0x00000000},
++ {0x0000a124, 0x00000000},
++ {0x0000a128, 0x00000000},
++ {0x0000a12c, 0x00000000},
++ {0x0000a130, 0x00000000},
++ {0x0000a134, 0x00000000},
++ {0x0000a138, 0x00000000},
++ {0x0000a13c, 0x00000000},
++ {0x0000a140, 0x001f0000},
++ {0x0000a144, 0x111f1100},
++ {0x0000a148, 0x111d111e},
++ {0x0000a14c, 0x111b111c},
++ {0x0000a150, 0x22032204},
++ {0x0000a154, 0x22012202},
++ {0x0000a158, 0x221f2200},
++ {0x0000a15c, 0x221d221e},
++ {0x0000a160, 0x33013302},
++ {0x0000a164, 0x331f3300},
++ {0x0000a168, 0x4402331e},
++ {0x0000a16c, 0x44004401},
++ {0x0000a170, 0x441e441f},
++ {0x0000a174, 0x55015502},
++ {0x0000a178, 0x551f5500},
++ {0x0000a17c, 0x6602551e},
++ {0x0000a180, 0x66006601},
++ {0x0000a184, 0x661e661f},
++ {0x0000a188, 0x7703661d},
++ {0x0000a18c, 0x77017702},
++ {0x0000a190, 0x00007700},
++ {0x0000a194, 0x00000000},
++ {0x0000a198, 0x00000000},
++ {0x0000a19c, 0x00000000},
++ {0x0000a1a0, 0x00000000},
++ {0x0000a1a4, 0x00000000},
++ {0x0000a1a8, 0x00000000},
++ {0x0000a1ac, 0x00000000},
++ {0x0000a1b0, 0x00000000},
++ {0x0000a1b4, 0x00000000},
++ {0x0000a1b8, 0x00000000},
++ {0x0000a1bc, 0x00000000},
++ {0x0000a1c0, 0x00000000},
++ {0x0000a1c4, 0x00000000},
++ {0x0000a1c8, 0x00000000},
++ {0x0000a1cc, 0x00000000},
++ {0x0000a1d0, 0x00000000},
++ {0x0000a1d4, 0x00000000},
++ {0x0000a1d8, 0x00000000},
++ {0x0000a1dc, 0x00000000},
++ {0x0000a1e0, 0x00000000},
++ {0x0000a1e4, 0x00000000},
++ {0x0000a1e8, 0x00000000},
++ {0x0000a1ec, 0x00000000},
++ {0x0000a1f0, 0x00000396},
++ {0x0000a1f4, 0x00000396},
++ {0x0000a1f8, 0x00000396},
++ {0x0000a1fc, 0x00000296},
++};
+
+ #endif /* INITVALS_9330_1P2_H */
+--- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
+@@ -20,6 +20,14 @@
+
+ /* AR955X 1.0 */
+
++#define ar955x_1p0_soc_postamble ar9300_2p2_soc_postamble
++
++#define ar955x_1p0_common_rx_gain_table ar9300Common_rx_gain_table_2p2
++
++#define ar955x_1p0_common_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
++
++#define ar955x_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
++
+ static const u32 ar955x_1p0_radio_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
+@@ -37,13 +45,6 @@ static const u32 ar955x_1p0_radio_postam
+ {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
+ };
+
+-static const u32 ar955x_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+- /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
+-};
+-
+ static const u32 ar955x_1p0_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
+@@ -473,266 +474,6 @@ static const u32 ar955x_1p0_mac_core[][2
+ {0x000083d0, 0x8c7901ff},
+ };
+
+-static const u32 ar955x_1p0_common_rx_gain_table[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x01910190},
+- {0x0000a030, 0x01930192},
+- {0x0000a034, 0x01950194},
+- {0x0000a038, 0x038a0196},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x22222229},
+- {0x0000a084, 0x1d1d1d1d},
+- {0x0000a088, 0x1d1d1d1d},
+- {0x0000a08c, 0x1d1d1d1d},
+- {0x0000a090, 0x171d1d1d},
+- {0x0000a094, 0x11111717},
+- {0x0000a098, 0x00030311},
+- {0x0000a09c, 0x00000000},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x23232323},
+- {0x0000b084, 0x21232323},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+ static const u32 ar955x_1p0_baseband_core[][2] = {
+ /* Addr allmodes */
+ {0x00009800, 0xafe68e30},
+@@ -891,266 +632,6 @@ static const u32 ar955x_1p0_baseband_cor
+ {0x0000c420, 0x00000000},
+ };
+
+-static const u32 ar955x_1p0_common_wo_xlna_rx_gain_table[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x32323232},
+- {0x0000b084, 0x2f2f3232},
+- {0x0000b088, 0x23282a2d},
+- {0x0000b08c, 0x1c1e2123},
+- {0x0000b090, 0x14171919},
+- {0x0000b094, 0x0e0e1214},
+- {0x0000b098, 0x03050707},
+- {0x0000b09c, 0x00030303},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+ static const u32 ar955x_1p0_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x00007000, 0x00000000},
+@@ -1263,11 +744,6 @@ static const u32 ar955x_1p0_modes_no_xpa
+ {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
+ };
+
+-static const u32 ar955x_1p0_soc_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023},
+-};
+-
+ static const u32 ar955x_1p0_modes_fast_clock[][3] = {
+ /* Addr 5G_HT20 5G_HT40 */
+ {0x00001030, 0x00000268, 0x000004d0},
+--- a/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
+@@ -20,6 +20,12 @@
+
+ /* AR9565 1.0 */
+
++#define ar9565_1p0_mac_postamble ar9331_1p1_mac_postamble
++
++#define ar9565_1p0_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
++
++#define ar9565_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
++
+ static const u32 ar9565_1p0_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+@@ -182,18 +188,6 @@ static const u32 ar9565_1p0_mac_core[][2
+ {0x000083d0, 0x800301ff},
+ };
+
+-static const u32 ar9565_1p0_mac_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+ static const u32 ar9565_1p0_baseband_core[][2] = {
+ /* Addr allmodes */
+ {0x00009800, 0xafe68e30},
+@@ -711,66 +705,6 @@ static const u32 ar9565_1p0_Common_rx_ga
+ {0x0000b1fc, 0x00000196},
+ };
+
+-static const u32 ar9565_1p0_Modes_lowest_ob_db_tx_gain_table[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x0000a2dc, 0xfc0a9380, 0xfc0a9380, 0xfdab5b52, 0xfdab5b52},
+- {0x0000a2e0, 0xffecec00, 0xffecec00, 0xfd339c84, 0xfd339c84},
+- {0x0000a2e4, 0xfc0f0000, 0xfc0f0000, 0xfec3e000, 0xfec3e000},
+- {0x0000a2e8, 0xfc100000, 0xfc100000, 0xfffc0000, 0xfffc0000},
+- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a618, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a61c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a620, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a624, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a628, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a62c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a630, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a634, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a638, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a63c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016048, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-};
+-
+ static const u32 ar9565_1p0_pciephy_clkreq_disable_L1[][2] = {
+ /* Addr allmodes */
+ {0x00018c00, 0x18212ede},
+@@ -1231,11 +1165,4 @@ static const u32 ar9565_1p0_modes_high_p
+ {0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ };
+
+-static const u32 ar9565_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+- /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
+-};
+-
+ #endif /* INITVALS_9565_1P0_H */
+--- a/include/linux/ath9k_platform.h
++++ b/include/linux/ath9k_platform.h
+@@ -32,6 +32,8 @@ struct ath9k_platform_data {
+ u32 gpio_val;
+
+ bool is_clk_25mhz;
++ bool tx_gain_buffalo;
++
+ int (*get_mac_revision)(void);
+ int (*external_reset)(void);
+ };
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9003_buffalo_initvals.h
+@@ -0,0 +1,126 @@
++/*
++ * Copyright (c) 2013 Qualcomm Atheros Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9003_BUFFALO_H
++#define INITVALS_9003_BUFFALO_H
++
++static const u32 ar9300Modes_high_power_tx_gain_table_buffalo[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
++ {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
++ {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
++ {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
++ {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
++ {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
++ {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
++ {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
++ {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
++ {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
++ {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
++ {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
++ {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
++ {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
++ {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
++ {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
++ {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
++ {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
++ {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
++ {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
++ {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
++ {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
++ {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
++ {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
++ {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
++ {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
++ {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
++ {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
++ {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
++ {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
++ {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
++ {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
++ {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
++ {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
++ {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
++ {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
++ {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
++ {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
++ {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
++ {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
++ {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
++ {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
++ {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
++ {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
++ {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
++ {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
++ {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
++ {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++ {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++ {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++ {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
++
++#endif /* INITVALS_9003_BUFFALO_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
+@@ -29,7 +29,8 @@ static void ar9002_hw_set_desc_link(void
+ ((struct ath_desc*) ds)->ds_link = ds_link;
+ }
--#define ATH_RXBUF_RESET(_bf) do { \
-- (_bf)->bf_stale = false; \
-- } while (0)
+-static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
++static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked,
++ u32 *sync_cause_p)
+ {
+ u32 isr = 0;
+ u32 mask2 = 0;
+@@ -76,9 +77,16 @@ static bool ar9002_hw_get_isr(struct ath
+ mask2 |= ATH9K_INT_CST;
+ if (isr2 & AR_ISR_S2_TSFOOR)
+ mask2 |= ATH9K_INT_TSFOOR;
++
++ if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
++ REG_WRITE(ah, AR_ISR_S2, isr2);
++ isr &= ~AR_ISR_BCNMISC;
++ }
+ }
+
+- isr = REG_READ(ah, AR_ISR_RAC);
++ if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)
++ isr = REG_READ(ah, AR_ISR_RAC);
++
+ if (isr == 0xffffffff) {
+ *masked = 0;
+ return false;
+@@ -97,11 +105,23 @@ static bool ar9002_hw_get_isr(struct ath
+
+ *masked |= ATH9K_INT_TX;
+
+- s0_s = REG_READ(ah, AR_ISR_S0_S);
++ if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) {
++ s0_s = REG_READ(ah, AR_ISR_S0_S);
++ s1_s = REG_READ(ah, AR_ISR_S1_S);
++ } else {
++ s0_s = REG_READ(ah, AR_ISR_S0);
++ REG_WRITE(ah, AR_ISR_S0, s0_s);
++ s1_s = REG_READ(ah, AR_ISR_S1);
++ REG_WRITE(ah, AR_ISR_S1, s1_s);
++
++ isr &= ~(AR_ISR_TXOK |
++ AR_ISR_TXDESC |
++ AR_ISR_TXERR |
++ AR_ISR_TXEOL);
++ }
++
+ ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXOK);
+ ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXDESC);
+-
+- s1_s = REG_READ(ah, AR_ISR_S1_S);
+ ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
+ ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
+ }
+@@ -114,13 +134,23 @@ static bool ar9002_hw_get_isr(struct ath
+ *masked |= mask2;
+ }
+
++ if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
++ REG_WRITE(ah, AR_ISR, isr);
++ REG_READ(ah, AR_ISR);
++ }
++
+ if (AR_SREV_9100(ah))
+ return true;
+
+ if (isr & AR_ISR_GENTMR) {
+ u32 s5_s;
+
+- s5_s = REG_READ(ah, AR_ISR_S5_S);
++ if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) {
++ s5_s = REG_READ(ah, AR_ISR_S5_S);
++ } else {
++ s5_s = REG_READ(ah, AR_ISR_S5);
++ }
++
+ ah->intr_gen_timer_trigger =
+ MS(s5_s, AR_ISR_S5_GENTIMER_TRIG);
+
+@@ -133,10 +163,16 @@ static bool ar9002_hw_get_isr(struct ath
+ if ((s5_s & AR_ISR_S5_TIM_TIMER) &&
+ !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
+ *masked |= ATH9K_INT_TIM_TIMER;
++
++ if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
++ REG_WRITE(ah, AR_ISR_S5, s5_s);
++ isr &= ~AR_ISR_GENTMR;
++ }
+ }
+
+ if (sync_cause) {
+- ath9k_debug_sync_cause(common, sync_cause);
++ if (sync_cause_p)
++ *sync_cause_p = sync_cause;
+ fatal_int =
+ (sync_cause &
+ (AR_INTR_SYNC_HOST1_FATAL | AR_INTR_SYNC_HOST1_PERR))
+--- a/drivers/net/wireless/ath/ath9k/antenna.c
++++ b/drivers/net/wireless/ath/ath9k/antenna.c
+@@ -724,14 +724,14 @@ void ath_ant_comb_scan(struct ath_softc
+ struct ath_ant_comb *antcomb = &sc->ant_comb;
+ int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
+ int curr_main_set;
+- int main_rssi = rs->rs_rssi_ctl0;
+- int alt_rssi = rs->rs_rssi_ctl1;
++ int main_rssi = rs->rs_rssi_ctl[0];
++ int alt_rssi = rs->rs_rssi_ctl[1];
+ int rx_ant_conf, main_ant_conf;
+ bool short_scan = false, ret;
+
+- rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
++ rx_ant_conf = (rs->rs_rssi_ctl[2] >> ATH_ANT_RX_CURRENT_SHIFT) &
+ ATH_ANT_RX_MASK;
+- main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
++ main_ant_conf = (rs->rs_rssi_ctl[2] >> ATH_ANT_RX_MAIN_SHIFT) &
+ ATH_ANT_RX_MASK;
+
+ if (alt_rssi >= antcomb->low_rssi_thresh) {
+--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+@@ -32,12 +32,8 @@ static int ar9002_hw_init_mode_regs(stru
+ return 0;
+ }
+
+- if (ah->config.pcie_clock_req)
+- INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_off_L1_9280);
+- else
+- INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_always_on_L1_9280);
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9280PciePhy_clkreq_always_on_L1_9280);
+
+ if (AR_SREV_9287_11_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
+--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+@@ -201,7 +201,6 @@ static void ar9002_hw_spur_mitigate(stru
+ ath9k_hw_get_channel_centers(ah, chan, ¢ers);
+ freq = centers.synth_center;
+
+- ah->config.spurmode = SPUR_ENABLE_EEPROM;
+ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+ cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+@@ -175,7 +175,8 @@ static void ar9003_hw_set_desc_link(void
+ ads->ctl10 |= ar9003_calc_ptr_chksum(ads);
+ }
+
+-static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
++static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked,
++ u32 *sync_cause_p)
+ {
+ u32 isr = 0;
+ u32 mask2 = 0;
+@@ -310,7 +311,8 @@ static bool ar9003_hw_get_isr(struct ath
+ ar9003_mci_get_isr(ah, masked);
+
+ if (sync_cause) {
+- ath9k_debug_sync_cause(common, sync_cause);
++ if (sync_cause_p)
++ *sync_cause_p = sync_cause;
+ fatal_int =
+ (sync_cause &
+ (AR_INTR_SYNC_HOST1_FATAL | AR_INTR_SYNC_HOST1_PERR))
+@@ -476,12 +478,12 @@ int ath9k_hw_process_rxdesc_edma(struct
+
+ /* XXX: Keycache */
+ rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined);
+- rxs->rs_rssi_ctl0 = MS(rxsp->status1, AR_RxRSSIAnt00);
+- rxs->rs_rssi_ctl1 = MS(rxsp->status1, AR_RxRSSIAnt01);
+- rxs->rs_rssi_ctl2 = MS(rxsp->status1, AR_RxRSSIAnt02);
+- rxs->rs_rssi_ext0 = MS(rxsp->status5, AR_RxRSSIAnt10);
+- rxs->rs_rssi_ext1 = MS(rxsp->status5, AR_RxRSSIAnt11);
+- rxs->rs_rssi_ext2 = MS(rxsp->status5, AR_RxRSSIAnt12);
++ rxs->rs_rssi_ctl[0] = MS(rxsp->status1, AR_RxRSSIAnt00);
++ rxs->rs_rssi_ctl[1] = MS(rxsp->status1, AR_RxRSSIAnt01);
++ rxs->rs_rssi_ctl[2] = MS(rxsp->status1, AR_RxRSSIAnt02);
++ rxs->rs_rssi_ext[0] = MS(rxsp->status5, AR_RxRSSIAnt10);
++ rxs->rs_rssi_ext[1] = MS(rxsp->status5, AR_RxRSSIAnt11);
++ rxs->rs_rssi_ext[2] = MS(rxsp->status5, AR_RxRSSIAnt12);
+
+ if (rxsp->status11 & AR_RxKeyIdxValid)
+ rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx);
+--- a/drivers/net/wireless/ath/ath9k/beacon.c
++++ b/drivers/net/wireless/ath/ath9k/beacon.c
+@@ -274,18 +274,19 @@ static int ath9k_beacon_choose_slot(stru
+ return slot;
+ }
+
+-void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif)
++static void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif)
+ {
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+ struct ath_vif *avp = (void *)vif->drv_priv;
+- u64 tsfadjust;
++ u32 tsfadjust;
+
+ if (avp->av_bslot == 0)
+ return;
+
+- tsfadjust = cur_conf->beacon_interval * avp->av_bslot / ATH_BCBUF;
+- avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
++ tsfadjust = cur_conf->beacon_interval * avp->av_bslot;
++ tsfadjust = TU_TO_USEC(tsfadjust) / ATH_BCBUF;
++ avp->tsf_adjust = cpu_to_le64(tsfadjust);
+
+ ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n",
+ (unsigned long long)tsfadjust, avp->av_bslot);
+@@ -431,6 +432,33 @@ static void ath9k_beacon_init(struct ath
+ ath9k_hw_enable_interrupts(ah);
+ }
+
++/* Calculate the modulo of a 64 bit TSF snapshot with a TU divisor */
++static u32 ath9k_mod_tsf64_tu(u64 tsf, u32 div_tu)
++{
++ u32 tsf_mod, tsf_hi, tsf_lo, mod_hi, mod_lo;
++
++ tsf_mod = tsf & (BIT(10) - 1);
++ tsf_hi = tsf >> 32;
++ tsf_lo = ((u32) tsf) >> 10;
++
++ mod_hi = tsf_hi % div_tu;
++ mod_lo = ((mod_hi << 22) + tsf_lo) % div_tu;
++
++ return (mod_lo << 10) | tsf_mod;
++}
++
++static u32 ath9k_get_next_tbtt(struct ath_softc *sc, u64 tsf,
++ unsigned int interval)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ unsigned int offset;
++
++ tsf += TU_TO_USEC(FUDGE + ah->config.sw_beacon_response_time);
++ offset = ath9k_mod_tsf64_tu(tsf, interval);
++
++ return (u32) tsf + TU_TO_USEC(interval) - offset;
++}
++
+ /*
+ * For multi-bss ap support beacons are either staggered evenly over N slots or
+ * burst together. For the former arrange for the SWBA to be delivered for each
+@@ -446,7 +474,8 @@ static void ath9k_beacon_config_ap(struc
+ /* NB: the beacon interval is kept internally in TU's */
+ intval = TU_TO_USEC(conf->beacon_interval);
+ intval /= ATH_BCBUF;
+- nexttbtt = intval;
++ nexttbtt = ath9k_get_next_tbtt(sc, ath9k_hw_gettsf64(ah),
++ conf->beacon_interval);
+
+ if (conf->enable_beacon)
+ ah->imask |= ATH9K_INT_SWBA;
+@@ -458,7 +487,7 @@ static void ath9k_beacon_config_ap(struc
+ (conf->enable_beacon) ? "Enable" : "Disable",
+ nexttbtt, intval, conf->beacon_interval);
+
+- ath9k_beacon_init(sc, nexttbtt, intval, true);
++ ath9k_beacon_init(sc, nexttbtt, intval, false);
+ }
+
+ /*
+@@ -475,11 +504,9 @@ static void ath9k_beacon_config_sta(stru
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_beacon_state bs;
+- int dtimperiod, dtimcount, sleepduration;
+- int cfpperiod, cfpcount;
+- u32 nexttbtt = 0, intval, tsftu;
++ int dtim_intval, sleepduration;
++ u32 nexttbtt = 0, intval;
+ u64 tsf;
+- int num_beacons, offset, dtim_dec_count, cfp_dec_count;
+
+ /* No need to configure beacon if we are not associated */
+ if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
+@@ -492,53 +519,25 @@ static void ath9k_beacon_config_sta(stru
+ intval = conf->beacon_interval;
+
+ /*
+- * Setup dtim and cfp parameters according to
++ * Setup dtim parameters according to
+ * last beacon we received (which may be none).
+ */
+- dtimperiod = conf->dtim_period;
+- dtimcount = conf->dtim_count;
+- if (dtimcount >= dtimperiod) /* NB: sanity check */
+- dtimcount = 0;
+- cfpperiod = 1; /* NB: no PCF support yet */
+- cfpcount = 0;
+-
++ dtim_intval = intval * conf->dtim_period;
+ sleepduration = conf->listen_interval * intval;
+
+ /*
+ * Pull nexttbtt forward to reflect the current
+- * TSF and calculate dtim+cfp state for the result.
++ * TSF and calculate dtim state for the result.
+ */
+ tsf = ath9k_hw_gettsf64(ah);
+- tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
++ nexttbtt = ath9k_get_next_tbtt(sc, tsf, intval);
+
+- num_beacons = tsftu / intval + 1;
+- offset = tsftu % intval;
+- nexttbtt = tsftu - offset;
+- if (offset)
+- nexttbtt += intval;
+-
+- /* DTIM Beacon every dtimperiod Beacon */
+- dtim_dec_count = num_beacons % dtimperiod;
+- /* CFP every cfpperiod DTIM Beacon */
+- cfp_dec_count = (num_beacons / dtimperiod) % cfpperiod;
+- if (dtim_dec_count)
+- cfp_dec_count++;
+-
+- dtimcount -= dtim_dec_count;
+- if (dtimcount < 0)
+- dtimcount += dtimperiod;
+-
+- cfpcount -= cfp_dec_count;
+- if (cfpcount < 0)
+- cfpcount += cfpperiod;
+-
+- bs.bs_intval = intval;
++ bs.bs_intval = TU_TO_USEC(intval);
++ bs.bs_dtimperiod = conf->dtim_period * bs.bs_intval;
+ bs.bs_nexttbtt = nexttbtt;
+- bs.bs_dtimperiod = dtimperiod*intval;
+- bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
+- bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
+- bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
+- bs.bs_cfpmaxduration = 0;
++ bs.bs_nextdtim = nexttbtt;
++ if (conf->dtim_period > 1)
++ bs.bs_nextdtim = ath9k_get_next_tbtt(sc, tsf, dtim_intval);
+
+ /*
+ * Calculate the number of consecutive beacons to miss* before taking
+@@ -566,18 +565,16 @@ static void ath9k_beacon_config_sta(stru
+ * XXX fixed at 100ms
+ */
+
+- bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration);
++ bs.bs_sleepduration = TU_TO_USEC(roundup(IEEE80211_MS_TO_TU(100),
++ sleepduration));
+ if (bs.bs_sleepduration > bs.bs_dtimperiod)
+ bs.bs_sleepduration = bs.bs_dtimperiod;
+
+ /* TSF out of range threshold fixed at 1 second */
+ bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
+
+- ath_dbg(common, BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
+- ath_dbg(common, BEACON,
+- "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
+- bs.bs_bmissthreshold, bs.bs_sleepduration,
+- bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
++ ath_dbg(common, BEACON, "bmiss: %u sleep: %u\n",
++ bs.bs_bmissthreshold, bs.bs_sleepduration);
+
+ /* Set the computed STA beacon timers */
+
+@@ -600,25 +597,11 @@ static void ath9k_beacon_config_adhoc(st
+
+ intval = TU_TO_USEC(conf->beacon_interval);
+
+- if (conf->ibss_creator) {
++ if (conf->ibss_creator)
+ nexttbtt = intval;
+- } else {
+- u32 tbtt, offset, tsftu;
+- u64 tsf;
+-
+- /*
+- * Pull nexttbtt forward to reflect the current
+- * sync'd TSF.
+- */
+- tsf = ath9k_hw_gettsf64(ah);
+- tsftu = TSF_TO_TU(tsf >> 32, tsf) + FUDGE;
+- offset = tsftu % conf->beacon_interval;
+- tbtt = tsftu - offset;
+- if (offset)
+- tbtt += conf->beacon_interval;
+-
+- nexttbtt = TU_TO_USEC(tbtt);
+- }
++ else
++ nexttbtt = ath9k_get_next_tbtt(sc, ath9k_hw_gettsf64(ah),
++ conf->beacon_interval);
+
+ if (conf->enable_beacon)
+ ah->imask |= ATH9K_INT_SWBA;
+@@ -640,7 +623,8 @@ static void ath9k_beacon_config_adhoc(st
+ set_bit(SC_OP_BEACONS, &sc->sc_flags);
+ }
+
+-bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
++static bool ath9k_allow_beacon_config(struct ath_softc *sc,
++ struct ieee80211_vif *vif)
+ {
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ struct ath_vif *avp = (void *)vif->drv_priv;
+@@ -711,12 +695,17 @@ void ath9k_beacon_config(struct ath_soft
+ unsigned long flags;
+ bool skip_beacon = false;
+
++ if (vif->type == NL80211_IFTYPE_AP)
++ ath9k_set_tsfadjust(sc, vif);
++
++ if (!ath9k_allow_beacon_config(sc, vif))
++ return;
++
+ if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
+ ath9k_cache_beacon_config(sc, bss_conf);
+ ath9k_set_beacon(sc);
+ set_bit(SC_OP_BEACONS, &sc->sc_flags);
+ return;
+-
+ }
+
+ /*
+--- a/drivers/net/wireless/ath/ath9k/btcoex.c
++++ b/drivers/net/wireless/ath/ath9k/btcoex.c
+@@ -66,7 +66,6 @@ void ath9k_hw_init_btcoex_hw(struct ath_
+ .bt_first_slot_time = 5,
+ .bt_hold_rx_clear = true,
+ };
+- u32 i, idx;
+ bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
+
+ if (AR_SREV_9300_20_OR_LATER(ah))
+@@ -88,11 +87,6 @@ void ath9k_hw_init_btcoex_hw(struct ath_
+ SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
+ SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
+ AR_BT_DISABLE_BT_ANT;
+-
+- for (i = 0; i < 32; i++) {
+- idx = (debruijn32 << i) >> 27;
+- ah->hw_gen_timers.gen_timer_index[idx] = i;
+- }
+ }
+ EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
+
+--- a/drivers/net/wireless/ath/ath9k/dfs.c
++++ b/drivers/net/wireless/ath/ath9k/dfs.c
+@@ -158,8 +158,8 @@ void ath9k_dfs_process_phyerr(struct ath
+ return;
+ }
+
+- ard.rssi = rs->rs_rssi_ctl0;
+- ard.ext_rssi = rs->rs_rssi_ext0;
++ ard.rssi = rs->rs_rssi_ctl[0];
++ ard.ext_rssi = rs->rs_rssi_ext[0];
+
+ /*
+ * hardware stores this as 8 bit signed value.
+--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+@@ -1085,31 +1085,7 @@ static void ath9k_hw_4k_set_board_values
+
+ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
+ {
+-#define EEP_MAP4K_SPURCHAN \
+- (ah->eeprom.map4k.modalHeader.spurChans[i].spurChan)
+- struct ath_common *common = ath9k_hw_common(ah);
+-
+- u16 spur_val = AR_NO_SPUR;
+-
+- ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
+- i, is2GHz, ah->config.spurchans[i][is2GHz]);
+-
+- switch (ah->config.spurmode) {
+- case SPUR_DISABLE:
+- break;
+- case SPUR_ENABLE_IOCTL:
+- spur_val = ah->config.spurchans[i][is2GHz];
+- ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
+- spur_val);
+- break;
+- case SPUR_ENABLE_EEPROM:
+- spur_val = EEP_MAP4K_SPURCHAN;
+- break;
+- }
+-
+- return spur_val;
+-
+-#undef EEP_MAP4K_SPURCHAN
++ return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan;
+ }
+
+ const struct eeprom_ops eep_4k_ops = {
+--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+@@ -1004,31 +1004,7 @@ static void ath9k_hw_ar9287_set_board_va
+ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
+ u16 i, bool is2GHz)
+ {
+-#define EEP_MAP9287_SPURCHAN \
+- (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan)
+-
+- struct ath_common *common = ath9k_hw_common(ah);
+- u16 spur_val = AR_NO_SPUR;
+-
+- ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
+- i, is2GHz, ah->config.spurchans[i][is2GHz]);
+-
+- switch (ah->config.spurmode) {
+- case SPUR_DISABLE:
+- break;
+- case SPUR_ENABLE_IOCTL:
+- spur_val = ah->config.spurchans[i][is2GHz];
+- ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
+- spur_val);
+- break;
+- case SPUR_ENABLE_EEPROM:
+- spur_val = EEP_MAP9287_SPURCHAN;
+- break;
+- }
+-
+- return spur_val;
+-
+-#undef EEP_MAP9287_SPURCHAN
++ return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
+ }
+
+ const struct eeprom_ops eep_ar9287_ops = {
+--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
+@@ -1348,31 +1348,7 @@ static void ath9k_hw_def_set_txpower(str
+
+ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
+ {
+-#define EEP_DEF_SPURCHAN \
+- (ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan)
+- struct ath_common *common = ath9k_hw_common(ah);
+-
+- u16 spur_val = AR_NO_SPUR;
+-
+- ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
+- i, is2GHz, ah->config.spurchans[i][is2GHz]);
+-
+- switch (ah->config.spurmode) {
+- case SPUR_DISABLE:
+- break;
+- case SPUR_ENABLE_IOCTL:
+- spur_val = ah->config.spurchans[i][is2GHz];
+- ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
+- spur_val);
+- break;
+- case SPUR_ENABLE_EEPROM:
+- spur_val = EEP_DEF_SPURCHAN;
+- break;
+- }
+-
+- return spur_val;
+-
+-#undef EEP_DEF_SPURCHAN
++ return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
+ }
+
+ const struct eeprom_ops eep_def_ops = {
+--- a/drivers/net/wireless/ath/ath9k/gpio.c
++++ b/drivers/net/wireless/ath/ath9k/gpio.c
+@@ -157,36 +157,6 @@ static void ath_detect_bt_priority(struc
+ }
+ }
+
+-static void ath9k_gen_timer_start(struct ath_hw *ah,
+- struct ath_gen_timer *timer,
+- u32 trig_timeout,
+- u32 timer_period)
+-{
+- ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period);
+-
+- if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
+- ath9k_hw_disable_interrupts(ah);
+- ah->imask |= ATH9K_INT_GENTIMER;
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+- }
+-}
+-
+-static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
+-{
+- struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
+-
+- ath9k_hw_gen_timer_stop(ah, timer);
+-
+- /* if no timer is enabled, turn off interrupt mask */
+- if (timer_table->timer_mask.val == 0) {
+- ath9k_hw_disable_interrupts(ah);
+- ah->imask &= ~ATH9K_INT_GENTIMER;
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+- }
+-}
+-
+ static void ath_mci_ftp_adjust(struct ath_softc *sc)
+ {
+ struct ath_btcoex *btcoex = &sc->btcoex;
+@@ -257,19 +227,9 @@ static void ath_btcoex_period_timer(unsi
+
+ spin_unlock_bh(&btcoex->btcoex_lock);
+
+- /*
+- * btcoex_period is in msec while (btocex/btscan_)no_stomp are in usec,
+- * ensure that we properly convert btcoex_period to usec
+- * for any comparision with (btcoex/btscan_)no_stomp.
+- */
+- if (btcoex->btcoex_period * 1000 != btcoex->btcoex_no_stomp) {
+- if (btcoex->hw_timer_enabled)
+- ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
+-
+- ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period,
+- timer_period * 10);
+- btcoex->hw_timer_enabled = true;
+- }
++ if (btcoex->btcoex_period != btcoex->btcoex_no_stomp)
++ mod_timer(&btcoex->no_stomp_timer,
++ jiffies + msecs_to_jiffies(timer_period));
+
+ ath9k_ps_restore(sc);
+
+@@ -282,7 +242,7 @@ skip_hw_wakeup:
+ * Generic tsf based hw timer which configures weight
+ * registers to time slice between wlan and bt traffic
+ */
+-static void ath_btcoex_no_stomp_timer(void *arg)
++static void ath_btcoex_no_stomp_timer(unsigned long arg)
+ {
+ struct ath_softc *sc = (struct ath_softc *)arg;
+ struct ath_hw *ah = sc->sc_ah;
+@@ -311,24 +271,18 @@ static int ath_init_btcoex_timer(struct
+ struct ath_btcoex *btcoex = &sc->btcoex;
+
+ btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
+- btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 1000 *
++ btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
+ btcoex->btcoex_period / 100;
+- btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * 1000 *
++ btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) *
+ btcoex->btcoex_period / 100;
+
+ setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
+ (unsigned long) sc);
++ setup_timer(&btcoex->no_stomp_timer, ath_btcoex_no_stomp_timer,
++ (unsigned long) sc);
+
+ spin_lock_init(&btcoex->btcoex_lock);
+
+- btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
+- ath_btcoex_no_stomp_timer,
+- ath_btcoex_no_stomp_timer,
+- (void *) sc, AR_FIRST_NDP_TIMER);
+-
+- if (!btcoex->no_stomp_timer)
+- return -ENOMEM;
+-
+ return 0;
+ }
+
+@@ -343,10 +297,7 @@ void ath9k_btcoex_timer_resume(struct at
+ ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
+
+ /* make sure duty cycle timer is also stopped when resuming */
+- if (btcoex->hw_timer_enabled) {
+- ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
+- btcoex->hw_timer_enabled = false;
+- }
++ del_timer_sync(&btcoex->no_stomp_timer);
+
+ btcoex->bt_priority_cnt = 0;
+ btcoex->bt_priority_time = jiffies;
+@@ -363,24 +314,16 @@ void ath9k_btcoex_timer_resume(struct at
+ void ath9k_btcoex_timer_pause(struct ath_softc *sc)
+ {
+ struct ath_btcoex *btcoex = &sc->btcoex;
+- struct ath_hw *ah = sc->sc_ah;
+
+ del_timer_sync(&btcoex->period_timer);
+-
+- if (btcoex->hw_timer_enabled) {
+- ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
+- btcoex->hw_timer_enabled = false;
+- }
++ del_timer_sync(&btcoex->no_stomp_timer);
+ }
+
+ void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
+ {
+ struct ath_btcoex *btcoex = &sc->btcoex;
+
+- if (btcoex->hw_timer_enabled) {
+- ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
+- btcoex->hw_timer_enabled = false;
+- }
++ del_timer_sync(&btcoex->no_stomp_timer);
+ }
+
+ u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
+@@ -400,12 +343,6 @@ u16 ath9k_btcoex_aggr_limit(struct ath_s
+
+ void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
+ {
+- struct ath_hw *ah = sc->sc_ah;
+-
+- if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
+- if (status & ATH9K_INT_GENTIMER)
+- ath_gen_timer_isr(sc->sc_ah);
+-
+ if (status & ATH9K_INT_MCI)
+ ath_mci_intr(sc);
+ }
+@@ -447,10 +384,6 @@ void ath9k_deinit_btcoex(struct ath_soft
+ {
+ struct ath_hw *ah = sc->sc_ah;
+
+- if ((sc->btcoex.no_stomp_timer) &&
+- ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
+- ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
+-
+ if (ath9k_hw_mci_is_enabled(ah))
+ ath_mci_cleanup(sc);
+ }
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
+@@ -70,11 +70,11 @@ static void ath9k_htc_beacon_config_sta(
+ struct ath9k_beacon_state bs;
+ enum ath9k_int imask = 0;
+ int dtimperiod, dtimcount, sleepduration;
+- int cfpperiod, cfpcount, bmiss_timeout;
++ int bmiss_timeout;
+ u32 nexttbtt = 0, intval, tsftu;
+ __be32 htc_imask = 0;
+ u64 tsf;
+- int num_beacons, offset, dtim_dec_count, cfp_dec_count;
++ int num_beacons, offset, dtim_dec_count;
+ int ret __attribute__ ((unused));
+ u8 cmd_rsp;
+
+@@ -84,7 +84,7 @@ static void ath9k_htc_beacon_config_sta(
+ bmiss_timeout = (ATH_DEFAULT_BMISS_LIMIT * bss_conf->beacon_interval);
+
+ /*
+- * Setup dtim and cfp parameters according to
++ * Setup dtim parameters according to
+ * last beacon we received (which may be none).
+ */
+ dtimperiod = bss_conf->dtim_period;
+@@ -93,8 +93,6 @@ static void ath9k_htc_beacon_config_sta(
+ dtimcount = 1;
+ if (dtimcount >= dtimperiod) /* NB: sanity check */
+ dtimcount = 0;
+- cfpperiod = 1; /* NB: no PCF support yet */
+- cfpcount = 0;
+
+ sleepduration = intval;
+ if (sleepduration <= 0)
+@@ -102,7 +100,7 @@ static void ath9k_htc_beacon_config_sta(
+
+ /*
+ * Pull nexttbtt forward to reflect the current
+- * TSF and calculate dtim+cfp state for the result.
++ * TSF and calculate dtim state for the result.
+ */
+ tsf = ath9k_hw_gettsf64(priv->ah);
+ tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
+@@ -115,26 +113,14 @@ static void ath9k_htc_beacon_config_sta(
+
+ /* DTIM Beacon every dtimperiod Beacon */
+ dtim_dec_count = num_beacons % dtimperiod;
+- /* CFP every cfpperiod DTIM Beacon */
+- cfp_dec_count = (num_beacons / dtimperiod) % cfpperiod;
+- if (dtim_dec_count)
+- cfp_dec_count++;
+-
+ dtimcount -= dtim_dec_count;
+ if (dtimcount < 0)
+ dtimcount += dtimperiod;
+
+- cfpcount -= cfp_dec_count;
+- if (cfpcount < 0)
+- cfpcount += cfpperiod;
+-
+- bs.bs_intval = intval;
+- bs.bs_nexttbtt = nexttbtt;
+- bs.bs_dtimperiod = dtimperiod*intval;
+- bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
+- bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
+- bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
+- bs.bs_cfpmaxduration = 0;
++ bs.bs_intval = TU_TO_USEC(intval);
++ bs.bs_nexttbtt = TU_TO_USEC(nexttbtt);
++ bs.bs_dtimperiod = dtimperiod * bs.bs_intval;
++ bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount * bs.bs_intval;
+
+ /*
+ * Calculate the number of consecutive beacons to miss* before taking
+@@ -161,7 +147,8 @@ static void ath9k_htc_beacon_config_sta(
+ * XXX fixed at 100ms
+ */
+
+- bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration);
++ bs.bs_sleepduration = TU_TO_USEC(roundup(IEEE80211_MS_TO_TU(100),
++ sleepduration));
+ if (bs.bs_sleepduration > bs.bs_dtimperiod)
+ bs.bs_sleepduration = bs.bs_dtimperiod;
+
+@@ -170,10 +157,8 @@ static void ath9k_htc_beacon_config_sta(
+
+ ath_dbg(common, CONFIG, "intval: %u tsf: %llu tsftu: %u\n",
+ intval, tsf, tsftu);
+- ath_dbg(common, CONFIG,
+- "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
+- bs.bs_bmissthreshold, bs.bs_sleepduration,
+- bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
++ ath_dbg(common, CONFIG, "bmiss: %u sleep: %u\n",
++ bs.bs_bmissthreshold, bs.bs_sleepduration);
+
+ /* Set the computed STA beacon timers */
+
+--- a/drivers/net/wireless/ath/ath9k/mac.c
++++ b/drivers/net/wireless/ath/ath9k/mac.c
+@@ -481,8 +481,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw
+ | AR_Q_MISC_CBR_INCR_DIS0);
+ value = (qi->tqi_readyTime -
+ (ah->config.sw_beacon_response_time -
+- ah->config.dma_beacon_response_time) -
+- ah->config.additional_swba_backoff) * 1024;
++ ah->config.dma_beacon_response_time)) * 1024;
+ REG_WRITE(ah, AR_QRDYTIMECFG(q),
+ value | AR_Q_RDYTIMECFG_EN);
+ REG_SET_BIT(ah, AR_DMISC(q),
+@@ -550,25 +549,25 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
+
+ if (ads.ds_rxstatus8 & AR_PostDelimCRCErr) {
+ rs->rs_rssi = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ctl0 = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ctl1 = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ctl2 = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ext0 = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ext1 = ATH9K_RSSI_BAD;
+- rs->rs_rssi_ext2 = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ctl[0] = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ctl[1] = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ctl[2] = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ext[0] = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ext[1] = ATH9K_RSSI_BAD;
++ rs->rs_rssi_ext[2] = ATH9K_RSSI_BAD;
+ } else {
+ rs->rs_rssi = MS(ads.ds_rxstatus4, AR_RxRSSICombined);
+- rs->rs_rssi_ctl0 = MS(ads.ds_rxstatus0,
++ rs->rs_rssi_ctl[0] = MS(ads.ds_rxstatus0,
+ AR_RxRSSIAnt00);
+- rs->rs_rssi_ctl1 = MS(ads.ds_rxstatus0,
++ rs->rs_rssi_ctl[1] = MS(ads.ds_rxstatus0,
+ AR_RxRSSIAnt01);
+- rs->rs_rssi_ctl2 = MS(ads.ds_rxstatus0,
++ rs->rs_rssi_ctl[2] = MS(ads.ds_rxstatus0,
+ AR_RxRSSIAnt02);
+- rs->rs_rssi_ext0 = MS(ads.ds_rxstatus4,
++ rs->rs_rssi_ext[0] = MS(ads.ds_rxstatus4,
+ AR_RxRSSIAnt10);
+- rs->rs_rssi_ext1 = MS(ads.ds_rxstatus4,
++ rs->rs_rssi_ext[1] = MS(ads.ds_rxstatus4,
+ AR_RxRSSIAnt11);
+- rs->rs_rssi_ext2 = MS(ads.ds_rxstatus4,
++ rs->rs_rssi_ext[2] = MS(ads.ds_rxstatus4,
+ AR_RxRSSIAnt12);
+ }
+ if (ads.ds_rxstatus8 & AR_RxKeyIdxValid)
+--- a/drivers/net/wireless/ath/ath9k/mac.h
++++ b/drivers/net/wireless/ath/ath9k/mac.h
+@@ -133,12 +133,8 @@ struct ath_rx_status {
+ u8 rs_rate;
+ u8 rs_antenna;
+ u8 rs_more;
+- int8_t rs_rssi_ctl0;
+- int8_t rs_rssi_ctl1;
+- int8_t rs_rssi_ctl2;
+- int8_t rs_rssi_ext0;
+- int8_t rs_rssi_ext1;
+- int8_t rs_rssi_ext2;
++ int8_t rs_rssi_ctl[3];
++ int8_t rs_rssi_ext[3];
+ u8 rs_isaggr;
+ u8 rs_firstaggr;
+ u8 rs_moreaggr;
+--- a/drivers/net/wireless/ath/ath9k/mci.c
++++ b/drivers/net/wireless/ath/ath9k/mci.c
+@@ -200,7 +200,7 @@ skip_tuning:
+ if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
+ btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
+
+- btcoex->btcoex_no_stomp = btcoex->btcoex_period * 1000 *
++ btcoex->btcoex_no_stomp = btcoex->btcoex_period *
+ (100 - btcoex->duty_cycle) / 100;
+
+ ath9k_hw_btcoex_enable(sc->sc_ah);
+--- a/drivers/net/wireless/ath/ath9k/recv.c
++++ b/drivers/net/wireless/ath/ath9k/recv.c
+@@ -15,7 +15,6 @@
+ */
+
+ #include <linux/dma-mapping.h>
+-#include <linux/relay.h>
+ #include "ath9k.h"
+ #include "ar9003_mac.h"
+
+@@ -906,6 +905,7 @@ static void ath9k_process_rssi(struct at
+ struct ath_hw *ah = common->ah;
+ int last_rssi;
+ int rssi = rx_stats->rs_rssi;
++ int i, j;
+
+ /*
+ * RSSI is not available for subframes in an A-MPDU.
+@@ -924,6 +924,20 @@ static void ath9k_process_rssi(struct at
+ return;
+ }
+
++ for (i = 0, j = 0; i < ARRAY_SIZE(rx_stats->rs_rssi_ctl); i++) {
++ s8 rssi;
++
++ if (!(ah->rxchainmask & BIT(i)))
++ continue;
++
++ rssi = rx_stats->rs_rssi_ctl[i];
++ if (rssi != ATH9K_RSSI_BAD) {
++ rxs->chains |= BIT(j);
++ rxs->chain_signal[j] = ah->noise + rssi;
++ }
++ j++;
++ }
++
+ /*
+ * Update Beacon RSSI, this is used by ANI.
+ */
+@@ -960,186 +974,6 @@ static void ath9k_process_tsf(struct ath
+ rxs->mactime += 0x100000000ULL;
+ }
+
+-#ifdef CPTCFG_ATH9K_DEBUGFS
+-static s8 fix_rssi_inv_only(u8 rssi_val)
+-{
+- if (rssi_val == 128)
+- rssi_val = 0;
+- return (s8) rssi_val;
+-}
+-#endif
+-
+-/* returns 1 if this was a spectral frame, even if not handled. */
+-static int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
+- struct ath_rx_status *rs, u64 tsf)
+-{
+-#ifdef CPTCFG_ATH9K_DEBUGFS
+- struct ath_hw *ah = sc->sc_ah;
+- u8 num_bins, *bins, *vdata = (u8 *)hdr;
+- struct fft_sample_ht20 fft_sample_20;
+- struct fft_sample_ht20_40 fft_sample_40;
+- struct fft_sample_tlv *tlv;
+- struct ath_radar_info *radar_info;
+- int len = rs->rs_datalen;
+- int dc_pos;
+- u16 fft_len, length, freq = ah->curchan->chan->center_freq;
+- enum nl80211_channel_type chan_type;
+-
+- /* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
+- * via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
+- * yet, but this is supposed to be possible as well.
+- */
+- if (rs->rs_phyerr != ATH9K_PHYERR_RADAR &&
+- rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT &&
+- rs->rs_phyerr != ATH9K_PHYERR_SPECTRAL)
+- return 0;
+-
+- /* check if spectral scan bit is set. This does not have to be checked
+- * if received through a SPECTRAL phy error, but shouldn't hurt.
+- */
+- radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
+- if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
+- return 0;
+-
+- chan_type = cfg80211_get_chandef_type(&sc->hw->conf.chandef);
+- if ((chan_type == NL80211_CHAN_HT40MINUS) ||
+- (chan_type == NL80211_CHAN_HT40PLUS)) {
+- fft_len = SPECTRAL_HT20_40_TOTAL_DATA_LEN;
+- num_bins = SPECTRAL_HT20_40_NUM_BINS;
+- bins = (u8 *)fft_sample_40.data;
+- } else {
+- fft_len = SPECTRAL_HT20_TOTAL_DATA_LEN;
+- num_bins = SPECTRAL_HT20_NUM_BINS;
+- bins = (u8 *)fft_sample_20.data;
+- }
+-
+- /* Variation in the data length is possible and will be fixed later */
+- if ((len > fft_len + 2) || (len < fft_len - 1))
+- return 1;
+-
+- switch (len - fft_len) {
+- case 0:
+- /* length correct, nothing to do. */
+- memcpy(bins, vdata, num_bins);
+- break;
+- case -1:
+- /* first byte missing, duplicate it. */
+- memcpy(&bins[1], vdata, num_bins - 1);
+- bins[0] = vdata[0];
+- break;
+- case 2:
+- /* MAC added 2 extra bytes at bin 30 and 32, remove them. */
+- memcpy(bins, vdata, 30);
+- bins[30] = vdata[31];
+- memcpy(&bins[31], &vdata[33], num_bins - 31);
+- break;
+- case 1:
+- /* MAC added 2 extra bytes AND first byte is missing. */
+- bins[0] = vdata[0];
+- memcpy(&bins[1], vdata, 30);
+- bins[31] = vdata[31];
+- memcpy(&bins[32], &vdata[33], num_bins - 32);
+- break;
+- default:
+- return 1;
+- }
+-
+- /* DC value (value in the middle) is the blind spot of the spectral
+- * sample and invalid, interpolate it.
+- */
+- dc_pos = num_bins / 2;
+- bins[dc_pos] = (bins[dc_pos + 1] + bins[dc_pos - 1]) / 2;
+-
+- if ((chan_type == NL80211_CHAN_HT40MINUS) ||
+- (chan_type == NL80211_CHAN_HT40PLUS)) {
+- s8 lower_rssi, upper_rssi;
+- s16 ext_nf;
+- u8 lower_max_index, upper_max_index;
+- u8 lower_bitmap_w, upper_bitmap_w;
+- u16 lower_mag, upper_mag;
+- struct ath9k_hw_cal_data *caldata = ah->caldata;
+- struct ath_ht20_40_mag_info *mag_info;
+-
+- if (caldata)
+- ext_nf = ath9k_hw_getchan_noise(ah, ah->curchan,
+- caldata->nfCalHist[3].privNF);
+- else
+- ext_nf = ATH_DEFAULT_NOISE_FLOOR;
+-
+- length = sizeof(fft_sample_40) - sizeof(struct fft_sample_tlv);
+- fft_sample_40.tlv.type = ATH_FFT_SAMPLE_HT20_40;
+- fft_sample_40.tlv.length = __cpu_to_be16(length);
+- fft_sample_40.freq = __cpu_to_be16(freq);
+- fft_sample_40.channel_type = chan_type;
+-
+- if (chan_type == NL80211_CHAN_HT40PLUS) {
+- lower_rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
+- upper_rssi = fix_rssi_inv_only(rs->rs_rssi_ext0);
+-
+- fft_sample_40.lower_noise = ah->noise;
+- fft_sample_40.upper_noise = ext_nf;
+- } else {
+- lower_rssi = fix_rssi_inv_only(rs->rs_rssi_ext0);
+- upper_rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
+-
+- fft_sample_40.lower_noise = ext_nf;
+- fft_sample_40.upper_noise = ah->noise;
+- }
+- fft_sample_40.lower_rssi = lower_rssi;
+- fft_sample_40.upper_rssi = upper_rssi;
+-
+- mag_info = ((struct ath_ht20_40_mag_info *)radar_info) - 1;
+- lower_mag = spectral_max_magnitude(mag_info->lower_bins);
+- upper_mag = spectral_max_magnitude(mag_info->upper_bins);
+- fft_sample_40.lower_max_magnitude = __cpu_to_be16(lower_mag);
+- fft_sample_40.upper_max_magnitude = __cpu_to_be16(upper_mag);
+- lower_max_index = spectral_max_index(mag_info->lower_bins);
+- upper_max_index = spectral_max_index(mag_info->upper_bins);
+- fft_sample_40.lower_max_index = lower_max_index;
+- fft_sample_40.upper_max_index = upper_max_index;
+- lower_bitmap_w = spectral_bitmap_weight(mag_info->lower_bins);
+- upper_bitmap_w = spectral_bitmap_weight(mag_info->upper_bins);
+- fft_sample_40.lower_bitmap_weight = lower_bitmap_w;
+- fft_sample_40.upper_bitmap_weight = upper_bitmap_w;
+- fft_sample_40.max_exp = mag_info->max_exp & 0xf;
-
- /**
- * enum buffer_type - Buffer type flags
- *
-@@ -137,7 +133,8 @@ int ath_descdma_setup(struct ath_softc *
- #define ATH_AGGR_ENCRYPTDELIM 10
- /* minimum h/w qdepth to be sustained to maximize aggregation */
- #define ATH_AGGR_MIN_QDEPTH 2
--#define ATH_AMPDU_SUBFRAME_DEFAULT 32
-+/* minimum h/w qdepth for non-aggregated traffic */
-+#define ATH_NON_AGGR_MIN_QDEPTH 8
-
- #define IEEE80211_SEQ_SEQ_SHIFT 4
- #define IEEE80211_SEQ_MAX 4096
-@@ -174,12 +171,6 @@ int ath_descdma_setup(struct ath_softc *
+- fft_sample_40.tsf = __cpu_to_be64(tsf);
+-
+- tlv = (struct fft_sample_tlv *)&fft_sample_40;
+- } else {
+- u8 max_index, bitmap_w;
+- u16 magnitude;
+- struct ath_ht20_mag_info *mag_info;
+-
+- length = sizeof(fft_sample_20) - sizeof(struct fft_sample_tlv);
+- fft_sample_20.tlv.type = ATH_FFT_SAMPLE_HT20;
+- fft_sample_20.tlv.length = __cpu_to_be16(length);
+- fft_sample_20.freq = __cpu_to_be16(freq);
+-
+- fft_sample_20.rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
+- fft_sample_20.noise = ah->noise;
+-
+- mag_info = ((struct ath_ht20_mag_info *)radar_info) - 1;
+- magnitude = spectral_max_magnitude(mag_info->all_bins);
+- fft_sample_20.max_magnitude = __cpu_to_be16(magnitude);
+- max_index = spectral_max_index(mag_info->all_bins);
+- fft_sample_20.max_index = max_index;
+- bitmap_w = spectral_bitmap_weight(mag_info->all_bins);
+- fft_sample_20.bitmap_weight = bitmap_w;
+- fft_sample_20.max_exp = mag_info->max_exp & 0xf;
+-
+- fft_sample_20.tsf = __cpu_to_be64(tsf);
+-
+- tlv = (struct fft_sample_tlv *)&fft_sample_20;
+- }
+-
+- ath_debug_send_fft_sample(sc, tlv);
+- return 1;
+-#else
+- return 0;
+-#endif
+-}
+-
+ static bool ath9k_is_mybeacon(struct ath_softc *sc, struct ieee80211_hdr *hdr)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -270,10 +270,20 @@ struct cal_ctl_data_5g {
+ u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
+ } __packed;
- #define ATH_TX_COMPLETE_POLL_INT 1000
++#define MAX_BASE_EXTENSION_FUTURE 2
++
+ struct ar9300_BaseExtension_1 {
+ u8 ant_div_control;
+- u8 future[3];
+- u8 tempslopextension[8];
++ u8 future[MAX_BASE_EXTENSION_FUTURE];
++ /*
++ * misc_enable:
++ *
++ * BIT 0 - TX Gain Cap enable.
++ * BIT 1 - Uncompressed Checksum enable.
++ * BIT 2/3 - MinCCApwr enable 2g/5g.
++ */
++ u8 misc_enable;
++ int8_t tempslopextension[8];
+ int8_t quick_drop_low;
+ int8_t quick_drop_high;
+ } __packed;
+--- a/drivers/net/wireless/ath/ath9k/debug.h
++++ b/drivers/net/wireless/ath/ath9k/debug.h
+@@ -292,11 +292,11 @@ void ath9k_sta_add_debugfs(struct ieee80
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ struct dentry *dir);
+-void ath_debug_send_fft_sample(struct ath_softc *sc,
+- struct fft_sample_tlv *fft_sample);
+ void ath9k_debug_stat_ant(struct ath_softc *sc,
+ struct ath_hw_antcomb_conf *div_ant_conf,
+ int main_rssi_avg, int alt_rssi_avg);
++void ath9k_debug_sync_cause(struct ath_softc *sc, u32 sync_cause);
++
+ #else
--enum ATH_AGGR_STATUS {
-- ATH_AGGR_DONE,
-- ATH_AGGR_BAW_CLOSED,
-- ATH_AGGR_LIMITED,
--};
--
- #define ATH_TXFIFO_DEPTH 8
- struct ath_txq {
- int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
-@@ -212,8 +203,9 @@ struct ath_frame_info {
- int framelen;
- enum ath9k_key_type keytype;
- u8 keyix;
-- u8 retries;
- u8 rtscts_rate;
-+ u8 retries : 7;
-+ u8 baw_tracked : 1;
- };
+ #define RX_STAT_INC(c) /* NOP */
+@@ -331,6 +331,11 @@ static inline void ath9k_debug_stat_ant(
- struct ath_buf_state {
-@@ -241,6 +233,7 @@ struct ath_buf {
- struct ath_atx_tid {
- struct list_head list;
- struct sk_buff_head buf_q;
-+ struct sk_buff_head retry_q;
- struct ath_node *an;
- struct ath_atx_ac *ac;
- unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
-@@ -268,6 +261,7 @@ struct ath_node {
- u8 mpdudensity;
-
- bool sleeping;
-+ bool no_ps_filter;
-
- #if defined(CPTCFG_MAC80211_DEBUGFS) && defined(CPTCFG_ATH9K_DEBUGFS)
- struct dentry *node_stat;
-@@ -317,6 +311,7 @@ struct ath_rx {
- struct ath_descdma rxdma;
- struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
-
-+ struct ath_buf *buf_hold;
- struct sk_buff *frag;
-
- u32 ampdu_ref;
-@@ -367,6 +362,7 @@ void ath9k_release_buffered_frames(struc
- /********/
-
- struct ath_vif {
-+ struct ath_node mcast_node;
- int av_bslot;
- bool primary_sta_vif;
- __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
---- a/drivers/net/wireless/ath/ath9k/debug.c
-+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -607,6 +607,28 @@ static ssize_t read_file_xmit(struct fil
- return retval;
}
-+static ssize_t print_queue(struct ath_softc *sc, struct ath_txq *txq,
-+ char *buf, ssize_t size)
++static inline void
++ath9k_debug_sync_cause(struct ath_softc *sc, u32 sync_cause)
+{
-+ ssize_t len = 0;
++}
++
+ #endif /* CPTCFG_ATH9K_DEBUGFS */
+
+ #endif /* DEBUG_H */
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/spectral.c
+@@ -0,0 +1,543 @@
++/*
++ * Copyright (c) 2013 Qualcomm Atheros, Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/relay.h>
++#include "ath9k.h"
+
-+ ath_txq_lock(sc, txq);
++static s8 fix_rssi_inv_only(u8 rssi_val)
++{
++ if (rssi_val == 128)
++ rssi_val = 0;
++ return (s8) rssi_val;
++}
+
-+ len += snprintf(buf + len, size - len, "%s: %d ",
-+ "qnum", txq->axq_qnum);
-+ len += snprintf(buf + len, size - len, "%s: %2d ",
-+ "qdepth", txq->axq_depth);
-+ len += snprintf(buf + len, size - len, "%s: %2d ",
-+ "ampdu-depth", txq->axq_ampdu_depth);
-+ len += snprintf(buf + len, size - len, "%s: %3d ",
-+ "pending", txq->pending_frames);
-+ len += snprintf(buf + len, size - len, "%s: %d\n",
-+ "stopped", txq->stopped);
++static void ath_debug_send_fft_sample(struct ath_softc *sc,
++ struct fft_sample_tlv *fft_sample_tlv)
++{
++ int length;
++ if (!sc->rfs_chan_spec_scan)
++ return;
+
-+ ath_txq_unlock(sc, txq);
-+ return len;
++ length = __be16_to_cpu(fft_sample_tlv->length) +
++ sizeof(*fft_sample_tlv);
++ relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv, length);
+}
+
- static ssize_t read_file_queues(struct file *file, char __user *user_buf,
- size_t count, loff_t *ppos)
- {
-@@ -624,24 +646,13 @@ static ssize_t read_file_queues(struct f
-
- for (i = 0; i < IEEE80211_NUM_ACS; i++) {
- txq = sc->tx.txq_map[i];
-- len += snprintf(buf + len, size - len, "(%s): ", qname[i]);
--
-- ath_txq_lock(sc, txq);
--
-- len += snprintf(buf + len, size - len, "%s: %d ",
-- "qnum", txq->axq_qnum);
-- len += snprintf(buf + len, size - len, "%s: %2d ",
-- "qdepth", txq->axq_depth);
-- len += snprintf(buf + len, size - len, "%s: %2d ",
-- "ampdu-depth", txq->axq_ampdu_depth);
-- len += snprintf(buf + len, size - len, "%s: %3d ",
-- "pending", txq->pending_frames);
-- len += snprintf(buf + len, size - len, "%s: %d\n",
-- "stopped", txq->stopped);
--
-- ath_txq_unlock(sc, txq);
-+ len += snprintf(buf + len, size - len, "(%s): ", qname[i]);
-+ len += print_queue(sc, txq, buf + len, size - len);
- }
-
-+ len += snprintf(buf + len, size - len, "(CAB): ");
-+ len += print_queue(sc, sc->beacon.cabq, buf + len, size - len);
++/* returns 1 if this was a spectral frame, even if not handled. */
++int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
++ struct ath_rx_status *rs, u64 tsf)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ u8 num_bins, *bins, *vdata = (u8 *)hdr;
++ struct fft_sample_ht20 fft_sample_20;
++ struct fft_sample_ht20_40 fft_sample_40;
++ struct fft_sample_tlv *tlv;
++ struct ath_radar_info *radar_info;
++ int len = rs->rs_datalen;
++ int dc_pos;
++ u16 fft_len, length, freq = ah->curchan->chan->center_freq;
++ enum nl80211_channel_type chan_type;
+
- if (len > size)
- len = size;
-
---- a/net/mac80211/ibss.c
-+++ b/net/mac80211/ibss.c
-@@ -792,6 +792,17 @@ static void ieee80211_sta_find_ibss(stru
- return;
- }
-
-+ /* if a fixed bssid and a fixed freq have been provided create the IBSS
-+ * directly and do not waste time scanning
++ /* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
++ * via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
++ * yet, but this is supposed to be possible as well.
+ */
-+ if (ifibss->fixed_bssid && ifibss->fixed_channel) {
-+ sdata_info(sdata, "Created IBSS using preconfigured BSSID %pM\n",
-+ bssid);
-+ ieee80211_sta_create_ibss(sdata);
-+ return;
++ if (rs->rs_phyerr != ATH9K_PHYERR_RADAR &&
++ rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT &&
++ rs->rs_phyerr != ATH9K_PHYERR_SPECTRAL)
++ return 0;
++
++ /* check if spectral scan bit is set. This does not have to be checked
++ * if received through a SPECTRAL phy error, but shouldn't hurt.
++ */
++ radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
++ if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
++ return 0;
++
++ chan_type = cfg80211_get_chandef_type(&sc->hw->conf.chandef);
++ if ((chan_type == NL80211_CHAN_HT40MINUS) ||
++ (chan_type == NL80211_CHAN_HT40PLUS)) {
++ fft_len = SPECTRAL_HT20_40_TOTAL_DATA_LEN;
++ num_bins = SPECTRAL_HT20_40_NUM_BINS;
++ bins = (u8 *)fft_sample_40.data;
++ } else {
++ fft_len = SPECTRAL_HT20_TOTAL_DATA_LEN;
++ num_bins = SPECTRAL_HT20_NUM_BINS;
++ bins = (u8 *)fft_sample_20.data;
+ }
+
++ /* Variation in the data length is possible and will be fixed later */
++ if ((len > fft_len + 2) || (len < fft_len - 1))
++ return 1;
+
- ibss_dbg(sdata, "sta_find_ibss: did not try to join ibss\n");
-
- /* Selected IBSS not found in current scan results - try to scan */
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -1173,6 +1173,10 @@ skip_ws_det:
- * is_on == 0 means MRC CCK is OFF (more noise imm)
- */
- bool is_on = param ? 1 : 0;
++ switch (len - fft_len) {
++ case 0:
++ /* length correct, nothing to do. */
++ memcpy(bins, vdata, num_bins);
++ break;
++ case -1:
++ /* first byte missing, duplicate it. */
++ memcpy(&bins[1], vdata, num_bins - 1);
++ bins[0] = vdata[0];
++ break;
++ case 2:
++ /* MAC added 2 extra bytes at bin 30 and 32, remove them. */
++ memcpy(bins, vdata, 30);
++ bins[30] = vdata[31];
++ memcpy(&bins[31], &vdata[33], num_bins - 31);
++ break;
++ case 1:
++ /* MAC added 2 extra bytes AND first byte is missing. */
++ bins[0] = vdata[0];
++ memcpy(&bins[1], vdata, 30);
++ bins[31] = vdata[31];
++ memcpy(&bins[32], &vdata[33], num_bins - 32);
++ break;
++ default:
++ return 1;
++ }
+
-+ if (ah->caps.rx_chainmask == 1)
-+ break;
++ /* DC value (value in the middle) is the blind spot of the spectral
++ * sample and invalid, interpolate it.
++ */
++ dc_pos = num_bins / 2;
++ bins[dc_pos] = (bins[dc_pos + 1] + bins[dc_pos - 1]) / 2;
+
- REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
- AR_PHY_MRC_CCK_ENABLE, is_on);
- REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -42,8 +42,6 @@ static void ath_rx_buf_link(struct ath_s
- struct ath_desc *ds;
- struct sk_buff *skb;
-
-- ATH_RXBUF_RESET(bf);
--
- ds = bf->bf_desc;
- ds->ds_link = 0; /* link to null */
- ds->ds_data = bf->bf_buf_addr;
-@@ -70,6 +68,14 @@ static void ath_rx_buf_link(struct ath_s
- sc->rx.rxlink = &ds->ds_link;
- }
-
-+static void ath_rx_buf_relink(struct ath_softc *sc, struct ath_buf *bf)
++ if ((chan_type == NL80211_CHAN_HT40MINUS) ||
++ (chan_type == NL80211_CHAN_HT40PLUS)) {
++ s8 lower_rssi, upper_rssi;
++ s16 ext_nf;
++ u8 lower_max_index, upper_max_index;
++ u8 lower_bitmap_w, upper_bitmap_w;
++ u16 lower_mag, upper_mag;
++ struct ath9k_hw_cal_data *caldata = ah->caldata;
++ struct ath_ht20_40_mag_info *mag_info;
++
++ if (caldata)
++ ext_nf = ath9k_hw_getchan_noise(ah, ah->curchan,
++ caldata->nfCalHist[3].privNF);
++ else
++ ext_nf = ATH_DEFAULT_NOISE_FLOOR;
++
++ length = sizeof(fft_sample_40) - sizeof(struct fft_sample_tlv);
++ fft_sample_40.tlv.type = ATH_FFT_SAMPLE_HT20_40;
++ fft_sample_40.tlv.length = __cpu_to_be16(length);
++ fft_sample_40.freq = __cpu_to_be16(freq);
++ fft_sample_40.channel_type = chan_type;
++
++ if (chan_type == NL80211_CHAN_HT40PLUS) {
++ lower_rssi = fix_rssi_inv_only(rs->rs_rssi_ctl[0]);
++ upper_rssi = fix_rssi_inv_only(rs->rs_rssi_ext[0]);
++
++ fft_sample_40.lower_noise = ah->noise;
++ fft_sample_40.upper_noise = ext_nf;
++ } else {
++ lower_rssi = fix_rssi_inv_only(rs->rs_rssi_ext[0]);
++ upper_rssi = fix_rssi_inv_only(rs->rs_rssi_ctl[0]);
++
++ fft_sample_40.lower_noise = ext_nf;
++ fft_sample_40.upper_noise = ah->noise;
++ }
++ fft_sample_40.lower_rssi = lower_rssi;
++ fft_sample_40.upper_rssi = upper_rssi;
++
++ mag_info = ((struct ath_ht20_40_mag_info *)radar_info) - 1;
++ lower_mag = spectral_max_magnitude(mag_info->lower_bins);
++ upper_mag = spectral_max_magnitude(mag_info->upper_bins);
++ fft_sample_40.lower_max_magnitude = __cpu_to_be16(lower_mag);
++ fft_sample_40.upper_max_magnitude = __cpu_to_be16(upper_mag);
++ lower_max_index = spectral_max_index(mag_info->lower_bins);
++ upper_max_index = spectral_max_index(mag_info->upper_bins);
++ fft_sample_40.lower_max_index = lower_max_index;
++ fft_sample_40.upper_max_index = upper_max_index;
++ lower_bitmap_w = spectral_bitmap_weight(mag_info->lower_bins);
++ upper_bitmap_w = spectral_bitmap_weight(mag_info->upper_bins);
++ fft_sample_40.lower_bitmap_weight = lower_bitmap_w;
++ fft_sample_40.upper_bitmap_weight = upper_bitmap_w;
++ fft_sample_40.max_exp = mag_info->max_exp & 0xf;
++
++ fft_sample_40.tsf = __cpu_to_be64(tsf);
++
++ tlv = (struct fft_sample_tlv *)&fft_sample_40;
++ } else {
++ u8 max_index, bitmap_w;
++ u16 magnitude;
++ struct ath_ht20_mag_info *mag_info;
++
++ length = sizeof(fft_sample_20) - sizeof(struct fft_sample_tlv);
++ fft_sample_20.tlv.type = ATH_FFT_SAMPLE_HT20;
++ fft_sample_20.tlv.length = __cpu_to_be16(length);
++ fft_sample_20.freq = __cpu_to_be16(freq);
++
++ fft_sample_20.rssi = fix_rssi_inv_only(rs->rs_rssi_ctl[0]);
++ fft_sample_20.noise = ah->noise;
++
++ mag_info = ((struct ath_ht20_mag_info *)radar_info) - 1;
++ magnitude = spectral_max_magnitude(mag_info->all_bins);
++ fft_sample_20.max_magnitude = __cpu_to_be16(magnitude);
++ max_index = spectral_max_index(mag_info->all_bins);
++ fft_sample_20.max_index = max_index;
++ bitmap_w = spectral_bitmap_weight(mag_info->all_bins);
++ fft_sample_20.bitmap_weight = bitmap_w;
++ fft_sample_20.max_exp = mag_info->max_exp & 0xf;
++
++ fft_sample_20.tsf = __cpu_to_be64(tsf);
++
++ tlv = (struct fft_sample_tlv *)&fft_sample_20;
++ }
++
++ ath_debug_send_fft_sample(sc, tlv);
++
++ return 1;
++}
++
++/*********************/
++/* spectral_scan_ctl */
++/*********************/
++
++static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
++ size_t count, loff_t *ppos)
+{
-+ if (sc->rx.buf_hold)
-+ ath_rx_buf_link(sc, sc->rx.buf_hold);
++ struct ath_softc *sc = file->private_data;
++ char *mode = "";
++ unsigned int len;
+
-+ sc->rx.buf_hold = bf;
++ switch (sc->spectral_mode) {
++ case SPECTRAL_DISABLED:
++ mode = "disable";
++ break;
++ case SPECTRAL_BACKGROUND:
++ mode = "background";
++ break;
++ case SPECTRAL_CHANSCAN:
++ mode = "chanscan";
++ break;
++ case SPECTRAL_MANUAL:
++ mode = "manual";
++ break;
++ }
++ len = strlen(mode);
++ return simple_read_from_buffer(user_buf, count, ppos, mode, len);
+}
+
- static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
- {
- /* XXX block beacon interrupts */
-@@ -117,7 +123,6 @@ static bool ath_rx_edma_buf_link(struct
-
- skb = bf->bf_mpdu;
-
-- ATH_RXBUF_RESET(bf);
- memset(skb->data, 0, ah->caps.rx_status_len);
- dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
- ah->caps.rx_status_len, DMA_TO_DEVICE);
-@@ -432,6 +437,7 @@ int ath_startrecv(struct ath_softc *sc)
- if (list_empty(&sc->rx.rxbuf))
- goto start_recv;
-
-+ sc->rx.buf_hold = NULL;
- sc->rx.rxlink = NULL;
- list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
- ath_rx_buf_link(sc, bf);
-@@ -677,6 +683,9 @@ static struct ath_buf *ath_get_next_rx_b
- }
-
- bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
-+ if (bf == sc->rx.buf_hold)
-+ return NULL;
++static ssize_t write_file_spec_scan_ctl(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ char buf[32];
++ ssize_t len;
++
++ if (config_enabled(CPTCFG_ATH9K_TX99))
++ return -EOPNOTSUPP;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ buf[len] = '\0';
++
++ if (strncmp("trigger", buf, 7) == 0) {
++ ath9k_spectral_scan_trigger(sc->hw);
++ } else if (strncmp("background", buf, 9) == 0) {
++ ath9k_spectral_scan_config(sc->hw, SPECTRAL_BACKGROUND);
++ ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n");
++ } else if (strncmp("chanscan", buf, 8) == 0) {
++ ath9k_spectral_scan_config(sc->hw, SPECTRAL_CHANSCAN);
++ ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n");
++ } else if (strncmp("manual", buf, 6) == 0) {
++ ath9k_spectral_scan_config(sc->hw, SPECTRAL_MANUAL);
++ ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n");
++ } else if (strncmp("disable", buf, 7) == 0) {
++ ath9k_spectral_scan_config(sc->hw, SPECTRAL_DISABLED);
++ ath_dbg(common, CONFIG, "spectral scan: disabled\n");
++ } else {
++ return -EINVAL;
++ }
++
++ return count;
++}
++
++static const struct file_operations fops_spec_scan_ctl = {
++ .read = read_file_spec_scan_ctl,
++ .write = write_file_spec_scan_ctl,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++/*************************/
++/* spectral_short_repeat */
++/*************************/
++
++static ssize_t read_file_spectral_short_repeat(struct file *file,
++ char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[32];
++ unsigned int len;
++
++ len = sprintf(buf, "%d\n", sc->spec_config.short_repeat);
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_spectral_short_repeat(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ unsigned long val;
++ char buf[32];
++ ssize_t len;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ buf[len] = '\0';
++ if (kstrtoul(buf, 0, &val))
++ return -EINVAL;
++
++ if (val < 0 || val > 1)
++ return -EINVAL;
++
++ sc->spec_config.short_repeat = val;
++ return count;
++}
++
++static const struct file_operations fops_spectral_short_repeat = {
++ .read = read_file_spectral_short_repeat,
++ .write = write_file_spectral_short_repeat,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++/******************/
++/* spectral_count */
++/******************/
+
- ds = bf->bf_desc;
++static ssize_t read_file_spectral_count(struct file *file,
++ char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[32];
++ unsigned int len;
++
++ len = sprintf(buf, "%d\n", sc->spec_config.count);
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_spectral_count(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ unsigned long val;
++ char buf[32];
++ ssize_t len;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ buf[len] = '\0';
++ if (kstrtoul(buf, 0, &val))
++ return -EINVAL;
++
++ if (val < 0 || val > 255)
++ return -EINVAL;
++
++ sc->spec_config.count = val;
++ return count;
++}
++
++static const struct file_operations fops_spectral_count = {
++ .read = read_file_spectral_count,
++ .write = write_file_spectral_count,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++/*******************/
++/* spectral_period */
++/*******************/
++
++static ssize_t read_file_spectral_period(struct file *file,
++ char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[32];
++ unsigned int len;
++
++ len = sprintf(buf, "%d\n", sc->spec_config.period);
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_spectral_period(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ unsigned long val;
++ char buf[32];
++ ssize_t len;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ buf[len] = '\0';
++ if (kstrtoul(buf, 0, &val))
++ return -EINVAL;
++
++ if (val < 0 || val > 255)
++ return -EINVAL;
++
++ sc->spec_config.period = val;
++ return count;
++}
++
++static const struct file_operations fops_spectral_period = {
++ .read = read_file_spectral_period,
++ .write = write_file_spectral_period,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++/***********************/
++/* spectral_fft_period */
++/***********************/
++
++static ssize_t read_file_spectral_fft_period(struct file *file,
++ char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ char buf[32];
++ unsigned int len;
++
++ len = sprintf(buf, "%d\n", sc->spec_config.fft_period);
++ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t write_file_spectral_fft_period(struct file *file,
++ const char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct ath_softc *sc = file->private_data;
++ unsigned long val;
++ char buf[32];
++ ssize_t len;
++
++ len = min(count, sizeof(buf) - 1);
++ if (copy_from_user(buf, user_buf, len))
++ return -EFAULT;
++
++ buf[len] = '\0';
++ if (kstrtoul(buf, 0, &val))
++ return -EINVAL;
++
++ if (val < 0 || val > 15)
++ return -EINVAL;
++
++ sc->spec_config.fft_period = val;
++ return count;
++}
++
++static const struct file_operations fops_spectral_fft_period = {
++ .read = read_file_spectral_fft_period,
++ .write = write_file_spectral_fft_period,
++ .open = simple_open,
++ .owner = THIS_MODULE,
++ .llseek = default_llseek,
++};
++
++/*******************/
++/* Relay interface */
++/*******************/
++
++static struct dentry *create_buf_file_handler(const char *filename,
++ struct dentry *parent,
++ umode_t mode,
++ struct rchan_buf *buf,
++ int *is_global)
++{
++ struct dentry *buf_file;
++
++ buf_file = debugfs_create_file(filename, mode, parent, buf,
++ &relay_file_operations);
++ *is_global = 1;
++ return buf_file;
++}
++
++static int remove_buf_file_handler(struct dentry *dentry)
++{
++ debugfs_remove(dentry);
++
++ return 0;
++}
++
++struct rchan_callbacks rfs_spec_scan_cb = {
++ .create_buf_file = create_buf_file_handler,
++ .remove_buf_file = remove_buf_file_handler,
++};
++
++/*********************/
++/* Debug Init/Deinit */
++/*********************/
++
++void ath9k_spectral_deinit_debug(struct ath_softc *sc)
++{
++ if (config_enabled(CPTCFG_ATH9K_DEBUGFS) && sc->rfs_chan_spec_scan) {
++ relay_close(sc->rfs_chan_spec_scan);
++ sc->rfs_chan_spec_scan = NULL;
++ }
++}
++
++void ath9k_spectral_init_debug(struct ath_softc *sc)
++{
++ sc->rfs_chan_spec_scan = relay_open("spectral_scan",
++ sc->debug.debugfs_phy,
++ 1024, 256, &rfs_spec_scan_cb,
++ NULL);
++ debugfs_create_file("spectral_scan_ctl",
++ S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_spec_scan_ctl);
++ debugfs_create_file("spectral_short_repeat",
++ S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_spectral_short_repeat);
++ debugfs_create_file("spectral_count",
++ S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_spectral_count);
++ debugfs_create_file("spectral_period",
++ S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_spectral_period);
++ debugfs_create_file("spectral_fft_period",
++ S_IRUSR | S_IWUSR,
++ sc->debug.debugfs_phy, sc,
++ &fops_spectral_fft_period);
++}
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/spectral.h
+@@ -0,0 +1,212 @@
++/*
++ * Copyright (c) 2013 Qualcomm Atheros, Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef SPECTRAL_H
++#define SPECTRAL_H
++
++/* enum spectral_mode:
++ *
++ * @SPECTRAL_DISABLED: spectral mode is disabled
++ * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
++ * something else.
++ * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
++ * is performed manually.
++ * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
++ * during a channel scan.
++ */
++enum spectral_mode {
++ SPECTRAL_DISABLED = 0,
++ SPECTRAL_BACKGROUND,
++ SPECTRAL_MANUAL,
++ SPECTRAL_CHANSCAN,
++};
++
++#define SPECTRAL_SCAN_BITMASK 0x10
++/* Radar info packet format, used for DFS and spectral formats. */
++struct ath_radar_info {
++ u8 pulse_length_pri;
++ u8 pulse_length_ext;
++ u8 pulse_bw_info;
++} __packed;
++
++/* The HT20 spectral data has 4 bytes of additional information at it's end.
++ *
++ * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
++ * [7:0]: all bins max_magnitude[9:2]
++ * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
++ * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
++ */
++struct ath_ht20_mag_info {
++ u8 all_bins[3];
++ u8 max_exp;
++} __packed;
++
++#define SPECTRAL_HT20_NUM_BINS 56
++
++/* WARNING: don't actually use this struct! MAC may vary the amount of
++ * data by -1/+2. This struct is for reference only.
++ */
++struct ath_ht20_fft_packet {
++ u8 data[SPECTRAL_HT20_NUM_BINS];
++ struct ath_ht20_mag_info mag_info;
++ struct ath_radar_info radar_info;
++} __packed;
++
++#define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet))
++
++/* Dynamic 20/40 mode:
++ *
++ * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
++ * [7:0]: lower bins max_magnitude[9:2]
++ * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
++ * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
++ * [7:0]: upper bins max_magnitude[9:2]
++ * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
++ * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
++ */
++struct ath_ht20_40_mag_info {
++ u8 lower_bins[3];
++ u8 upper_bins[3];
++ u8 max_exp;
++} __packed;
++
++#define SPECTRAL_HT20_40_NUM_BINS 128
++
++/* WARNING: don't actually use this struct! MAC may vary the amount of
++ * data. This struct is for reference only.
++ */
++struct ath_ht20_40_fft_packet {
++ u8 data[SPECTRAL_HT20_40_NUM_BINS];
++ struct ath_ht20_40_mag_info mag_info;
++ struct ath_radar_info radar_info;
++} __packed;
++
++
++#define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
++
++/* grabs the max magnitude from the all/upper/lower bins */
++static inline u16 spectral_max_magnitude(u8 *bins)
++{
++ return (bins[0] & 0xc0) >> 6 |
++ (bins[1] & 0xff) << 2 |
++ (bins[2] & 0x03) << 10;
++}
++
++/* return the max magnitude from the all/upper/lower bins */
++static inline u8 spectral_max_index(u8 *bins)
++{
++ s8 m = (bins[2] & 0xfc) >> 2;
++
++ /* TODO: this still doesn't always report the right values ... */
++ if (m > 32)
++ m |= 0xe0;
++ else
++ m &= ~0xe0;
++
++ return m + 29;
++}
++
++/* return the bitmap weight from the all/upper/lower bins */
++static inline u8 spectral_bitmap_weight(u8 *bins)
++{
++ return bins[0] & 0x3f;
++}
++
++/* FFT sample format given to userspace via debugfs.
++ *
++ * Please keep the type/length at the front position and change
++ * other fields after adding another sample type
++ *
++ * TODO: this might need rework when switching to nl80211-based
++ * interface.
++ */
++enum ath_fft_sample_type {
++ ATH_FFT_SAMPLE_HT20 = 1,
++ ATH_FFT_SAMPLE_HT20_40,
++};
++
++struct fft_sample_tlv {
++ u8 type; /* see ath_fft_sample */
++ __be16 length;
++ /* type dependent data follows */
++} __packed;
++
++struct fft_sample_ht20 {
++ struct fft_sample_tlv tlv;
++
++ u8 max_exp;
++
++ __be16 freq;
++ s8 rssi;
++ s8 noise;
++
++ __be16 max_magnitude;
++ u8 max_index;
++ u8 bitmap_weight;
++
++ __be64 tsf;
++
++ u8 data[SPECTRAL_HT20_NUM_BINS];
++} __packed;
++
++struct fft_sample_ht20_40 {
++ struct fft_sample_tlv tlv;
++
++ u8 channel_type;
++ __be16 freq;
++
++ s8 lower_rssi;
++ s8 upper_rssi;
++
++ __be64 tsf;
++
++ s8 lower_noise;
++ s8 upper_noise;
++
++ __be16 lower_max_magnitude;
++ __be16 upper_max_magnitude;
++
++ u8 lower_max_index;
++ u8 upper_max_index;
++
++ u8 lower_bitmap_weight;
++ u8 upper_bitmap_weight;
++
++ u8 max_exp;
++
++ u8 data[SPECTRAL_HT20_40_NUM_BINS];
++} __packed;
++
++void ath9k_spectral_init_debug(struct ath_softc *sc);
++void ath9k_spectral_deinit_debug(struct ath_softc *sc);
++
++void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
++int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
++ enum spectral_mode spectral_mode);
++
++#ifdef CPTCFG_ATH9K_DEBUGFS
++int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
++ struct ath_rx_status *rs, u64 tsf);
++#else
++static inline int ath_process_fft(struct ath_softc *sc,
++ struct ieee80211_hdr *hdr,
++ struct ath_rx_status *rs, u64 tsf)
++{
++ return 0;
++}
++#endif /* CPTCFG_ATH9K_DEBUGFS */
++
++#endif /* SPECTRAL_H */
+--- a/include/net/mac80211.h
++++ b/include/net/mac80211.h
+@@ -1566,6 +1566,9 @@ enum ieee80211_hw_flags {
+ * @extra_tx_headroom: headroom to reserve in each transmit skb
+ * for use by the driver (e.g. for transmit headers.)
+ *
++ * @extra_beacon_tailroom: tailroom to reserve in each beacon tx skb.
++ * Can be used by drivers to add extra IEs.
++ *
+ * @channel_change_time: time (in microseconds) it takes to change channels.
+ *
+ * @max_signal: Maximum value for signal (rssi) in RX information, used
+@@ -1644,6 +1647,7 @@ struct ieee80211_hw {
+ void *priv;
+ u32 flags;
+ unsigned int extra_tx_headroom;
++ unsigned int extra_beacon_tailroom;
+ int channel_change_time;
+ int vif_data_size;
+ int sta_data_size;
+@@ -4595,4 +4599,49 @@ bool ieee80211_tx_prepare_skb(struct iee
+ struct ieee80211_vif *vif, struct sk_buff *skb,
+ int band, struct ieee80211_sta **sta);
+
++/**
++ * struct ieee80211_noa_data - holds temporary data for tracking P2P NoA state
++ *
++ * @next_tsf: TSF timestamp of the next absent state change
++ * @has_next_tsf: next absent state change event pending
++ *
++ * @absent: descriptor bitmask, set if GO is currently absent
++ *
++ * private:
++ *
++ * @count: count fields from the NoA descriptors
++ * @desc: adjusted data from the NoA
++ */
++struct ieee80211_noa_data {
++ u32 next_tsf;
++ bool has_next_tsf;
++
++ u8 absent;
++
++ u8 count[IEEE80211_P2P_NOA_DESC_MAX];
++ struct {
++ u32 start;
++ u32 duration;
++ u32 interval;
++ } desc[IEEE80211_P2P_NOA_DESC_MAX];
++};
++
++/**
++ * ieee80211_parse_p2p_noa - initialize NoA tracking data from P2P IE
++ *
++ * @attr: P2P NoA IE
++ * @data: NoA tracking data
++ * @tsf: current TSF timestamp
++ */
++int ieee80211_parse_p2p_noa(const struct ieee80211_p2p_noa_attr *attr,
++ struct ieee80211_noa_data *data, u32 tsf);
++
++/**
++ * ieee80211_update_p2p_noa - get next pending P2P GO absent state change
++ *
++ * @data: NoA tracking data
++ * @tsf: current TSF timestamp
++ */
++void ieee80211_update_p2p_noa(struct ieee80211_noa_data *data, u32 tsf);
++
+ #endif /* MAC80211_H */
+--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
++++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
+@@ -49,9 +49,10 @@ static inline bool ath9k_hw_calibrate(st
+ return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
+ }
- /*
-@@ -1375,7 +1384,7 @@ requeue:
- if (edma) {
- ath_rx_edma_buf_link(sc, qtype);
- } else {
-- ath_rx_buf_link(sc, bf);
-+ ath_rx_buf_relink(sc, bf);
- ath9k_hw_rxena(ah);
- }
- } while (1);
+-static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
++static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
++ u32 *sync_cause_p)
+ {
+- return ath9k_hw_ops(ah)->get_isr(ah, masked);
++ return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
+ }
+
+ static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
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