obj-$(CPTCFG_ATH9K_HW) += ath9k_hw.o
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-@@ -581,6 +581,13 @@ static void ar9003_tx_gain_table_mode6(s
+@@ -26,6 +26,7 @@
+ #include "ar9462_2p0_initvals.h"
+ #include "ar9462_2p1_initvals.h"
+ #include "ar9565_1p0_initvals.h"
++#include "ar9565_1p1_initvals.h"
+
+ /* General hardware code for the AR9003 hadware family */
+
+@@ -187,17 +188,17 @@ static void ar9003_hw_init_mode_regs(str
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
+
+- /* Load PCIE SERDES settings from INI */
+-
+- /* Awake Setting */
+-
+- INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1);
+-
+- /* Sleep Setting */
+-
+- INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ if (ah->config.no_pll_pwrsave) {
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
++ } else {
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
++ }
+ } else if (AR_SREV_9462_21(ah)) {
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+ ar9462_2p1_mac_core);
+@@ -223,6 +224,10 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p1_modes_fast_clock);
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9462_2p1_baseband_core_txfir_coeff_japan_2484);
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9462_2p1_pciephy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9462_2p1_pciephy_clkreq_disable_L1);
+ } else if (AR_SREV_9462_20(ah)) {
+
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
+@@ -247,18 +252,18 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p0_soc_postamble);
+
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0);
++ ar9462_2p0_common_rx_gain);
+
+ /* Awake -> Sleep Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9462_pciephy_clkreq_disable_L1_2p0);
++ ar9462_2p0_pciephy_clkreq_disable_L1);
+ /* Sleep -> Awake Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9462_pciephy_clkreq_disable_L1_2p0);
++ ar9462_2p0_pciephy_clkreq_disable_L1);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9462_modes_fast_clock_2p0);
++ ar9462_2p0_modes_fast_clock);
+
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
+@@ -331,6 +336,41 @@ static void ar9003_hw_init_mode_regs(str
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+ ar9580_1p0_modes_fast_clock);
++ } else if (AR_SREV_9565_11_OR_LATER(ah)) {
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
++ ar9565_1p1_mac_core);
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
++ ar9565_1p1_mac_postamble);
++
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
++ ar9565_1p1_baseband_core);
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
++ ar9565_1p1_baseband_postamble);
++
++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
++ ar9565_1p1_radio_core);
++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
++ ar9565_1p1_radio_postamble);
++
++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
++ ar9565_1p1_soc_preamble);
++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
++ ar9565_1p1_soc_postamble);
++
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_Common_rx_gain_table);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_Modes_lowest_ob_db_tx_gain_table);
++
++ INIT_INI_ARRAY(&ah->iniPcieSerdes,
++ ar9565_1p1_pciephy_clkreq_disable_L1);
++ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
++ ar9565_1p1_pciephy_clkreq_disable_L1);
++
++ INIT_INI_ARRAY(&ah->iniModesFastClock,
++ ar9565_1p1_modes_fast_clock);
++ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++ ar9565_1p1_baseband_core_txfir_coeff_japan_2484);
+ } else if (AR_SREV_9565(ah)) {
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+ ar9565_1p0_mac_core);
+@@ -440,7 +480,10 @@ static void ar9003_tx_gain_table_mode0(s
+ ar9462_2p1_modes_low_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_low_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_low_ob_db_tx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_low_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_low_ob_db_tx_gain_table);
+@@ -474,7 +517,10 @@ static void ar9003_tx_gain_table_mode1(s
+ ar9462_2p1_modes_high_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_high_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_high_ob_db_tx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_high_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_high_ob_db_tx_gain_table);
+@@ -500,6 +546,9 @@ static void ar9003_tx_gain_table_mode2(s
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9580_1p0_low_ob_db_tx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_low_ob_db_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_low_ob_db_tx_gain_table);
+@@ -525,6 +574,9 @@ static void ar9003_tx_gain_table_mode3(s
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9580_1p0_high_power_tx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9565_1p1_modes_high_power_tx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9565_1p0_modes_high_power_tx_gain_table);
+@@ -546,7 +598,7 @@ static void ar9003_tx_gain_table_mode4(s
+ ar9462_2p1_modes_mix_ob_db_tx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_mix_ob_db_tx_gain_table_2p0);
++ ar9462_2p0_modes_mix_ob_db_tx_gain);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
+@@ -581,6 +633,13 @@ static void ar9003_tx_gain_table_mode6(s
ar9580_1p0_type6_tx_gain_table);
}
typedef void (*ath_txgain_tab)(struct ath_hw *ah);
static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
-@@ -593,6 +600,7 @@ static void ar9003_tx_gain_table_apply(s
+@@ -593,6 +652,7 @@ static void ar9003_tx_gain_table_apply(s
ar9003_tx_gain_table_mode4,
ar9003_tx_gain_table_mode5,
ar9003_tx_gain_table_mode6,
};
int idx = ar9003_hw_get_tx_gain_idx(ah);
-@@ -750,6 +758,9 @@ static void ar9003_hw_init_mode_gain_reg
+@@ -629,7 +689,10 @@ static void ar9003_rx_gain_table_mode0(s
+ ar9462_2p1_common_rx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0);
++ ar9462_2p0_common_rx_gain);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_Common_rx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9565_1p0_Common_rx_gain_table);
+@@ -657,7 +720,7 @@ static void ar9003_rx_gain_table_mode1(s
+ ar9462_2p1_common_wo_xlna_rx_gain);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_wo_xlna_rx_gain_table_2p0);
++ ar9462_2p0_common_wo_xlna_rx_gain);
+ else if (AR_SREV_9550(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar955x_1p0_common_wo_xlna_rx_gain_table);
+@@ -666,6 +729,9 @@ static void ar9003_rx_gain_table_mode1(s
+ } else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9580_1p0_wo_xlna_rx_gain_table);
++ else if (AR_SREV_9565_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesRxGain,
++ ar9565_1p1_common_wo_xlna_rx_gain_table);
+ else if (AR_SREV_9565(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+ ar9565_1p0_common_wo_xlna_rx_gain_table);
+@@ -687,7 +753,7 @@ static void ar9003_rx_gain_table_mode2(s
+ ar9462_2p1_baseband_postamble_5g_xlna);
+ } else if (AR_SREV_9462_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_mixed_rx_gain_table_2p0);
++ ar9462_2p0_common_mixed_rx_gain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_core,
+ ar9462_2p0_baseband_core_mix_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_postamble,
+@@ -701,12 +767,12 @@ static void ar9003_rx_gain_table_mode3(s
+ {
+ if (AR_SREV_9462_21(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_2p1_common_5g_xlna_only_rx_gain);
++ ar9462_2p1_common_5g_xlna_only_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
+ ar9462_2p1_baseband_postamble_5g_xlna);
+ } else if (AR_SREV_9462_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_2p0_5g_xlna_only_rxgain);
++ ar9462_2p0_common_5g_xlna_only_rxgain);
+ INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
+ ar9462_2p0_baseband_postamble_5g_xlna);
+ }
+@@ -750,6 +816,9 @@ static void ar9003_hw_init_mode_gain_reg
static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
bool power_off)
{
/*
* Increase L1 Entry Latency. Some WB222 boards don't have
* this change in eeprom/OTP.
-@@ -775,18 +786,13 @@ static void ar9003_hw_configpcipowersave
+@@ -775,18 +844,13 @@ static void ar9003_hw_configpcipowersave
* Configire PCIE after Ini init. SERDES values now come from ini file
* This enables PCIe low power mode.
*/
/*******************************/
/* Antenna diversity/combining */
/*******************************/
-@@ -723,6 +752,7 @@ struct ath_softc {
+@@ -632,15 +661,16 @@ void ath_ant_comb_scan(struct ath_softc
+ /* Main driver core */
+ /********************/
+
+-#define ATH9K_PCI_CUS198 0x0001
+-#define ATH9K_PCI_CUS230 0x0002
+-#define ATH9K_PCI_CUS217 0x0004
+-#define ATH9K_PCI_CUS252 0x0008
+-#define ATH9K_PCI_WOW 0x0010
+-#define ATH9K_PCI_BT_ANT_DIV 0x0020
+-#define ATH9K_PCI_D3_L1_WAR 0x0040
+-#define ATH9K_PCI_AR9565_1ANT 0x0080
+-#define ATH9K_PCI_AR9565_2ANT 0x0100
++#define ATH9K_PCI_CUS198 0x0001
++#define ATH9K_PCI_CUS230 0x0002
++#define ATH9K_PCI_CUS217 0x0004
++#define ATH9K_PCI_CUS252 0x0008
++#define ATH9K_PCI_WOW 0x0010
++#define ATH9K_PCI_BT_ANT_DIV 0x0020
++#define ATH9K_PCI_D3_L1_WAR 0x0040
++#define ATH9K_PCI_AR9565_1ANT 0x0080
++#define ATH9K_PCI_AR9565_2ANT 0x0100
++#define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
+
+ /*
+ * Default cache line size, in bytes.
+@@ -723,6 +753,7 @@ struct ath_softc {
struct work_struct hw_check_work;
struct work_struct hw_reset_work;
struct completion paprd_complete;
unsigned int hw_busy_count;
unsigned long sc_flags;
-@@ -759,6 +789,7 @@ struct ath_softc {
+@@ -759,6 +790,7 @@ struct ath_softc {
struct delayed_work tx_complete_work;
struct delayed_work hw_pll_work;
struct timer_list rx_poll_timer;
#ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
struct ath_btcoex btcoex;
-@@ -783,7 +814,7 @@ struct ath_softc {
+@@ -783,7 +815,7 @@ struct ath_softc {
bool tx99_state;
s16 tx99_power;
atomic_t wow_got_bmiss_intr;
atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
u32 wow_intr_before_sleep;
-@@ -946,10 +977,25 @@ struct fft_sample_ht20_40 {
+@@ -946,10 +978,25 @@ struct fft_sample_ht20_40 {
u8 data[SPECTRAL_HT20_40_NUM_BINS];
} __packed;
void ath9k_tasklet(unsigned long data);
int ath_cabq_update(struct ath_softc *);
-@@ -966,6 +1012,9 @@ extern bool is_ath9k_unloaded;
+@@ -966,6 +1013,9 @@ extern bool is_ath9k_unloaded;
u8 ath9k_parse_mpdudensity(u8 mpdudensity);
irqreturn_t ath_isr(int irq, void *dev);
}
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -454,7 +454,6 @@ static void ath9k_hw_init_config(struct
+@@ -17,6 +17,7 @@
+ #include <linux/io.h>
+ #include <linux/slab.h>
+ #include <linux/module.h>
++#include <linux/time.h>
+ #include <asm/unaligned.h>
+
+ #include "hw.h"
+@@ -454,7 +455,6 @@ static void ath9k_hw_init_config(struct
}
ah->config.rx_intr_mitigation = true;
/*
* We need this for PCI devices only (Cardbus, PCI, miniPCI)
+@@ -1502,8 +1502,9 @@ static bool ath9k_hw_channel_change(stru
+ int r;
+
+ if (pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) {
+- band_switch = IS_CHAN_5GHZ(ah->curchan) != IS_CHAN_5GHZ(chan);
+- mode_diff = (chan->channelFlags != ah->curchan->channelFlags);
++ u32 flags_diff = chan->channelFlags ^ ah->curchan->channelFlags;
++ band_switch = !!(flags_diff & CHANNEL_5GHZ);
++ mode_diff = !!(flags_diff & ~CHANNEL_HT);
+ }
+
+ for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
+@@ -1815,7 +1816,7 @@ static int ath9k_hw_do_fastcc(struct ath
+ * If cross-band fcc is not supoprted, bail out if channelFlags differ.
+ */
+ if (!(pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) &&
+- chan->channelFlags != ah->curchan->channelFlags)
++ ((chan->channelFlags ^ ah->curchan->channelFlags) & ~CHANNEL_HT))
+ goto fail;
+
+ if (!ath9k_hw_check_alive(ah))
+@@ -1856,10 +1857,12 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ struct ath9k_hw_cal_data *caldata, bool fastcc)
+ {
+ struct ath_common *common = ath9k_hw_common(ah);
++ struct timespec ts;
+ u32 saveLedState;
+ u32 saveDefAntenna;
+ u32 macStaId1;
+ u64 tsf = 0;
++ s64 usec = 0;
+ int r;
+ bool start_mci_reset = false;
+ bool save_fullsleep = ah->chip_fullsleep;
+@@ -1902,10 +1905,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+
+ macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
+
+- /* For chips on which RTC reset is done, save TSF before it gets cleared */
+- if (AR_SREV_9100(ah) ||
+- (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
+- tsf = ath9k_hw_gettsf64(ah);
++ /* Save TSF before chip reset, a cold reset clears it */
++ tsf = ath9k_hw_gettsf64(ah);
++ getrawmonotonic(&ts);
++ usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000;
+
+ saveLedState = REG_READ(ah, AR_CFG_LED) &
+ (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
+@@ -1938,8 +1941,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ }
+
+ /* Restore TSF */
+- if (tsf)
+- ath9k_hw_settsf64(ah, tsf);
++ getrawmonotonic(&ts);
++ usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000 - usec;
++ ath9k_hw_settsf64(ah, tsf + usec);
+
+ if (AR_SREV_9280_20_OR_LATER(ah))
+ REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -283,7 +283,6 @@ struct ath9k_ops_config {
u8 pcie_clock_req;
u32 pcie_waen;
u8 analog_shiftreg;
-@@ -920,7 +919,7 @@ struct ath_hw {
+@@ -316,6 +315,7 @@ struct ath9k_ops_config {
+ u32 ant_ctrl_comm2g_switch_enable;
+ bool xatten_margin_cfg;
+ bool alt_mingainidx;
++ bool no_pll_pwrsave;
+ };
+
+ enum ath9k_int {
+@@ -920,7 +920,7 @@ struct ath_hw {
/* Enterprise mode cap */
u32 ent_mode;
u32 wow_event_mask;
#endif
bool is_clk_25mhz;
-@@ -1126,7 +1125,7 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw
+@@ -1126,7 +1126,7 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw
#endif /* CPTCFG_ATH9K_BTCOEX_SUPPORT */
u8 *user_mask, int pattern_count,
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -683,6 +683,7 @@ static int ath9k_init_softc(u16 devid, s
+@@ -609,6 +609,11 @@ static void ath9k_init_platform(struct a
+ ah->config.pcie_waen = 0x0040473b;
+ ath_info(common, "Enable WAR for ASPM D3/L1\n");
+ }
++
++ if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
++ ah->config.no_pll_pwrsave = true;
++ ath_info(common, "Disable PLL PowerSave\n");
++ }
+ }
+
+ static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
+@@ -683,6 +688,7 @@ static int ath9k_init_softc(u16 devid, s
common = ath9k_hw_common(ah);
sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
sc->tx99_power = MAX_RATE_POWER + 1;
if (!pdata) {
ah->ah_flags |= AH_USE_EEPROM;
-@@ -730,6 +731,7 @@ static int ath9k_init_softc(u16 devid, s
+@@ -730,6 +736,7 @@ static int ath9k_init_softc(u16 devid, s
tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
(unsigned long)sc);
INIT_WORK(&sc->hw_reset_work, ath_reset_work);
INIT_WORK(&sc->hw_check_work, ath_hw_check);
INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
-@@ -862,20 +864,11 @@ static const struct ieee80211_iface_comb
+@@ -845,7 +852,8 @@ static const struct ieee80211_iface_limi
+ };
+
+ static const struct ieee80211_iface_limit if_dfs_limits[] = {
+- { .max = 1, .types = BIT(NL80211_IFTYPE_AP) },
++ { .max = 1, .types = BIT(NL80211_IFTYPE_AP) |
++ BIT(NL80211_IFTYPE_ADHOC) },
+ };
+
+ static const struct ieee80211_iface_combination if_comb[] = {
+@@ -862,20 +870,11 @@ static const struct ieee80211_iface_comb
.max_interfaces = 1,
.num_different_channels = 1,
.beacon_int_infra_match = true,
void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
{
struct ath_hw *ah = sc->sc_ah;
-@@ -925,16 +918,6 @@ void ath9k_set_hw_capab(struct ath_softc
+@@ -925,16 +924,6 @@ void ath9k_set_hw_capab(struct ath_softc
hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ;
hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
hw->queues = 4;
hw->max_rates = 4;
hw->channel_change_time = 5000;
-@@ -960,6 +943,7 @@ void ath9k_set_hw_capab(struct ath_softc
+@@ -960,6 +949,7 @@ void ath9k_set_hw_capab(struct ath_softc
hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
&sc->sbands[IEEE80211_BAND_5GHZ];
ath9k_reload_chainmask_settings(sc);
SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
-@@ -1058,6 +1042,7 @@ static void ath9k_deinit_softc(struct at
+@@ -1058,6 +1048,7 @@ static void ath9k_deinit_softc(struct at
if (ATH_TXQ_SETUP(sc, i))
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
enum nl80211_radar_event event, gfp_t gfp);
+@@ -4282,7 +4283,8 @@ bool cfg80211_reg_can_beacon(struct wiph
+ * @dev: the device which switched channels
+ * @chandef: the new channel definition
+ *
+- * Acquires wdev_lock, so must only be called from sleepable driver context!
++ * Caller must acquire wdev_lock, therefore must only be called from sleepable
++ * driver context!
+ */
+ void cfg80211_ch_switch_notify(struct net_device *dev,
+ struct cfg80211_chan_def *chandef);
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
-@@ -1508,6 +1508,9 @@ enum nl80211_commands {
+@@ -1508,6 +1508,12 @@ enum nl80211_commands {
* to react to radar events, e.g. initiate a channel switch or leave the
* IBSS network.
*
-+ * @NL80211_ATTR_SUPPORT_5_10_MHZ: A flag indicating that the device supports
-+ * 5 MHz and 10 MHz channel bandwidth.
++ * @NL80211_ATTR_SUPPORT_5_MHZ: A flag indicating that the device supports
++ * 5 MHz channel bandwidth.
++ *
++ * @NL80211_ATTR_SUPPORT_10_MHZ: A flag indicating that the device supports
++ * 10 MHz channel bandwidth.
+ *
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
*/
-@@ -1824,6 +1827,8 @@ enum nl80211_attrs {
+@@ -1824,6 +1830,9 @@ enum nl80211_attrs {
NL80211_ATTR_HANDLE_DFS,
-+ NL80211_ATTR_SUPPORT_5_10_MHZ,
++ NL80211_ATTR_SUPPORT_5_MHZ,
++ NL80211_ATTR_SUPPORT_10_MHZ,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
-@@ -2224,10 +2229,9 @@ enum nl80211_band_attr {
+@@ -2224,10 +2233,9 @@ enum nl80211_band_attr {
* @NL80211_FREQUENCY_ATTR_FREQ: Frequency in MHz
* @NL80211_FREQUENCY_ATTR_DISABLED: Channel is disabled in current
* regulatory domain.
* @NL80211_FREQUENCY_ATTR_RADAR: Radar detection is mandatory
* on this channel in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_MAX_TX_POWER: Maximum transmission power in mBm
-@@ -2254,8 +2258,8 @@ enum nl80211_frequency_attr {
+@@ -2254,8 +2262,8 @@ enum nl80211_frequency_attr {
__NL80211_FREQUENCY_ATTR_INVALID,
NL80211_FREQUENCY_ATTR_FREQ,
NL80211_FREQUENCY_ATTR_DISABLED,
NL80211_FREQUENCY_ATTR_RADAR,
NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
NL80211_FREQUENCY_ATTR_DFS_STATE,
-@@ -2271,6 +2275,9 @@ enum nl80211_frequency_attr {
+@@ -2271,6 +2279,9 @@ enum nl80211_frequency_attr {
};
#define NL80211_FREQUENCY_ATTR_MAX_TX_POWER NL80211_FREQUENCY_ATTR_MAX_TX_POWER
/**
* enum nl80211_bitrate_attr - bitrate attributes
-@@ -2413,8 +2420,9 @@ enum nl80211_sched_scan_match_attr {
+@@ -2413,8 +2424,9 @@ enum nl80211_sched_scan_match_attr {
* @NL80211_RRF_DFS: DFS support is required to be used
* @NL80211_RRF_PTP_ONLY: this is only for Point To Point links
* @NL80211_RRF_PTMP_ONLY: this is only for Point To Multi Point links
*/
enum nl80211_reg_rule_flags {
NL80211_RRF_NO_OFDM = 1<<0,
-@@ -2424,10 +2432,17 @@ enum nl80211_reg_rule_flags {
+@@ -2424,10 +2436,17 @@ enum nl80211_reg_rule_flags {
NL80211_RRF_DFS = 1<<4,
NL80211_RRF_PTP_ONLY = 1<<5,
NL80211_RRF_PTMP_ONLY = 1<<6,
*
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
-@@ -1050,6 +1050,7 @@ static int ieee80211_stop_ap(struct wiph
+@@ -846,7 +846,7 @@ static int ieee80211_set_probe_resp(stru
+ if (!resp || !resp_len)
+ return 1;
+
+- old = rtnl_dereference(sdata->u.ap.probe_resp);
++ old = sdata_dereference(sdata->u.ap.probe_resp, sdata);
+
+ new = kzalloc(sizeof(struct probe_resp) + resp_len, GFP_KERNEL);
+ if (!new)
+@@ -870,7 +870,8 @@ int ieee80211_assign_beacon(struct ieee8
+ int size, err;
+ u32 changed = BSS_CHANGED_BEACON;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
++
+
+ /* Need to have a beacon head if we don't have one yet */
+ if (!params->head && !old)
+@@ -947,7 +948,7 @@ static int ieee80211_start_ap(struct wip
+ BSS_CHANGED_P2P_PS;
+ int err;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
+ if (old)
+ return -EALREADY;
+
+@@ -1001,7 +1002,8 @@ static int ieee80211_start_ap(struct wip
+
+ err = drv_start_ap(sdata->local, sdata);
+ if (err) {
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
++
+ if (old)
+ kfree_rcu(old, rcu_head);
+ RCU_INIT_POINTER(sdata->u.ap.beacon, NULL);
+@@ -1032,7 +1034,7 @@ static int ieee80211_change_beacon(struc
+ if (sdata->vif.csa_active)
+ return -EBUSY;
+
+- old = rtnl_dereference(sdata->u.ap.beacon);
++ old = sdata_dereference(sdata->u.ap.beacon, sdata);
+ if (!old)
+ return -ENOENT;
+
+@@ -1050,15 +1052,18 @@ static int ieee80211_stop_ap(struct wiph
struct ieee80211_local *local = sdata->local;
struct beacon_data *old_beacon;
struct probe_resp *old_probe_resp;
+ struct cfg80211_chan_def chandef;
- old_beacon = rtnl_dereference(sdata->u.ap.beacon);
+- old_beacon = rtnl_dereference(sdata->u.ap.beacon);
++ old_beacon = sdata_dereference(sdata->u.ap.beacon, sdata);
if (!old_beacon)
-@@ -1091,8 +1092,10 @@ static int ieee80211_stop_ap(struct wiph
+ return -ENOENT;
+- old_probe_resp = rtnl_dereference(sdata->u.ap.probe_resp);
++ old_probe_resp = sdata_dereference(sdata->u.ap.probe_resp, sdata);
+
+ /* abort any running channel switch */
+ sdata->vif.csa_active = false;
+- cancel_work_sync(&sdata->csa_finalize_work);
++ kfree(sdata->u.ap.next_beacon);
++ sdata->u.ap.next_beacon = NULL;
++
+ cancel_work_sync(&sdata->u.ap.request_smps_work);
+
+ /* turn off carrier for this interface and dependent VLANs */
+@@ -1091,8 +1096,10 @@ static int ieee80211_stop_ap(struct wiph
ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED);
if (sdata->wdev.cac_started) {
GFP_KERNEL);
}
+@@ -1368,7 +1375,7 @@ static int sta_apply_parameters(struct i
+ changed |=
+ ieee80211_mps_set_sta_local_pm(sta,
+ params->local_pm);
+- ieee80211_bss_info_change_notify(sdata, changed);
++ ieee80211_mbss_info_change_notify(sdata, changed);
+ #endif
+ }
+
+@@ -1953,7 +1960,7 @@ static int ieee80211_change_bss(struct w
+ enum ieee80211_band band;
+ u32 changed = 0;
+
+- if (!rtnl_dereference(sdata->u.ap.beacon))
++ if (!sdata_dereference(sdata->u.ap.beacon, sdata))
+ return -ENOENT;
+
+ band = ieee80211_get_sdata_band(sdata);
+@@ -2964,27 +2971,33 @@ void ieee80211_csa_finalize_work(struct
+ struct ieee80211_local *local = sdata->local;
+ int err, changed = 0;
+
++ sdata_lock(sdata);
++ /* AP might have been stopped while waiting for the lock. */
++ if (!sdata->vif.csa_active)
++ goto unlock;
++
+ if (!ieee80211_sdata_running(sdata))
+- return;
++ goto unlock;
+
+ sdata->radar_required = sdata->csa_radar_required;
+- err = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
+- &changed);
++ err = ieee80211_vif_change_channel(sdata, &changed);
+ if (WARN_ON(err < 0))
+- return;
++ goto unlock;
+
+ if (!local->use_chanctx) {
+- local->_oper_chandef = local->csa_chandef;
++ local->_oper_chandef = sdata->csa_chandef;
+ ieee80211_hw_config(local, 0);
+ }
+
+ ieee80211_bss_info_change_notify(sdata, changed);
+
++ sdata->vif.csa_active = false;
+ switch (sdata->vif.type) {
+ case NL80211_IFTYPE_AP:
+ err = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon);
+ if (err < 0)
+- return;
++ goto unlock;
++
+ changed |= err;
+ kfree(sdata->u.ap.next_beacon);
+ sdata->u.ap.next_beacon = NULL;
+@@ -2998,20 +3011,22 @@ void ieee80211_csa_finalize_work(struct
+ case NL80211_IFTYPE_MESH_POINT:
+ err = ieee80211_mesh_finish_csa(sdata);
+ if (err < 0)
+- return;
++ goto unlock;
+ break;
+ #endif
+ default:
+ WARN_ON(1);
+- return;
++ goto unlock;
+ }
+- sdata->vif.csa_active = false;
+
+ ieee80211_wake_queues_by_reason(&sdata->local->hw,
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- cfg80211_ch_switch_notify(sdata->dev, &local->csa_chandef);
++ cfg80211_ch_switch_notify(sdata->dev, &sdata->csa_chandef);
++
++unlock:
++ sdata_unlock(sdata);
+ }
+
+ static int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
+@@ -3024,6 +3039,8 @@ static int ieee80211_channel_switch(stru
+ struct ieee80211_if_mesh __maybe_unused *ifmsh;
+ int err, num_chanctx;
+
++ lockdep_assert_held(&sdata->wdev.mtx);
++
+ if (!list_empty(&local->roc_list) || local->scanning)
+ return -EBUSY;
+
+@@ -3120,9 +3137,17 @@ static int ieee80211_channel_switch(stru
+ params->chandef.chan->band)
+ return -EINVAL;
+
++ ifmsh->chsw_init = true;
++ if (!ifmsh->pre_value)
++ ifmsh->pre_value = 1;
++ else
++ ifmsh->pre_value++;
++
+ err = ieee80211_mesh_csa_beacon(sdata, params, true);
+- if (err < 0)
++ if (err < 0) {
++ ifmsh->chsw_init = false;
+ return err;
++ }
+ break;
+ #endif
+ default:
+@@ -3136,7 +3161,7 @@ static int ieee80211_channel_switch(stru
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- local->csa_chandef = params->chandef;
++ sdata->csa_chandef = params->chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
@@ -749,6 +749,7 @@ static void ieee80211_do_stop(struct iee
break;
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
-@@ -1398,10 +1398,12 @@ void ieee80211_dfs_cac_timer_work(struct
+@@ -886,8 +886,7 @@ static void ieee80211_chswitch_work(stru
+ if (!ifmgd->associated)
+ goto out;
+
+- ret = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
+- &changed);
++ ret = ieee80211_vif_change_channel(sdata, &changed);
+ if (ret) {
+ sdata_info(sdata,
+ "vif channel switch failed, disconnecting\n");
+@@ -897,7 +896,7 @@ static void ieee80211_chswitch_work(stru
+ }
+
+ if (!local->use_chanctx) {
+- local->_oper_chandef = local->csa_chandef;
++ local->_oper_chandef = sdata->csa_chandef;
+ /* Call "hw_config" only if doing sw channel switch.
+ * Otherwise update the channel directly
+ */
+@@ -908,7 +907,7 @@ static void ieee80211_chswitch_work(stru
+ }
+
+ /* XXX: shouldn't really modify cfg80211-owned data! */
+- ifmgd->associated->channel = local->csa_chandef.chan;
++ ifmgd->associated->channel = sdata->csa_chandef.chan;
+
+ /* XXX: wait for a beacon first? */
+ ieee80211_wake_queues_by_reason(&local->hw,
+@@ -1035,7 +1034,7 @@ ieee80211_sta_process_chanswitch(struct
+ }
+ mutex_unlock(&local->chanctx_mtx);
+
+- local->csa_chandef = csa_ie.chandef;
++ sdata->csa_chandef = csa_ie.chandef;
+
+ if (csa_ie.mode)
+ ieee80211_stop_queues_by_reason(&local->hw,
+@@ -1398,10 +1397,12 @@ void ieee80211_dfs_cac_timer_work(struct
struct ieee80211_sub_if_data *sdata =
container_of(delayed_work, struct ieee80211_sub_if_data,
dfs_cac_timer_work);
/* check if we already stored this frame */
if (tid_agg_rx->reorder_buf[index]) {
+@@ -911,7 +903,8 @@ static void ieee80211_rx_reorder_ampdu(s
+ u16 sc;
+ u8 tid, ack_policy;
+
+- if (!ieee80211_is_data_qos(hdr->frame_control))
++ if (!ieee80211_is_data_qos(hdr->frame_control) ||
++ is_multicast_ether_addr(hdr->addr1))
+ goto dont_reorder;
+
+ /*
--- a/net/mac80211/scan.c
+++ b/net/mac80211/scan.c
@@ -526,7 +526,7 @@ static int __ieee80211_start_scan(struct
NL80211_RADAR_CAC_ABORTED,
GFP_KERNEL);
}
+@@ -2459,14 +2462,9 @@ int ieee80211_send_action_csa(struct iee
+ WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT : 0x00;
+ put_unaligned_le16(WLAN_REASON_MESH_CHAN, pos); /* Reason Cd */
+ pos += 2;
+- if (!ifmsh->pre_value)
+- ifmsh->pre_value = 1;
+- else
+- ifmsh->pre_value++;
+ pre_value = cpu_to_le16(ifmsh->pre_value);
+ memcpy(pos, &pre_value, 2); /* Precedence Value */
+ pos += 2;
+- ifmsh->chsw_init = true;
+ }
+
+ ieee80211_tx_skb(sdata, skb);
--- a/net/wireless/chan.c
+++ b/net/wireless/chan.c
@@ -277,6 +277,32 @@ void cfg80211_set_dfs_state(struct wiphy
if (chan->flags & IEEE80211_CHAN_RADAR) {
if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR))
goto nla_put_failure;
-@@ -1229,7 +1229,7 @@ static int nl80211_send_wiphy(struct cfg
+@@ -1229,7 +1229,8 @@ static int nl80211_send_wiphy(struct cfg
nla_put_flag(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP))
goto nla_put_failure;
if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ) &&
- nla_put_flag(msg, WIPHY_FLAG_SUPPORTS_5_10_MHZ))
-+ nla_put_flag(msg, NL80211_ATTR_SUPPORT_5_10_MHZ))
++ (nla_put_flag(msg, NL80211_ATTR_SUPPORT_5_MHZ) ||
++ nla_put_flag(msg, NL80211_ATTR_SUPPORT_10_MHZ)))
goto nla_put_failure;
state->split_start++;
-@@ -2170,7 +2170,7 @@ static inline u64 wdev_id(struct wireles
+@@ -2170,7 +2171,7 @@ static inline u64 wdev_id(struct wireles
}
static int nl80211_send_chandef(struct sk_buff *msg,
{
WARN_ON(!cfg80211_chandef_valid(chandef));
-@@ -5653,7 +5653,7 @@ static int nl80211_start_radar_detection
+@@ -3219,6 +3220,7 @@ static int nl80211_start_ap(struct sk_bu
+ return PTR_ERR(params.acl);
+ }
+
++ wdev_lock(wdev);
+ err = rdev_start_ap(rdev, dev, ¶ms);
+ if (!err) {
+ wdev->preset_chandef = params.chandef;
+@@ -3227,6 +3229,7 @@ static int nl80211_start_ap(struct sk_bu
+ wdev->ssid_len = params.ssid_len;
+ memcpy(wdev->ssid, params.ssid, wdev->ssid_len);
+ }
++ wdev_unlock(wdev);
+
+ kfree(params.acl);
+
+@@ -3255,7 +3258,11 @@ static int nl80211_set_beacon(struct sk_
+ if (err)
+ return err;
+
+- return rdev_change_beacon(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_change_beacon(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static int nl80211_stop_ap(struct sk_buff *skb, struct genl_info *info)
+@@ -4461,7 +4468,9 @@ static int nl80211_set_bss(struct sk_buf
+ {
+ struct cfg80211_registered_device *rdev = info->user_ptr[0];
+ struct net_device *dev = info->user_ptr[1];
++ struct wireless_dev *wdev = dev->ieee80211_ptr;
+ struct bss_parameters params;
++ int err;
+
+ memset(¶ms, 0, sizeof(params));
+ /* default to not changing parameters */
+@@ -4527,7 +4536,11 @@ static int nl80211_set_bss(struct sk_buf
+ dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
+ return -EOPNOTSUPP;
+
+- return rdev_change_bss(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_change_bss(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static const struct nla_policy reg_rule_policy[NL80211_REG_RULE_ATTR_MAX + 1] = {
+@@ -5653,7 +5666,7 @@ static int nl80211_start_radar_detection
if (err == 0)
return -EINVAL;
return -EINVAL;
if (!rdev->ops->start_radar_detection)
-@@ -10882,7 +10882,7 @@ EXPORT_SYMBOL(cfg80211_cqm_txe_notify);
+@@ -5793,7 +5806,11 @@ skip_beacons:
+ if (info->attrs[NL80211_ATTR_CH_SWITCH_BLOCK_TX])
+ params.block_tx = true;
+
+- return rdev_channel_switch(rdev, dev, ¶ms);
++ wdev_lock(wdev);
++ err = rdev_channel_switch(rdev, dev, ¶ms);
++ wdev_unlock(wdev);
++
++ return err;
+ }
+
+ static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
+@@ -10809,21 +10826,18 @@ void cfg80211_ch_switch_notify(struct ne
+ struct wiphy *wiphy = wdev->wiphy;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+
+- trace_cfg80211_ch_switch_notify(dev, chandef);
++ ASSERT_WDEV_LOCK(wdev);
+
+- wdev_lock(wdev);
++ trace_cfg80211_ch_switch_notify(dev, chandef);
+
+ if (WARN_ON(wdev->iftype != NL80211_IFTYPE_AP &&
+ wdev->iftype != NL80211_IFTYPE_P2P_GO &&
+ wdev->iftype != NL80211_IFTYPE_ADHOC &&
+ wdev->iftype != NL80211_IFTYPE_MESH_POINT))
+- goto out;
++ return;
+
+ wdev->channel = chandef->chan;
+ nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL);
+-out:
+- wdev_unlock(wdev);
+- return;
+ }
+ EXPORT_SYMBOL(cfg80211_ch_switch_notify);
+
+@@ -10882,7 +10896,7 @@ EXPORT_SYMBOL(cfg80211_cqm_txe_notify);
void
nl80211_radar_notify(struct cfg80211_registered_device *rdev,
+ sc->debug.debugfs_phy, sc,
+ &fops_tx99_power);
+}
+--- a/drivers/net/wireless/ath/ath9k/dfs_debug.c
++++ b/drivers/net/wireless/ath/ath9k/dfs_debug.c
+@@ -44,14 +44,20 @@ static ssize_t read_file_dfs(struct file
+ if (buf == NULL)
+ return -ENOMEM;
+
+- if (sc->dfs_detector)
+- dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
+-
+ len += scnprintf(buf + len, size - len, "DFS support for "
+ "macVersion = 0x%x, macRev = 0x%x: %s\n",
+ hw_ver->macVersion, hw_ver->macRev,
+ (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_DFS) ?
+ "enabled" : "disabled");
++
++ if (!sc->dfs_detector) {
++ len += scnprintf(buf + len, size - len,
++ "DFS detector not enabled\n");
++ goto exit;
++ }
++
++ dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
++
+ len += scnprintf(buf + len, size - len, "Pulse detector statistics:\n");
+ ATH9K_DFS_STAT("pulse events reported ", pulses_total);
+ ATH9K_DFS_STAT("invalid pulse events ", pulses_no_dfs);
+@@ -76,6 +82,7 @@ static ssize_t read_file_dfs(struct file
+ ATH9K_DFS_POOL_STAT("Seqs. alloc error ", pseq_alloc_error);
+ ATH9K_DFS_POOL_STAT("Seqs. in use ", pseq_used);
+
++exit:
+ if (len > size)
+ len = size;
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struc
+ else
+ ah->enabled_cals &= ~TX_IQ_CAL;
+
+- if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
+- ah->enabled_cals |= TX_CL_CAL;
+- else
+- ah->enabled_cals &= ~TX_CL_CAL;
+ }
++
++ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
++ ah->enabled_cals |= TX_CL_CAL;
++ else
++ ah->enabled_cals &= ~TX_CL_CAL;
+ }
+
+ static void ar9003_hw_prog_ini(struct ath_hw *ah,
+@@ -701,6 +702,54 @@ static int ar9550_hw_get_modes_txgain_in
+ return ret;
+ }
+
++static void ar9003_doubler_fix(struct ath_hw *ah)
++{
++ if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
++ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
++
++ udelay(200);
++
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++ REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
++
++ udelay(1);
++
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
++ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
++
++ udelay(200);
++
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
++ AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
++
++ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
++ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
++ }
++}
++
+ static int ar9003_hw_process_ini(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+@@ -726,6 +775,8 @@ static int ar9003_hw_process_ini(struct
+ modesIndex);
+ }
+
++ ar9003_doubler_fix(ah);
++
+ /*
+ * RXGAIN initvals.
+ */
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -656,13 +656,24 @@
+ #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
+ #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
+ #define AR_PHY_65NM_CH0_SYNTH7 0x16098
++#define AR_PHY_65NM_CH0_SYNTH12 0x160ac
+ #define AR_PHY_65NM_CH0_BIAS1 0x160c0
+ #define AR_PHY_65NM_CH0_BIAS2 0x160c4
+ #define AR_PHY_65NM_CH0_BIAS4 0x160cc
++#define AR_PHY_65NM_CH0_RXTX2 0x16104
++#define AR_PHY_65NM_CH1_RXTX2 0x16504
++#define AR_PHY_65NM_CH2_RXTX2 0x16904
+ #define AR_PHY_65NM_CH0_RXTX4 0x1610c
+ #define AR_PHY_65NM_CH1_RXTX4 0x1650c
+ #define AR_PHY_65NM_CH2_RXTX4 0x1690c
+
++#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3 0x00780000
++#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S 19
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK 0x00000004
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S 2
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK 0x00000008
++#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S 3
++
+ #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
+ (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
+ #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
+--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
++++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
+@@ -181,6 +181,7 @@ static void rt2x00lib_autowakeup(struct
+ static void rt2x00lib_bc_buffer_iter(void *data, u8 *mac,
+ struct ieee80211_vif *vif)
+ {
++ struct ieee80211_tx_control control = {};
+ struct rt2x00_dev *rt2x00dev = data;
+ struct sk_buff *skb;
+
+@@ -195,7 +196,7 @@ static void rt2x00lib_bc_buffer_iter(voi
+ */
+ skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
+ while (skb) {
+- rt2x00mac_tx(rt2x00dev->hw, NULL, skb);
++ rt2x00mac_tx(rt2x00dev->hw, &control, skb);
+ skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
+ }
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+@@ -1040,14 +1040,14 @@ static void ar9003_hw_cl_cal_post_proc(s
+ }
+ }
+
+-static bool ar9003_hw_init_cal(struct ath_hw *ah,
+- struct ath9k_channel *chan)
++static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah,
++ struct ath9k_channel *chan)
+ {
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_hw_cal_data *caldata = ah->caldata;
+ bool txiqcal_done = false;
+ bool is_reusable = true, status = true;
+- bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
++ bool run_rtt_cal = false, run_agc_cal;
+ bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
+ u32 rx_delay = 0;
+ u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
+@@ -1119,22 +1119,12 @@ static bool ar9003_hw_init_cal(struct at
+ REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
+ txiqcal_done = run_agc_cal = true;
+- } else if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags)) {
+- run_agc_cal = true;
+- sep_iq_cal = true;
+ }
+
+ skip_tx_iqcal:
+ if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
+ ar9003_mci_init_cal_req(ah, &is_reusable);
+
+- if (sep_iq_cal) {
+- txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
+- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+- udelay(5);
+- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+- }
+-
+ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
+ rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
+ /* Disable BB_active */
+@@ -1228,13 +1218,109 @@ skip_tx_iqcal:
+ return true;
+ }
+
++static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
++ struct ath9k_channel *chan)
++{
++ struct ath_common *common = ath9k_hw_common(ah);
++ struct ath9k_hw_cal_data *caldata = ah->caldata;
++ bool txiqcal_done = false;
++ bool is_reusable = true, status = true;
++ bool run_agc_cal = false, sep_iq_cal = false;
++
++ /* Use chip chainmask only for calibration */
++ ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
++
++ if (ah->enabled_cals & TX_CL_CAL) {
++ REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
++ run_agc_cal = true;
++ }
++
++ if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
++ goto skip_tx_iqcal;
++
++ /* Do Tx IQ Calibration */
++ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
++ AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
++ DELPT);
++
++ /*
++ * For AR9485 or later chips, TxIQ cal runs as part of
++ * AGC calibration. Specifically, AR9550 in SoC chips.
++ */
++ if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
++ txiqcal_done = true;
++ run_agc_cal = true;
++ } else {
++ sep_iq_cal = true;
++ run_agc_cal = true;
++ }
++
++ /*
++ * In the SoC family, this will run for AR9300, AR9331 and AR9340.
++ */
++ if (sep_iq_cal) {
++ txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
++ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
++ udelay(5);
++ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
++ }
++
++skip_tx_iqcal:
++ if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
++ /* Calibrate the AGC */
++ REG_WRITE(ah, AR_PHY_AGC_CONTROL,
++ REG_READ(ah, AR_PHY_AGC_CONTROL) |
++ AR_PHY_AGC_CONTROL_CAL);
++
++ /* Poll for offset calibration complete */
++ status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
++ AR_PHY_AGC_CONTROL_CAL,
++ 0, AH_WAIT_TIMEOUT);
++ }
++
++ if (!status) {
++ ath_dbg(common, CALIBRATE,
++ "offset calibration failed to complete in %d ms; noisy environment?\n",
++ AH_WAIT_TIMEOUT / 1000);
++ return false;
++ }
++
++ if (txiqcal_done)
++ ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
++
++ /* Revert chainmask to runtime parameters */
++ ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
++
++ /* Initialize list pointers */
++ ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
++
++ INIT_CAL(&ah->iq_caldata);
++ INSERT_CAL(ah, &ah->iq_caldata);
++ ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
++
++ /* Initialize current pointer to first element in list */
++ ah->cal_list_curr = ah->cal_list;
++
++ if (ah->cal_list_curr)
++ ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
++
++ if (caldata)
++ caldata->CalValid = 0;
++
++ return true;
++}
++
+ void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
+ {
+ struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
+
++ if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah))
++ priv_ops->init_cal = ar9003_hw_init_cal_pcoem;
++ else
++ priv_ops->init_cal = ar9003_hw_init_cal_soc;
++
+ priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
+- priv_ops->init_cal = ar9003_hw_init_cal;
+ priv_ops->setup_calibration = ar9003_hw_setup_calibration;
+
+ ops->calibrate = ar9003_hw_calibrate;
+--- a/drivers/net/wireless/ath/ath9k/common.c
++++ b/drivers/net/wireless/ath/ath9k/common.c
+@@ -98,10 +98,8 @@ struct ath9k_channel *ath9k_cmn_get_chan
+ {
+ struct ieee80211_channel *curchan = chandef->chan;
+ struct ath9k_channel *channel;
+- u8 chan_idx;
+
+- chan_idx = curchan->hw_value;
+- channel = &ah->channels[chan_idx];
++ channel = &ah->channels[curchan->hw_value];
+ ath9k_cmn_update_ichannel(channel, chandef);
+
+ return channel;
+--- a/net/mac80211/rc80211_minstrel_ht.c
++++ b/net/mac80211/rc80211_minstrel_ht.c
+@@ -226,7 +226,7 @@ minstrel_ht_calc_tp(struct minstrel_ht_s
+ nsecs = 1000 * mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
+
+ nsecs += minstrel_mcs_groups[group].duration[rate];
+- tp = 1000000 * ((mr->probability * 1000) / nsecs);
++ tp = 1000000 * ((prob * 1000) / nsecs);
+
+ mr->cur_tp = MINSTREL_TRUNC(tp);
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -3984,18 +3984,20 @@ static void ar9003_hw_quick_drop_apply(s
+ int quick_drop;
+ s32 t[3], f[3] = {5180, 5500, 5785};
+
+- if (!(pBase->miscConfiguration & BIT(1)))
++ if (!(pBase->miscConfiguration & BIT(4)))
+ return;
+
+- if (freq < 4000)
+- quick_drop = eep->modalHeader2G.quick_drop;
+- else {
+- t[0] = eep->base_ext1.quick_drop_low;
+- t[1] = eep->modalHeader5G.quick_drop;
+- t[2] = eep->base_ext1.quick_drop_high;
+- quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
++ if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9340(ah)) {
++ if (freq < 4000) {
++ quick_drop = eep->modalHeader2G.quick_drop;
++ } else {
++ t[0] = eep->base_ext1.quick_drop_low;
++ t[1] = eep->modalHeader5G.quick_drop;
++ t[2] = eep->base_ext1.quick_drop_high;
++ quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
++ }
++ REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+- REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+
+ static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
+@@ -4035,7 +4037,7 @@ static void ar9003_hw_xlna_bias_strength
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u8 bias;
+
+- if (!(eep->baseEepHeader.featureEnable & 0x40))
++ if (!(eep->baseEepHeader.miscConfiguration & 0x40))
+ return;
+
+ if (!AR_SREV_9300(ah))
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -735,6 +735,7 @@ struct ieee80211_sub_if_data {
+ int csa_counter_offset_beacon;
+ int csa_counter_offset_presp;
+ bool csa_radar_required;
++ struct cfg80211_chan_def csa_chandef;
+
+ /* used to reconfigure hardware SM PS */
+ struct work_struct recalc_smps;
+@@ -811,6 +812,9 @@ static inline void sdata_unlock(struct i
+ __release(&sdata->wdev.mtx);
+ }
+
++#define sdata_dereference(p, sdata) \
++ rcu_dereference_protected(p, lockdep_is_held(&sdata->wdev.mtx))
++
+ static inline void
+ sdata_assert_lock(struct ieee80211_sub_if_data *sdata)
+ {
+@@ -1098,7 +1102,6 @@ struct ieee80211_local {
+ enum mac80211_scan_state next_scan_state;
+ struct delayed_work scan_work;
+ struct ieee80211_sub_if_data __rcu *scan_sdata;
+- struct cfg80211_chan_def csa_chandef;
+ /* For backward compatibility only -- do not use */
+ struct cfg80211_chan_def _oper_chandef;
+
+@@ -1236,6 +1239,7 @@ struct ieee80211_csa_ie {
+ u8 mode;
+ u8 count;
+ u8 ttl;
++ u16 pre_value;
+ };
+
+ /* Parsed Information Elements */
+@@ -1738,7 +1742,6 @@ ieee80211_vif_change_bandwidth(struct ie
+ /* NOTE: only use ieee80211_vif_change_channel() for channel switch */
+ int __must_check
+ ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
+- const struct cfg80211_chan_def *chandef,
+ u32 *changed);
+ void ieee80211_vif_release_channel(struct ieee80211_sub_if_data *sdata);
+ void ieee80211_vif_vlan_copy_chanctx(struct ieee80211_sub_if_data *sdata);
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -411,12 +411,12 @@ int ieee80211_vif_use_channel(struct iee
+ }
+
+ int ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
+- const struct cfg80211_chan_def *chandef,
+ u32 *changed)
+ {
+ struct ieee80211_local *local = sdata->local;
+ struct ieee80211_chanctx_conf *conf;
+ struct ieee80211_chanctx *ctx;
++ const struct cfg80211_chan_def *chandef = &sdata->csa_chandef;
+ int ret;
+ u32 chanctx_changed = 0;
+
+--- a/net/mac80211/ibss.c
++++ b/net/mac80211/ibss.c
+@@ -550,12 +550,12 @@ int ieee80211_ibss_finish_csa(struct iee
+ capability);
+ /* XXX: should not really modify cfg80211 data */
+ if (cbss) {
+- cbss->channel = sdata->local->csa_chandef.chan;
++ cbss->channel = sdata->csa_chandef.chan;
+ cfg80211_put_bss(sdata->local->hw.wiphy, cbss);
+ }
+ }
+
+- ifibss->chandef = sdata->local->csa_chandef;
++ ifibss->chandef = sdata->csa_chandef;
+
+ /* generate the beacon */
+ err = ieee80211_ibss_csa_beacon(sdata, NULL);
+@@ -922,7 +922,7 @@ ieee80211_ibss_process_chanswitch(struct
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- sdata->local->csa_chandef = params.chandef;
++ sdata->csa_chandef = params.chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
+--- a/net/mac80211/mesh.c
++++ b/net/mac80211/mesh.c
+@@ -943,14 +943,19 @@ ieee80211_mesh_process_chnswitch(struct
+ params.chandef.chan->center_freq);
+
+ params.block_tx = csa_ie.mode & WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT;
+- if (beacon)
++ if (beacon) {
+ ifmsh->chsw_ttl = csa_ie.ttl - 1;
+- else
+- ifmsh->chsw_ttl = 0;
++ if (ifmsh->pre_value >= csa_ie.pre_value)
++ return false;
++ ifmsh->pre_value = csa_ie.pre_value;
++ }
+
+- if (ifmsh->chsw_ttl > 0)
++ if (ifmsh->chsw_ttl < ifmsh->mshcfg.dot11MeshTTL) {
+ if (ieee80211_mesh_csa_beacon(sdata, ¶ms, false) < 0)
+ return false;
++ } else {
++ return false;
++ }
+
+ sdata->csa_radar_required = params.radar_required;
+
+@@ -959,7 +964,7 @@ ieee80211_mesh_process_chnswitch(struct
+ IEEE80211_MAX_QUEUE_MAP,
+ IEEE80211_QUEUE_STOP_REASON_CSA);
+
+- sdata->local->csa_chandef = params.chandef;
++ sdata->csa_chandef = params.chandef;
+ sdata->vif.csa_active = true;
+
+ ieee80211_bss_info_change_notify(sdata, err);
+@@ -1163,7 +1168,6 @@ static int mesh_fwd_csa_frame(struct iee
+ offset_ttl = (len < 42) ? 7 : 10;
+ *(pos + offset_ttl) -= 1;
+ *(pos + offset_ttl + 1) &= ~WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR;
+- sdata->u.mesh.chsw_ttl = *(pos + offset_ttl);
+
+ memcpy(mgmt_fwd, mgmt, len);
+ eth_broadcast_addr(mgmt_fwd->da);
+@@ -1182,7 +1186,7 @@ static void mesh_rx_csa_frame(struct iee
+ u16 pre_value;
+ bool fwd_csa = true;
+ size_t baselen;
+- u8 *pos, ttl;
++ u8 *pos;
+
+ if (mgmt->u.action.u.measurement.action_code !=
+ WLAN_ACTION_SPCT_CHL_SWITCH)
+@@ -1193,8 +1197,8 @@ static void mesh_rx_csa_frame(struct iee
+ u.action.u.chan_switch.variable);
+ ieee802_11_parse_elems(pos, len - baselen, false, &elems);
+
+- ttl = elems.mesh_chansw_params_ie->mesh_ttl;
+- if (!--ttl)
++ ifmsh->chsw_ttl = elems.mesh_chansw_params_ie->mesh_ttl;
++ if (!--ifmsh->chsw_ttl)
+ fwd_csa = false;
+
+ pre_value = le16_to_cpu(elems.mesh_chansw_params_ie->mesh_pre_value);
+--- a/net/mac80211/spectmgmt.c
++++ b/net/mac80211/spectmgmt.c
+@@ -78,6 +78,8 @@ int ieee80211_parse_ch_switch_ie(struct
+ if (elems->mesh_chansw_params_ie) {
+ csa_ie->ttl = elems->mesh_chansw_params_ie->mesh_ttl;
+ csa_ie->mode = elems->mesh_chansw_params_ie->mesh_flags;
++ csa_ie->pre_value = le16_to_cpu(
++ elems->mesh_chansw_params_ie->mesh_pre_value);
+ }
+
+ new_freq = ieee80211_channel_to_frequency(new_chan_no, new_band);
+--- a/drivers/net/wireless/ath/ath6kl/cfg80211.c
++++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c
+@@ -1109,7 +1109,9 @@ void ath6kl_cfg80211_ch_switch_notify(st
+ (mode == WMI_11G_HT20) ?
+ NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT);
+
++ mutex_lock(vif->wdev->mtx);
+ cfg80211_ch_switch_notify(vif->ndev, &chandef);
++ mutex_unlock(vif->wdev->mtx);
+ }
+
+ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
+--- a/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
+@@ -20,6 +20,44 @@
+
+ /* AR9462 2.1 */
+
++#define ar9462_2p1_mac_postamble ar9462_2p0_mac_postamble
++
++#define ar9462_2p1_baseband_core ar9462_2p0_baseband_core
++
++#define ar9462_2p1_radio_core ar9462_2p0_radio_core
++
++#define ar9462_2p1_radio_postamble ar9462_2p0_radio_postamble
++
++#define ar9462_2p1_soc_postamble ar9462_2p0_soc_postamble
++
++#define ar9462_2p1_radio_postamble_sys2ant ar9462_2p0_radio_postamble_sys2ant
++
++#define ar9462_2p1_common_rx_gain ar9462_2p0_common_rx_gain
++
++#define ar9462_2p1_common_mixed_rx_gain ar9462_2p0_common_mixed_rx_gain
++
++#define ar9462_2p1_common_5g_xlna_only_rxgain ar9462_2p0_common_5g_xlna_only_rxgain
++
++#define ar9462_2p1_baseband_core_mix_rxgain ar9462_2p0_baseband_core_mix_rxgain
++
++#define ar9462_2p1_baseband_postamble_mix_rxgain ar9462_2p0_baseband_postamble_mix_rxgain
++
++#define ar9462_2p1_baseband_postamble_5g_xlna ar9462_2p0_baseband_postamble_5g_xlna
++
++#define ar9462_2p1_common_wo_xlna_rx_gain ar9462_2p0_common_wo_xlna_rx_gain
++
++#define ar9462_2p1_modes_low_ob_db_tx_gain ar9462_2p0_modes_low_ob_db_tx_gain
++
++#define ar9462_2p1_modes_high_ob_db_tx_gain ar9462_2p0_modes_high_ob_db_tx_gain
++
++#define ar9462_2p1_modes_mix_ob_db_tx_gain ar9462_2p0_modes_mix_ob_db_tx_gain
++
++#define ar9462_2p1_modes_fast_clock ar9462_2p0_modes_fast_clock
++
++#define ar9462_2p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
++
++#define ar9462_2p1_pciephy_clkreq_disable_L1 ar9462_2p0_pciephy_clkreq_disable_L1
++
+ static const u32 ar9462_2p1_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+@@ -183,168 +221,6 @@ static const u32 ar9462_2p1_mac_core[][2
+ {0x000083d0, 0x000301ff},
+ };
+
+-static const u32 ar9462_2p1_mac_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core[][2] = {
+- /* Addr allmodes */
+- {0x00009800, 0xafe68e30},
+- {0x00009804, 0xfd14e000},
+- {0x00009808, 0x9c0a9f6b},
+- {0x0000980c, 0x04900000},
+- {0x00009814, 0x9280c00a},
+- {0x00009818, 0x00000000},
+- {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
+- {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
+- {0x00009880, 0x201fff00},
+- {0x00009884, 0x00001042},
+- {0x000098a4, 0x00200400},
+- {0x000098b0, 0x32440bbe},
+- {0x000098d0, 0x004b6a8e},
+- {0x000098d4, 0x00000820},
+- {0x000098dc, 0x00000000},
+- {0x000098e4, 0x01ffffff},
+- {0x000098e8, 0x01ffffff},
+- {0x000098ec, 0x01ffffff},
+- {0x000098f0, 0x00000000},
+- {0x000098f4, 0x00000000},
+- {0x00009bf0, 0x80000000},
+- {0x00009c04, 0xff55ff55},
+- {0x00009c08, 0x0320ff55},
+- {0x00009c0c, 0x00000000},
+- {0x00009c10, 0x00000000},
+- {0x00009c14, 0x00046384},
+- {0x00009c18, 0x05b6b440},
+- {0x00009c1c, 0x00b6b440},
+- {0x00009d00, 0xc080a333},
+- {0x00009d04, 0x40206c10},
+- {0x00009d08, 0x009c4060},
+- {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
+- {0x00009d14, 0x00c0040b},
+- {0x00009d18, 0x00000000},
+- {0x00009e08, 0x0038230c},
+- {0x00009e24, 0x990bb515},
+- {0x00009e28, 0x0c6f0000},
+- {0x00009e30, 0x06336f77},
+- {0x00009e34, 0x6af6532f},
+- {0x00009e38, 0x0cc80c00},
+- {0x00009e40, 0x15262820},
+- {0x00009e4c, 0x00001004},
+- {0x00009e50, 0x00ff03f1},
+- {0x00009e54, 0xe4c555c2},
+- {0x00009e58, 0xfd857722},
+- {0x00009e5c, 0xe9198724},
+- {0x00009fc0, 0x803e4788},
+- {0x00009fc4, 0x0001efb5},
+- {0x00009fcc, 0x40000014},
+- {0x00009fd0, 0x0a193b93},
+- {0x0000a20c, 0x00000000},
+- {0x0000a220, 0x00000000},
+- {0x0000a224, 0x00000000},
+- {0x0000a228, 0x10002310},
+- {0x0000a23c, 0x00000000},
+- {0x0000a244, 0x0c000000},
+- {0x0000a2a0, 0x00000001},
+- {0x0000a2c0, 0x00000001},
+- {0x0000a2c8, 0x00000000},
+- {0x0000a2cc, 0x18c43433},
+- {0x0000a2d4, 0x00000000},
+- {0x0000a2ec, 0x00000000},
+- {0x0000a2f0, 0x00000000},
+- {0x0000a2f4, 0x00000000},
+- {0x0000a2f8, 0x00000000},
+- {0x0000a344, 0x00000000},
+- {0x0000a34c, 0x00000000},
+- {0x0000a350, 0x0000a000},
+- {0x0000a364, 0x00000000},
+- {0x0000a370, 0x00000000},
+- {0x0000a390, 0x00000001},
+- {0x0000a394, 0x00000444},
+- {0x0000a398, 0x001f0e0f},
+- {0x0000a39c, 0x0075393f},
+- {0x0000a3a0, 0xb79f6427},
+- {0x0000a3c0, 0x20202020},
+- {0x0000a3c4, 0x22222220},
+- {0x0000a3c8, 0x20200020},
+- {0x0000a3cc, 0x20202020},
+- {0x0000a3d0, 0x20202020},
+- {0x0000a3d4, 0x20202020},
+- {0x0000a3d8, 0x20202020},
+- {0x0000a3dc, 0x20202020},
+- {0x0000a3e0, 0x20202020},
+- {0x0000a3e4, 0x20202020},
+- {0x0000a3e8, 0x20202020},
+- {0x0000a3ec, 0x20202020},
+- {0x0000a3f0, 0x00000000},
+- {0x0000a3f4, 0x00000006},
+- {0x0000a3f8, 0x0c9bd380},
+- {0x0000a3fc, 0x000f0f01},
+- {0x0000a400, 0x8fa91f01},
+- {0x0000a404, 0x00000000},
+- {0x0000a408, 0x0e79e5c6},
+- {0x0000a40c, 0x00820820},
+- {0x0000a414, 0x1ce739ce},
+- {0x0000a418, 0x2d001dce},
+- {0x0000a434, 0x00000000},
+- {0x0000a438, 0x00001801},
+- {0x0000a43c, 0x00100000},
+- {0x0000a444, 0x00000000},
+- {0x0000a448, 0x05000080},
+- {0x0000a44c, 0x00000001},
+- {0x0000a450, 0x00010000},
+- {0x0000a454, 0x07000000},
+- {0x0000a644, 0xbfad9d74},
+- {0x0000a648, 0x0048060a},
+- {0x0000a64c, 0x00002037},
+- {0x0000a670, 0x03020100},
+- {0x0000a674, 0x09080504},
+- {0x0000a678, 0x0d0c0b0a},
+- {0x0000a67c, 0x13121110},
+- {0x0000a680, 0x31301514},
+- {0x0000a684, 0x35343332},
+- {0x0000a688, 0x00000036},
+- {0x0000a690, 0x00000838},
+- {0x0000a6b0, 0x0000000a},
+- {0x0000a6b4, 0x00512c01},
+- {0x0000a7c0, 0x00000000},
+- {0x0000a7c4, 0xfffffffc},
+- {0x0000a7c8, 0x00000000},
+- {0x0000a7cc, 0x00000000},
+- {0x0000a7d0, 0x00000000},
+- {0x0000a7d4, 0x00000004},
+- {0x0000a7dc, 0x00000000},
+- {0x0000a7f0, 0x80000000},
+- {0x0000a8d0, 0x004b6a8e},
+- {0x0000a8d4, 0x00000820},
+- {0x0000a8dc, 0x00000000},
+- {0x0000a8f0, 0x00000000},
+- {0x0000a8f4, 0x00000000},
+- {0x0000abf0, 0x80000000},
+- {0x0000b2d0, 0x00000080},
+- {0x0000b2d4, 0x00000000},
+- {0x0000b2ec, 0x00000000},
+- {0x0000b2f0, 0x00000000},
+- {0x0000b2f4, 0x00000000},
+- {0x0000b2f8, 0x00000000},
+- {0x0000b408, 0x0e79e5c0},
+- {0x0000b40c, 0x00820820},
+- {0x0000b420, 0x00000000},
+- {0x0000b6b0, 0x0000000a},
+- {0x0000b6b4, 0x00000001},
+-};
+-
+ static const u32 ar9462_2p1_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
+@@ -361,7 +237,7 @@ static const u32 ar9462_2p1_baseband_pos
+ {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32365a5e},
+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
++ {0x00009e20, 0x000003a5, 0x000003a5, 0x000003a5, 0x000003a5},
+ {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+ {0x00009e44, 0x62321e27, 0x62321e27, 0xfe291e27, 0xfe291e27},
+@@ -400,1375 +276,16 @@ static const u32 ar9462_2p1_baseband_pos
+ {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+- {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
++ {0x0000ae20, 0x000001a6, 0x000001a6, 0x000001aa, 0x000001aa},
+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+ };
+
+-static const u32 ar9462_2p1_radio_core[][2] = {
+- /* Addr allmodes */
+- {0x00016000, 0x36db6db6},
+- {0x00016004, 0x6db6db40},
+- {0x00016008, 0x73f00000},
+- {0x0001600c, 0x00000000},
+- {0x00016010, 0x6d820001},
+- {0x00016040, 0x7f80fff8},
+- {0x0001604c, 0x2699e04f},
+- {0x00016050, 0x6db6db6c},
+- {0x00016058, 0x6c200000},
+- {0x00016080, 0x000c0000},
+- {0x00016084, 0x9a68048c},
+- {0x00016088, 0x54214514},
+- {0x0001608c, 0x1203040b},
+- {0x00016090, 0x24926490},
+- {0x00016098, 0xd2888888},
+- {0x000160a0, 0x0a108ffe},
+- {0x000160a4, 0x812fc491},
+- {0x000160a8, 0x423c8000},
+- {0x000160b4, 0x92000000},
+- {0x000160b8, 0x0285dddc},
+- {0x000160bc, 0x02908888},
+- {0x000160c0, 0x00adb6d0},
+- {0x000160c4, 0x6db6db60},
+- {0x000160c8, 0x6db6db6c},
+- {0x000160cc, 0x0de6c1b0},
+- {0x00016100, 0x3fffbe04},
+- {0x00016104, 0xfff80000},
+- {0x00016108, 0x00200400},
+- {0x00016110, 0x00000000},
+- {0x00016144, 0x02084080},
+- {0x00016148, 0x000080c0},
+- {0x00016280, 0x050a0001},
+- {0x00016284, 0x3d841418},
+- {0x00016288, 0x00000000},
+- {0x0001628c, 0xe3000000},
+- {0x00016290, 0xa1005080},
+- {0x00016294, 0x00000020},
+- {0x00016298, 0x54a82900},
+- {0x00016340, 0x121e4276},
+- {0x00016344, 0x00300000},
+- {0x00016400, 0x36db6db6},
+- {0x00016404, 0x6db6db40},
+- {0x00016408, 0x73f00000},
+- {0x0001640c, 0x00000000},
+- {0x00016410, 0x6c800001},
+- {0x00016440, 0x7f80fff8},
+- {0x0001644c, 0x4699e04f},
+- {0x00016450, 0x6db6db6c},
+- {0x00016500, 0x3fffbe04},
+- {0x00016504, 0xfff80000},
+- {0x00016508, 0x00200400},
+- {0x00016510, 0x00000000},
+- {0x00016544, 0x02084080},
+- {0x00016548, 0x000080c0},
+-};
+-
+-static const u32 ar9462_2p1_radio_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
+- {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
+- {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+- {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-};
+-
+ static const u32 ar9462_2p1_soc_preamble[][2] = {
+ /* Addr allmodes */
+- {0x000040a4, 0x00a0c1c9},
++ {0x000040a4, 0x00a0c9c9},
+ {0x00007020, 0x00000000},
+ {0x00007034, 0x00000002},
+ {0x00007038, 0x000004c2},
+ };
+
+-static const u32 ar9462_2p1_soc_postamble[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
+-};
+-
+-static const u32 ar9462_2p1_radio_postamble_sys2ant[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+- {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-};
+-
+-static const u32 ar9462_2p1_common_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x01910190},
+- {0x0000a030, 0x01930192},
+- {0x0000a034, 0x01950194},
+- {0x0000a038, 0x038a0196},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x22222229},
+- {0x0000a084, 0x1d1d1d1d},
+- {0x0000a088, 0x1d1d1d1d},
+- {0x0000a08c, 0x1d1d1d1d},
+- {0x0000a090, 0x171d1d1d},
+- {0x0000a094, 0x11111717},
+- {0x0000a098, 0x00030311},
+- {0x0000a09c, 0x00000000},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_common_mixed_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core_mix_rxgain[][2] = {
+- /* Addr allmodes */
+- {0x00009fd0, 0x0a2d6b93},
+-};
+-
+-static const u32 ar9462_2p1_baseband_postamble_mix_rxgain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00009820, 0x206a022e, 0x206a022e, 0x206a01ae, 0x206a01ae},
+- {0x00009824, 0x63c640de, 0x5ac640d0, 0x63c640da, 0x63c640da},
+- {0x00009828, 0x0796be89, 0x0696b081, 0x0916be81, 0x0916be81},
+- {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000d8, 0x6c4000d8},
+- {0x00009e10, 0x92c88d2e, 0x7ec88d2e, 0x7ec86d2e, 0x7ec86d2e},
+- {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32395c5e},
+-};
+-
+-static const u32 ar9462_2p1_baseband_postamble_5g_xlna[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+-};
+-
+-static const u32 ar9462_2p1_common_wo_xlna_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x32323232},
+- {0x0000b084, 0x2f2f3232},
+- {0x0000b088, 0x23282a2d},
+- {0x0000b08c, 0x1c1e2123},
+- {0x0000b090, 0x14171919},
+- {0x0000b094, 0x0e0e1214},
+- {0x0000b098, 0x03050707},
+- {0x0000b09c, 0x00030303},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_common_5g_xlna_only_rx_gain[][2] = {
+- /* Addr allmodes */
+- {0x0000a000, 0x00010000},
+- {0x0000a004, 0x00030002},
+- {0x0000a008, 0x00050004},
+- {0x0000a00c, 0x00810080},
+- {0x0000a010, 0x00830082},
+- {0x0000a014, 0x01810180},
+- {0x0000a018, 0x01830182},
+- {0x0000a01c, 0x01850184},
+- {0x0000a020, 0x01890188},
+- {0x0000a024, 0x018b018a},
+- {0x0000a028, 0x018d018c},
+- {0x0000a02c, 0x03820190},
+- {0x0000a030, 0x03840383},
+- {0x0000a034, 0x03880385},
+- {0x0000a038, 0x038a0389},
+- {0x0000a03c, 0x038c038b},
+- {0x0000a040, 0x0390038d},
+- {0x0000a044, 0x03920391},
+- {0x0000a048, 0x03940393},
+- {0x0000a04c, 0x03960395},
+- {0x0000a050, 0x00000000},
+- {0x0000a054, 0x00000000},
+- {0x0000a058, 0x00000000},
+- {0x0000a05c, 0x00000000},
+- {0x0000a060, 0x00000000},
+- {0x0000a064, 0x00000000},
+- {0x0000a068, 0x00000000},
+- {0x0000a06c, 0x00000000},
+- {0x0000a070, 0x00000000},
+- {0x0000a074, 0x00000000},
+- {0x0000a078, 0x00000000},
+- {0x0000a07c, 0x00000000},
+- {0x0000a080, 0x29292929},
+- {0x0000a084, 0x29292929},
+- {0x0000a088, 0x29292929},
+- {0x0000a08c, 0x29292929},
+- {0x0000a090, 0x22292929},
+- {0x0000a094, 0x1d1d2222},
+- {0x0000a098, 0x0c111117},
+- {0x0000a09c, 0x00030303},
+- {0x0000a0a0, 0x00000000},
+- {0x0000a0a4, 0x00000000},
+- {0x0000a0a8, 0x00000000},
+- {0x0000a0ac, 0x00000000},
+- {0x0000a0b0, 0x00000000},
+- {0x0000a0b4, 0x00000000},
+- {0x0000a0b8, 0x00000000},
+- {0x0000a0bc, 0x00000000},
+- {0x0000a0c0, 0x001f0000},
+- {0x0000a0c4, 0x01000101},
+- {0x0000a0c8, 0x011e011f},
+- {0x0000a0cc, 0x011c011d},
+- {0x0000a0d0, 0x02030204},
+- {0x0000a0d4, 0x02010202},
+- {0x0000a0d8, 0x021f0200},
+- {0x0000a0dc, 0x0302021e},
+- {0x0000a0e0, 0x03000301},
+- {0x0000a0e4, 0x031e031f},
+- {0x0000a0e8, 0x0402031d},
+- {0x0000a0ec, 0x04000401},
+- {0x0000a0f0, 0x041e041f},
+- {0x0000a0f4, 0x0502041d},
+- {0x0000a0f8, 0x05000501},
+- {0x0000a0fc, 0x051e051f},
+- {0x0000a100, 0x06010602},
+- {0x0000a104, 0x061f0600},
+- {0x0000a108, 0x061d061e},
+- {0x0000a10c, 0x07020703},
+- {0x0000a110, 0x07000701},
+- {0x0000a114, 0x00000000},
+- {0x0000a118, 0x00000000},
+- {0x0000a11c, 0x00000000},
+- {0x0000a120, 0x00000000},
+- {0x0000a124, 0x00000000},
+- {0x0000a128, 0x00000000},
+- {0x0000a12c, 0x00000000},
+- {0x0000a130, 0x00000000},
+- {0x0000a134, 0x00000000},
+- {0x0000a138, 0x00000000},
+- {0x0000a13c, 0x00000000},
+- {0x0000a140, 0x001f0000},
+- {0x0000a144, 0x01000101},
+- {0x0000a148, 0x011e011f},
+- {0x0000a14c, 0x011c011d},
+- {0x0000a150, 0x02030204},
+- {0x0000a154, 0x02010202},
+- {0x0000a158, 0x021f0200},
+- {0x0000a15c, 0x0302021e},
+- {0x0000a160, 0x03000301},
+- {0x0000a164, 0x031e031f},
+- {0x0000a168, 0x0402031d},
+- {0x0000a16c, 0x04000401},
+- {0x0000a170, 0x041e041f},
+- {0x0000a174, 0x0502041d},
+- {0x0000a178, 0x05000501},
+- {0x0000a17c, 0x051e051f},
+- {0x0000a180, 0x06010602},
+- {0x0000a184, 0x061f0600},
+- {0x0000a188, 0x061d061e},
+- {0x0000a18c, 0x07020703},
+- {0x0000a190, 0x07000701},
+- {0x0000a194, 0x00000000},
+- {0x0000a198, 0x00000000},
+- {0x0000a19c, 0x00000000},
+- {0x0000a1a0, 0x00000000},
+- {0x0000a1a4, 0x00000000},
+- {0x0000a1a8, 0x00000000},
+- {0x0000a1ac, 0x00000000},
+- {0x0000a1b0, 0x00000000},
+- {0x0000a1b4, 0x00000000},
+- {0x0000a1b8, 0x00000000},
+- {0x0000a1bc, 0x00000000},
+- {0x0000a1c0, 0x00000000},
+- {0x0000a1c4, 0x00000000},
+- {0x0000a1c8, 0x00000000},
+- {0x0000a1cc, 0x00000000},
+- {0x0000a1d0, 0x00000000},
+- {0x0000a1d4, 0x00000000},
+- {0x0000a1d8, 0x00000000},
+- {0x0000a1dc, 0x00000000},
+- {0x0000a1e0, 0x00000000},
+- {0x0000a1e4, 0x00000000},
+- {0x0000a1e8, 0x00000000},
+- {0x0000a1ec, 0x00000000},
+- {0x0000a1f0, 0x00000396},
+- {0x0000a1f4, 0x00000396},
+- {0x0000a1f8, 0x00000396},
+- {0x0000a1fc, 0x00000196},
+- {0x0000b000, 0x00010000},
+- {0x0000b004, 0x00030002},
+- {0x0000b008, 0x00050004},
+- {0x0000b00c, 0x00810080},
+- {0x0000b010, 0x00830082},
+- {0x0000b014, 0x01810180},
+- {0x0000b018, 0x01830182},
+- {0x0000b01c, 0x01850184},
+- {0x0000b020, 0x02810280},
+- {0x0000b024, 0x02830282},
+- {0x0000b028, 0x02850284},
+- {0x0000b02c, 0x02890288},
+- {0x0000b030, 0x028b028a},
+- {0x0000b034, 0x0388028c},
+- {0x0000b038, 0x038a0389},
+- {0x0000b03c, 0x038c038b},
+- {0x0000b040, 0x0390038d},
+- {0x0000b044, 0x03920391},
+- {0x0000b048, 0x03940393},
+- {0x0000b04c, 0x03960395},
+- {0x0000b050, 0x00000000},
+- {0x0000b054, 0x00000000},
+- {0x0000b058, 0x00000000},
+- {0x0000b05c, 0x00000000},
+- {0x0000b060, 0x00000000},
+- {0x0000b064, 0x00000000},
+- {0x0000b068, 0x00000000},
+- {0x0000b06c, 0x00000000},
+- {0x0000b070, 0x00000000},
+- {0x0000b074, 0x00000000},
+- {0x0000b078, 0x00000000},
+- {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
+- {0x0000b088, 0x19191c1e},
+- {0x0000b08c, 0x12141417},
+- {0x0000b090, 0x07070e0e},
+- {0x0000b094, 0x03030305},
+- {0x0000b098, 0x00000003},
+- {0x0000b09c, 0x00000000},
+- {0x0000b0a0, 0x00000000},
+- {0x0000b0a4, 0x00000000},
+- {0x0000b0a8, 0x00000000},
+- {0x0000b0ac, 0x00000000},
+- {0x0000b0b0, 0x00000000},
+- {0x0000b0b4, 0x00000000},
+- {0x0000b0b8, 0x00000000},
+- {0x0000b0bc, 0x00000000},
+- {0x0000b0c0, 0x003f0020},
+- {0x0000b0c4, 0x00400041},
+- {0x0000b0c8, 0x0140005f},
+- {0x0000b0cc, 0x0160015f},
+- {0x0000b0d0, 0x017e017f},
+- {0x0000b0d4, 0x02410242},
+- {0x0000b0d8, 0x025f0240},
+- {0x0000b0dc, 0x027f0260},
+- {0x0000b0e0, 0x0341027e},
+- {0x0000b0e4, 0x035f0340},
+- {0x0000b0e8, 0x037f0360},
+- {0x0000b0ec, 0x04400441},
+- {0x0000b0f0, 0x0460045f},
+- {0x0000b0f4, 0x0541047f},
+- {0x0000b0f8, 0x055f0540},
+- {0x0000b0fc, 0x057f0560},
+- {0x0000b100, 0x06400641},
+- {0x0000b104, 0x0660065f},
+- {0x0000b108, 0x067e067f},
+- {0x0000b10c, 0x07410742},
+- {0x0000b110, 0x075f0740},
+- {0x0000b114, 0x077f0760},
+- {0x0000b118, 0x07800781},
+- {0x0000b11c, 0x07a0079f},
+- {0x0000b120, 0x07c107bf},
+- {0x0000b124, 0x000007c0},
+- {0x0000b128, 0x00000000},
+- {0x0000b12c, 0x00000000},
+- {0x0000b130, 0x00000000},
+- {0x0000b134, 0x00000000},
+- {0x0000b138, 0x00000000},
+- {0x0000b13c, 0x00000000},
+- {0x0000b140, 0x003f0020},
+- {0x0000b144, 0x00400041},
+- {0x0000b148, 0x0140005f},
+- {0x0000b14c, 0x0160015f},
+- {0x0000b150, 0x017e017f},
+- {0x0000b154, 0x02410242},
+- {0x0000b158, 0x025f0240},
+- {0x0000b15c, 0x027f0260},
+- {0x0000b160, 0x0341027e},
+- {0x0000b164, 0x035f0340},
+- {0x0000b168, 0x037f0360},
+- {0x0000b16c, 0x04400441},
+- {0x0000b170, 0x0460045f},
+- {0x0000b174, 0x0541047f},
+- {0x0000b178, 0x055f0540},
+- {0x0000b17c, 0x057f0560},
+- {0x0000b180, 0x06400641},
+- {0x0000b184, 0x0660065f},
+- {0x0000b188, 0x067e067f},
+- {0x0000b18c, 0x07410742},
+- {0x0000b190, 0x075f0740},
+- {0x0000b194, 0x077f0760},
+- {0x0000b198, 0x07800781},
+- {0x0000b19c, 0x07a0079f},
+- {0x0000b1a0, 0x07c107bf},
+- {0x0000b1a4, 0x000007c0},
+- {0x0000b1a8, 0x00000000},
+- {0x0000b1ac, 0x00000000},
+- {0x0000b1b0, 0x00000000},
+- {0x0000b1b4, 0x00000000},
+- {0x0000b1b8, 0x00000000},
+- {0x0000b1bc, 0x00000000},
+- {0x0000b1c0, 0x00000000},
+- {0x0000b1c4, 0x00000000},
+- {0x0000b1c8, 0x00000000},
+- {0x0000b1cc, 0x00000000},
+- {0x0000b1d0, 0x00000000},
+- {0x0000b1d4, 0x00000000},
+- {0x0000b1d8, 0x00000000},
+- {0x0000b1dc, 0x00000000},
+- {0x0000b1e0, 0x00000000},
+- {0x0000b1e4, 0x00000000},
+- {0x0000b1e8, 0x00000000},
+- {0x0000b1ec, 0x00000000},
+- {0x0000b1f0, 0x00000396},
+- {0x0000b1f4, 0x00000396},
+- {0x0000b1f8, 0x00000396},
+- {0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9462_2p1_modes_low_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
+- {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
+- {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
+- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+- {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+- {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
+- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9462_2p1_modes_high_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050da, 0x000050da, 0x000050de, 0x000050de},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
+- {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
+- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+- {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
+- {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
+- {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
+- {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
+- {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
+- {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
+- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
+- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
+- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
+- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
+- {0x0000a548, 0x55025eb3, 0x55025eb3, 0x3e001a81, 0x3e001a81},
+- {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x42001a83, 0x42001a83},
+- {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x44001a84, 0x44001a84},
+- {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
+- {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
+- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
+- {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
+- {0x0000a564, 0x751ffff6, 0x751ffff6, 0x56001eec, 0x56001eec},
+- {0x0000a568, 0x751ffff6, 0x751ffff6, 0x58001ef0, 0x58001ef0},
+- {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x5a001ef4, 0x5a001ef4},
+- {0x0000a570, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a574, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a578, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+- {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
+- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+- {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+- {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
+- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9462_2p1_modes_mix_ob_db_tx_gain[][5] = {
+- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x0000d0da, 0x0000d0da, 0x0000d0de, 0x0000d0de},
+- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+- {0x0000a514, 0x18022622, 0x18022622, 0x12000400, 0x12000400},
+- {0x0000a518, 0x1b022822, 0x1b022822, 0x16000402, 0x16000402},
+- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+- {0x0000a520, 0x22022c41, 0x22022c41, 0x1c000603, 0x1c000603},
+- {0x0000a524, 0x28023042, 0x28023042, 0x21000a02, 0x21000a02},
+- {0x0000a528, 0x2c023044, 0x2c023044, 0x25000a04, 0x25000a04},
+- {0x0000a52c, 0x2f023644, 0x2f023644, 0x28000a20, 0x28000a20},
+- {0x0000a530, 0x34025643, 0x34025643, 0x2c000e20, 0x2c000e20},
+- {0x0000a534, 0x38025a44, 0x38025a44, 0x30000e22, 0x30000e22},
+- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x34000e24, 0x34000e24},
+- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x38001640, 0x38001640},
+- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x3c001660, 0x3c001660},
+- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3f001861, 0x3f001861},
+- {0x0000a548, 0x55025eb3, 0x55025eb3, 0x43001a81, 0x43001a81},
+- {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x47001a83, 0x47001a83},
+- {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x4a001c84, 0x4a001c84},
+- {0x0000a554, 0x62025f56, 0x62025f56, 0x4e001ce3, 0x4e001ce3},
+- {0x0000a558, 0x66027f56, 0x66027f56, 0x52001ce5, 0x52001ce5},
+- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x56001ce9, 0x56001ce9},
+- {0x0000a560, 0x70049f56, 0x70049f56, 0x5a001ceb, 0x5a001ceb},
+- {0x0000a564, 0x751ffff6, 0x751ffff6, 0x5c001eec, 0x5c001eec},
+- {0x0000a568, 0x751ffff6, 0x751ffff6, 0x5e001ef0, 0x5e001ef0},
+- {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x60001ef4, 0x60001ef4},
+- {0x0000a570, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a574, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a578, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
+- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-};
+-
+-static const u32 ar9462_2p1_modes_fast_clock[][3] = {
+- /* Addr 5G_HT20 5G_HT40 */
+- {0x00001030, 0x00000268, 0x000004d0},
+- {0x00001070, 0x0000018c, 0x00000318},
+- {0x000010b0, 0x00000fd0, 0x00001fa0},
+- {0x00008014, 0x044c044c, 0x08980898},
+- {0x0000801c, 0x148ec02b, 0x148ec057},
+- {0x00008318, 0x000044c0, 0x00008980},
+- {0x00009e00, 0x0372131c, 0x0372131c},
+- {0x0000a230, 0x0000400b, 0x00004016},
+- {0x0000a254, 0x00000898, 0x00001130},
+-};
+-
+-static const u32 ar9462_2p1_baseband_core_txfir_coeff_japan_2484[][2] = {
+- /* Addr allmodes */
+- {0x0000a398, 0x00000000},
+- {0x0000a39c, 0x6f7f0301},
+- {0x0000a3a0, 0xca9228ee},
+-};
+-
+ #endif /* INITVALS_9462_2P1_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+@@ -32,13 +32,6 @@ static const u32 ar9485_1_1_mac_postambl
+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+ };
+
+-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18012e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+ static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
+ /* Addr allmodes */
+ {0x00009e00, 0x037216a0},
+@@ -1101,20 +1094,6 @@ static const u32 ar9485_common_rx_gain_1
+ {0x0000a1fc, 0x00000296},
+ };
+
+-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18052e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+-static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18053e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+ static const u32 ar9485_1_1_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x00004014, 0xba280400},
+@@ -1173,13 +1152,6 @@ static const u32 ar9485_1_1_baseband_pos
+ {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ };
+
+-static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18013e5e},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0000080c},
+-};
+-
+ static const u32 ar9485_1_1_radio_postamble[][2] = {
+ /* Addr allmodes */
+ {0x0001609c, 0x0b283f31},
+@@ -1358,4 +1330,18 @@ static const u32 ar9485_1_1_baseband_cor
+ {0x0000a3a0, 0xca9228ee},
+ };
+
++static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
++ /* Addr allmodes */
++ {0x00018c00, 0x18013e5e},
++ {0x00018c04, 0x000801d8},
++ {0x00018c08, 0x0000080c},
++};
++
++static const u32 ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1[][2] = {
++ /* Addr allmodes */
++ {0x00018c00, 0x1801265e},
++ {0x00018c04, 0x000801d8},
++ {0x00018c08, 0x0000080c},
++};
++
+ #endif /* INITVALS_9485_H */
+--- a/drivers/net/wireless/ath/ath9k/pci.c
++++ b/drivers/net/wireless/ath/ath9k/pci.c
+@@ -195,6 +195,93 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
+ 0x3219),
+ .driver_data = ATH9K_PCI_BT_ANT_DIV },
+
++ /* AR9485 cards with PLL power-save disabled by default. */
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x2C97),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x2100),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1C56, /* ASKEY */
++ 0x4001),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x11AD, /* LITEON */
++ 0x6627),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x11AD, /* LITEON */
++ 0x6628),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_FOXCONN,
++ 0xE04E),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_FOXCONN,
++ 0xE04F),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x144F, /* ASKEY */
++ 0x7197),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x2000),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x2001),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1186),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1F86),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1195),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_AZWAVE,
++ 0x1F95),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x1C00),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ 0x1B9A, /* XAVI */
++ 0x1C01),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
++ 0x0032,
++ PCI_VENDOR_ID_ASUSTEK,
++ 0x850D),
++ .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
++
+ { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
+ { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
+
+--- a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
+@@ -20,7 +20,7 @@
+
+ /* AR9462 2.0 */
+
+-static const u32 ar9462_modes_fast_clock_2p0[][3] = {
++static const u32 ar9462_2p0_modes_fast_clock[][3] = {
+ /* Addr 5G_HT20 5G_HT40 */
+ {0x00001030, 0x00000268, 0x000004d0},
+ {0x00001070, 0x0000018c, 0x00000318},
+@@ -33,13 +33,6 @@ static const u32 ar9462_modes_fast_clock
+ {0x0000a254, 0x00000898, 0x00001130},
+ };
+
+-static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18253ede},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0003780c},
+-};
+-
+ static const u32 ar9462_2p0_baseband_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
+@@ -99,7 +92,7 @@ static const u32 ar9462_2p0_baseband_pos
+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+ };
+
+-static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
++static const u32 ar9462_2p0_common_rx_gain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+@@ -359,20 +352,13 @@ static const u32 ar9462_common_rx_gain_t
+ {0x0000b1fc, 0x00000196},
+ };
+
+-static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
++static const u32 ar9462_2p0_pciephy_clkreq_disable_L1[][2] = {
+ /* Addr allmodes */
+ {0x00018c00, 0x18213ede},
+ {0x00018c04, 0x000801d8},
+ {0x00018c08, 0x0003780c},
+ };
+
+-static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
+- /* Addr allmodes */
+- {0x00018c00, 0x18212ede},
+- {0x00018c04, 0x000801d8},
+- {0x00018c08, 0x0003780c},
+-};
+-
+ static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+@@ -380,7 +366,7 @@ static const u32 ar9462_2p0_radio_postam
+ {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+ };
+
+-static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
++static const u32 ar9462_2p0_common_wo_xlna_rx_gain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+@@ -647,7 +633,7 @@ static const u32 ar9462_2p0_baseband_cor
+ {0x0000a3a0, 0xca9228ee},
+ };
+
+-static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
++static const u32 ar9462_2p0_modes_low_ob_db_tx_gain[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+@@ -879,7 +865,7 @@ static const u32 ar9462_2p0_radio_postam
+ {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+ };
+
+-static const u32 ar9462_modes_mix_ob_db_tx_gain_table_2p0[][5] = {
++static const u32 ar9462_2p0_modes_mix_ob_db_tx_gain[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+@@ -942,7 +928,7 @@ static const u32 ar9462_modes_mix_ob_db_
+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+ };
+
+-static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
++static const u32 ar9462_2p0_modes_high_ob_db_tx_gain[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+@@ -1252,7 +1238,7 @@ static const u32 ar9462_2p0_mac_postambl
+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+ };
+
+-static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
++static const u32 ar9462_2p0_common_mixed_rx_gain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+@@ -1517,7 +1503,7 @@ static const u32 ar9462_2p0_baseband_pos
+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
+ };
+
+-static const u32 ar9462_2p0_5g_xlna_only_rxgain[][2] = {
++static const u32 ar9462_2p0_common_5g_xlna_only_rxgain[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+ {0x0000a004, 0x00030002},
+--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+@@ -352,7 +352,7 @@ static const u32 ar9300_2p2_baseband_pos
+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++ {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+@@ -378,9 +378,9 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x00009814, 0x9280c00a},
+ {0x00009818, 0x00000000},
+ {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
++ {0x00009834, 0x6400a190},
+ {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
++ {0x0000983c, 0x14000600},
+ {0x00009880, 0x201fff00},
+ {0x00009884, 0x00001042},
+ {0x000098a4, 0x00200400},
+@@ -401,7 +401,7 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x00009d04, 0x40206c10},
+ {0x00009d08, 0x009c4060},
+ {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
++ {0x00009d10, 0x01884061},
+ {0x00009d14, 0x00c0040b},
+ {0x00009d18, 0x00000000},
+ {0x00009e08, 0x0038230c},
+@@ -459,7 +459,7 @@ static const u32 ar9300_2p2_baseband_cor
+ {0x0000a3e8, 0x20202020},
+ {0x0000a3ec, 0x20202020},
+ {0x0000a3f0, 0x00000000},
+- {0x0000a3f4, 0x00000246},
++ {0x0000a3f4, 0x00000000},
+ {0x0000a3f8, 0x0c9bd380},
+ {0x0000a3fc, 0x000f0f01},
+ {0x0000a400, 0x8fa91f01},
+@@ -644,7 +644,7 @@ static const u32 ar9300Modes_high_ob_db_
+ {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+ {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+- {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
++ {0x0000a410, 0x000050d4, 0x000050d4, 0x000050d9, 0x000050d9},
+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+ {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
+ {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
+@@ -1086,8 +1086,8 @@ static const u32 ar9300Common_rx_gain_ta
+ {0x0000b074, 0x00000000},
+ {0x0000b078, 0x00000000},
+ {0x0000b07c, 0x00000000},
+- {0x0000b080, 0x2a2d2f32},
+- {0x0000b084, 0x21232328},
++ {0x0000b080, 0x23232323},
++ {0x0000b084, 0x21232323},
+ {0x0000b088, 0x19191c1e},
+ {0x0000b08c, 0x12141417},
+ {0x0000b090, 0x07070e0e},
+@@ -1385,9 +1385,9 @@ static const u32 ar9300_2p2_mac_core[][2
+ {0x000081f8, 0x00000000},
+ {0x000081fc, 0x00000000},
+ {0x00008240, 0x00100000},
+- {0x00008244, 0x0010f424},
++ {0x00008244, 0x0010f400},
+ {0x00008248, 0x00000800},
+- {0x0000824c, 0x0001e848},
++ {0x0000824c, 0x0001e800},
+ {0x00008250, 0x00000000},
+ {0x00008254, 0x00000000},
+ {0x00008258, 0x00000000},
+@@ -1726,14 +1726,14 @@ static const u32 ar9300PciePhy_pll_on_cl
+
+ static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
+ /* Addr allmodes */
+- {0x00004040, 0x08253e5e},
++ {0x00004040, 0x0825365e},
+ {0x00004040, 0x0008003b},
+ {0x00004044, 0x00000000},
+ };
+
+ static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
+ /* Addr allmodes */
+- {0x00004040, 0x08213e5e},
++ {0x00004040, 0x0821365e},
+ {0x00004040, 0x0008003b},
+ {0x00004044, 0x00000000},
+ };
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h
+@@ -0,0 +1,64 @@
++/*
++ * Copyright (c) 2010-2011 Atheros Communications Inc.
++ * Copyright (c) 2011-2012 Qualcomm Atheros Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9565_1P1_H
++#define INITVALS_9565_1P1_H
++
++/* AR9565 1.1 */
++
++#define ar9565_1p1_mac_core ar9565_1p0_mac_core
++
++#define ar9565_1p1_mac_postamble ar9565_1p0_mac_postamble
++
++#define ar9565_1p1_baseband_core ar9565_1p0_baseband_core
++
++#define ar9565_1p1_baseband_postamble ar9565_1p0_baseband_postamble
++
++#define ar9565_1p1_radio_core ar9565_1p0_radio_core
++
++#define ar9565_1p1_soc_preamble ar9565_1p0_soc_preamble
++
++#define ar9565_1p1_soc_postamble ar9565_1p0_soc_postamble
++
++#define ar9565_1p1_Common_rx_gain_table ar9565_1p0_Common_rx_gain_table
++
++#define ar9565_1p1_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_Modes_lowest_ob_db_tx_gain_table
++
++#define ar9565_1p1_pciephy_clkreq_disable_L1 ar9565_1p0_pciephy_clkreq_disable_L1
++
++#define ar9565_1p1_modes_fast_clock ar9565_1p0_modes_fast_clock
++
++#define ar9565_1p1_common_wo_xlna_rx_gain_table ar9565_1p0_common_wo_xlna_rx_gain_table
++
++#define ar9565_1p1_modes_low_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
++
++#define ar9565_1p1_modes_high_ob_db_tx_gain_table ar9565_1p0_modes_high_ob_db_tx_gain_table
++
++#define ar9565_1p1_modes_high_power_tx_gain_table ar9565_1p0_modes_high_power_tx_gain_table
++
++#define ar9565_1p1_baseband_core_txfir_coeff_japan_2484 ar9565_1p0_baseband_core_txfir_coeff_japan_2484
++
++static const u32 ar9565_1p1_radio_postamble[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
++ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
++ {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
++ {0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
++ {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
++};
++
++#endif /* INITVALS_9565_1P1_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+@@ -20,18 +20,34 @@
+
+ /* AR9580 1.0 */
+
++#define ar9580_1p0_soc_preamble ar9300_2p2_soc_preamble
++
++#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
++
++#define ar9580_1p0_radio_core ar9300_2p2_radio_core
++
++#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
++
++#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
++
++#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
++
++#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
++
+ #define ar9580_1p0_modes_fast_clock ar9300Modes_fast_clock_2p2
+
++#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
++
+ static const u32 ar9580_1p0_radio_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
+ {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
+ {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
+- {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+- {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+ };
+
+@@ -44,9 +60,9 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x00009814, 0x3280c00a},
+ {0x00009818, 0x00000000},
+ {0x0000981c, 0x00020028},
+- {0x00009834, 0x6400a290},
++ {0x00009834, 0x6400a190},
+ {0x00009838, 0x0108ecff},
+- {0x0000983c, 0x0d000600},
++ {0x0000983c, 0x14000600},
+ {0x00009880, 0x201fff00},
+ {0x00009884, 0x00001042},
+ {0x000098a4, 0x00200400},
+@@ -67,7 +83,7 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x00009d04, 0x40206c10},
+ {0x00009d08, 0x009c4060},
+ {0x00009d0c, 0x9883800a},
+- {0x00009d10, 0x01834061},
++ {0x00009d10, 0x01884061},
+ {0x00009d14, 0x00c0040b},
+ {0x00009d18, 0x00000000},
+ {0x00009e08, 0x0038230c},
+@@ -198,8 +214,6 @@ static const u32 ar9580_1p0_baseband_cor
+ {0x0000c420, 0x00000000},
+ };
+
+-#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
+-
+ static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+@@ -306,7 +320,112 @@ static const u32 ar9580_1p0_low_ob_db_tx
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_high_power_tx_gain_table ar9580_1p0_low_ob_db_tx_gain_table
++static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
++ {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
++ {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
++ {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
++ {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
++ {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
++ {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
++ {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
++ {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
++ {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
++ {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
++ {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
++ {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
++ {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
++ {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
++ {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
++ {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
++ {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
++ {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
++ {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016288, 0x05a2040a, 0x05a2040a, 0x05a20408, 0x05a20408},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
+
+ static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+@@ -414,8 +533,6 @@ static const u32 ar9580_1p0_lowest_ob_db
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+-
+ static const u32 ar9580_1p0_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+@@ -679,14 +796,6 @@ static const u32 ar9580_1p0_mixed_ob_db_
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
+-
+-#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
+-
+-#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
+-
+-#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
+-
+ static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+@@ -761,160 +870,264 @@ static const u32 ar9580_1p0_type6_tx_gai
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
+-static const u32 ar9580_1p0_soc_preamble[][2] = {
+- /* Addr allmodes */
+- {0x000040a4, 0x00a0c1c9},
+- {0x00007008, 0x00000000},
+- {0x00007020, 0x00000000},
+- {0x00007034, 0x00000002},
+- {0x00007038, 0x000004c2},
+- {0x00007048, 0x00000008},
+-};
+-
+-#define ar9580_1p0_rx_gain_table ar9462_common_rx_gain_table_2p0
+-
+-static const u32 ar9580_1p0_radio_core[][2] = {
++static const u32 ar9580_1p0_rx_gain_table[][2] = {
+ /* Addr allmodes */
+- {0x00016000, 0x36db6db6},
+- {0x00016004, 0x6db6db40},
+- {0x00016008, 0x73f00000},
+- {0x0001600c, 0x00000000},
+- {0x00016040, 0x7f80fff8},
+- {0x0001604c, 0x76d005b5},
+- {0x00016050, 0x556cf031},
+- {0x00016054, 0x13449440},
+- {0x00016058, 0x0c51c92c},
+- {0x0001605c, 0x3db7fffc},
+- {0x00016060, 0xfffffffc},
+- {0x00016064, 0x000f0278},
+- {0x0001606c, 0x6db60000},
+- {0x00016080, 0x00000000},
+- {0x00016084, 0x0e48048c},
+- {0x00016088, 0x54214514},
+- {0x0001608c, 0x119f481e},
+- {0x00016090, 0x24926490},
+- {0x00016098, 0xd2888888},
+- {0x000160a0, 0x0a108ffe},
+- {0x000160a4, 0x812fc370},
+- {0x000160a8, 0x423c8000},
+- {0x000160b4, 0x92480080},
+- {0x000160c0, 0x00adb6d0},
+- {0x000160c4, 0x6db6db60},
+- {0x000160c8, 0x6db6db6c},
+- {0x000160cc, 0x01e6c000},
+- {0x00016100, 0x3fffbe01},
+- {0x00016104, 0xfff80000},
+- {0x00016108, 0x00080010},
+- {0x00016144, 0x02084080},
+- {0x00016148, 0x00000000},
+- {0x00016280, 0x058a0001},
+- {0x00016284, 0x3d840208},
+- {0x00016288, 0x05a20408},
+- {0x0001628c, 0x00038c07},
+- {0x00016290, 0x00000004},
+- {0x00016294, 0x458aa14f},
+- {0x00016380, 0x00000000},
+- {0x00016384, 0x00000000},
+- {0x00016388, 0x00800700},
+- {0x0001638c, 0x00800700},
+- {0x00016390, 0x00800700},
+- {0x00016394, 0x00000000},
+- {0x00016398, 0x00000000},
+- {0x0001639c, 0x00000000},
+- {0x000163a0, 0x00000001},
+- {0x000163a4, 0x00000001},
+- {0x000163a8, 0x00000000},
+- {0x000163ac, 0x00000000},
+- {0x000163b0, 0x00000000},
+- {0x000163b4, 0x00000000},
+- {0x000163b8, 0x00000000},
+- {0x000163bc, 0x00000000},
+- {0x000163c0, 0x000000a0},
+- {0x000163c4, 0x000c0000},
+- {0x000163c8, 0x14021402},
+- {0x000163cc, 0x00001402},
+- {0x000163d0, 0x00000000},
+- {0x000163d4, 0x00000000},
+- {0x00016400, 0x36db6db6},
+- {0x00016404, 0x6db6db40},
+- {0x00016408, 0x73f00000},
+- {0x0001640c, 0x00000000},
+- {0x00016440, 0x7f80fff8},
+- {0x0001644c, 0x76d005b5},
+- {0x00016450, 0x556cf031},
+- {0x00016454, 0x13449440},
+- {0x00016458, 0x0c51c92c},
+- {0x0001645c, 0x3db7fffc},
+- {0x00016460, 0xfffffffc},
+- {0x00016464, 0x000f0278},
+- {0x0001646c, 0x6db60000},
+- {0x00016500, 0x3fffbe01},
+- {0x00016504, 0xfff80000},
+- {0x00016508, 0x00080010},
+- {0x00016544, 0x02084080},
+- {0x00016548, 0x00000000},
+- {0x00016780, 0x00000000},
+- {0x00016784, 0x00000000},
+- {0x00016788, 0x00800700},
+- {0x0001678c, 0x00800700},
+- {0x00016790, 0x00800700},
+- {0x00016794, 0x00000000},
+- {0x00016798, 0x00000000},
+- {0x0001679c, 0x00000000},
+- {0x000167a0, 0x00000001},
+- {0x000167a4, 0x00000001},
+- {0x000167a8, 0x00000000},
+- {0x000167ac, 0x00000000},
+- {0x000167b0, 0x00000000},
+- {0x000167b4, 0x00000000},
+- {0x000167b8, 0x00000000},
+- {0x000167bc, 0x00000000},
+- {0x000167c0, 0x000000a0},
+- {0x000167c4, 0x000c0000},
+- {0x000167c8, 0x14021402},
+- {0x000167cc, 0x00001402},
+- {0x000167d0, 0x00000000},
+- {0x000167d4, 0x00000000},
+- {0x00016800, 0x36db6db6},
+- {0x00016804, 0x6db6db40},
+- {0x00016808, 0x73f00000},
+- {0x0001680c, 0x00000000},
+- {0x00016840, 0x7f80fff8},
+- {0x0001684c, 0x76d005b5},
+- {0x00016850, 0x556cf031},
+- {0x00016854, 0x13449440},
+- {0x00016858, 0x0c51c92c},
+- {0x0001685c, 0x3db7fffc},
+- {0x00016860, 0xfffffffc},
+- {0x00016864, 0x000f0278},
+- {0x0001686c, 0x6db60000},
+- {0x00016900, 0x3fffbe01},
+- {0x00016904, 0xfff80000},
+- {0x00016908, 0x00080010},
+- {0x00016944, 0x02084080},
+- {0x00016948, 0x00000000},
+- {0x00016b80, 0x00000000},
+- {0x00016b84, 0x00000000},
+- {0x00016b88, 0x00800700},
+- {0x00016b8c, 0x00800700},
+- {0x00016b90, 0x00800700},
+- {0x00016b94, 0x00000000},
+- {0x00016b98, 0x00000000},
+- {0x00016b9c, 0x00000000},
+- {0x00016ba0, 0x00000001},
+- {0x00016ba4, 0x00000001},
+- {0x00016ba8, 0x00000000},
+- {0x00016bac, 0x00000000},
+- {0x00016bb0, 0x00000000},
+- {0x00016bb4, 0x00000000},
+- {0x00016bb8, 0x00000000},
+- {0x00016bbc, 0x00000000},
+- {0x00016bc0, 0x000000a0},
+- {0x00016bc4, 0x000c0000},
+- {0x00016bc8, 0x14021402},
+- {0x00016bcc, 0x00001402},
+- {0x00016bd0, 0x00000000},
+- {0x00016bd4, 0x00000000},
++ {0x0000a000, 0x00010000},
++ {0x0000a004, 0x00030002},
++ {0x0000a008, 0x00050004},
++ {0x0000a00c, 0x00810080},
++ {0x0000a010, 0x00830082},
++ {0x0000a014, 0x01810180},
++ {0x0000a018, 0x01830182},
++ {0x0000a01c, 0x01850184},
++ {0x0000a020, 0x01890188},
++ {0x0000a024, 0x018b018a},
++ {0x0000a028, 0x018d018c},
++ {0x0000a02c, 0x01910190},
++ {0x0000a030, 0x01930192},
++ {0x0000a034, 0x01950194},
++ {0x0000a038, 0x038a0196},
++ {0x0000a03c, 0x038c038b},
++ {0x0000a040, 0x0390038d},
++ {0x0000a044, 0x03920391},
++ {0x0000a048, 0x03940393},
++ {0x0000a04c, 0x03960395},
++ {0x0000a050, 0x00000000},
++ {0x0000a054, 0x00000000},
++ {0x0000a058, 0x00000000},
++ {0x0000a05c, 0x00000000},
++ {0x0000a060, 0x00000000},
++ {0x0000a064, 0x00000000},
++ {0x0000a068, 0x00000000},
++ {0x0000a06c, 0x00000000},
++ {0x0000a070, 0x00000000},
++ {0x0000a074, 0x00000000},
++ {0x0000a078, 0x00000000},
++ {0x0000a07c, 0x00000000},
++ {0x0000a080, 0x22222229},
++ {0x0000a084, 0x1d1d1d1d},
++ {0x0000a088, 0x1d1d1d1d},
++ {0x0000a08c, 0x1d1d1d1d},
++ {0x0000a090, 0x171d1d1d},
++ {0x0000a094, 0x11111717},
++ {0x0000a098, 0x00030311},
++ {0x0000a09c, 0x00000000},
++ {0x0000a0a0, 0x00000000},
++ {0x0000a0a4, 0x00000000},
++ {0x0000a0a8, 0x00000000},
++ {0x0000a0ac, 0x00000000},
++ {0x0000a0b0, 0x00000000},
++ {0x0000a0b4, 0x00000000},
++ {0x0000a0b8, 0x00000000},
++ {0x0000a0bc, 0x00000000},
++ {0x0000a0c0, 0x001f0000},
++ {0x0000a0c4, 0x01000101},
++ {0x0000a0c8, 0x011e011f},
++ {0x0000a0cc, 0x011c011d},
++ {0x0000a0d0, 0x02030204},
++ {0x0000a0d4, 0x02010202},
++ {0x0000a0d8, 0x021f0200},
++ {0x0000a0dc, 0x0302021e},
++ {0x0000a0e0, 0x03000301},
++ {0x0000a0e4, 0x031e031f},
++ {0x0000a0e8, 0x0402031d},
++ {0x0000a0ec, 0x04000401},
++ {0x0000a0f0, 0x041e041f},
++ {0x0000a0f4, 0x0502041d},
++ {0x0000a0f8, 0x05000501},
++ {0x0000a0fc, 0x051e051f},
++ {0x0000a100, 0x06010602},
++ {0x0000a104, 0x061f0600},
++ {0x0000a108, 0x061d061e},
++ {0x0000a10c, 0x07020703},
++ {0x0000a110, 0x07000701},
++ {0x0000a114, 0x00000000},
++ {0x0000a118, 0x00000000},
++ {0x0000a11c, 0x00000000},
++ {0x0000a120, 0x00000000},
++ {0x0000a124, 0x00000000},
++ {0x0000a128, 0x00000000},
++ {0x0000a12c, 0x00000000},
++ {0x0000a130, 0x00000000},
++ {0x0000a134, 0x00000000},
++ {0x0000a138, 0x00000000},
++ {0x0000a13c, 0x00000000},
++ {0x0000a140, 0x001f0000},
++ {0x0000a144, 0x01000101},
++ {0x0000a148, 0x011e011f},
++ {0x0000a14c, 0x011c011d},
++ {0x0000a150, 0x02030204},
++ {0x0000a154, 0x02010202},
++ {0x0000a158, 0x021f0200},
++ {0x0000a15c, 0x0302021e},
++ {0x0000a160, 0x03000301},
++ {0x0000a164, 0x031e031f},
++ {0x0000a168, 0x0402031d},
++ {0x0000a16c, 0x04000401},
++ {0x0000a170, 0x041e041f},
++ {0x0000a174, 0x0502041d},
++ {0x0000a178, 0x05000501},
++ {0x0000a17c, 0x051e051f},
++ {0x0000a180, 0x06010602},
++ {0x0000a184, 0x061f0600},
++ {0x0000a188, 0x061d061e},
++ {0x0000a18c, 0x07020703},
++ {0x0000a190, 0x07000701},
++ {0x0000a194, 0x00000000},
++ {0x0000a198, 0x00000000},
++ {0x0000a19c, 0x00000000},
++ {0x0000a1a0, 0x00000000},
++ {0x0000a1a4, 0x00000000},
++ {0x0000a1a8, 0x00000000},
++ {0x0000a1ac, 0x00000000},
++ {0x0000a1b0, 0x00000000},
++ {0x0000a1b4, 0x00000000},
++ {0x0000a1b8, 0x00000000},
++ {0x0000a1bc, 0x00000000},
++ {0x0000a1c0, 0x00000000},
++ {0x0000a1c4, 0x00000000},
++ {0x0000a1c8, 0x00000000},
++ {0x0000a1cc, 0x00000000},
++ {0x0000a1d0, 0x00000000},
++ {0x0000a1d4, 0x00000000},
++ {0x0000a1d8, 0x00000000},
++ {0x0000a1dc, 0x00000000},
++ {0x0000a1e0, 0x00000000},
++ {0x0000a1e4, 0x00000000},
++ {0x0000a1e8, 0x00000000},
++ {0x0000a1ec, 0x00000000},
++ {0x0000a1f0, 0x00000396},
++ {0x0000a1f4, 0x00000396},
++ {0x0000a1f8, 0x00000396},
++ {0x0000a1fc, 0x00000196},
++ {0x0000b000, 0x00010000},
++ {0x0000b004, 0x00030002},
++ {0x0000b008, 0x00050004},
++ {0x0000b00c, 0x00810080},
++ {0x0000b010, 0x00830082},
++ {0x0000b014, 0x01810180},
++ {0x0000b018, 0x01830182},
++ {0x0000b01c, 0x01850184},
++ {0x0000b020, 0x02810280},
++ {0x0000b024, 0x02830282},
++ {0x0000b028, 0x02850284},
++ {0x0000b02c, 0x02890288},
++ {0x0000b030, 0x028b028a},
++ {0x0000b034, 0x0388028c},
++ {0x0000b038, 0x038a0389},
++ {0x0000b03c, 0x038c038b},
++ {0x0000b040, 0x0390038d},
++ {0x0000b044, 0x03920391},
++ {0x0000b048, 0x03940393},
++ {0x0000b04c, 0x03960395},
++ {0x0000b050, 0x00000000},
++ {0x0000b054, 0x00000000},
++ {0x0000b058, 0x00000000},
++ {0x0000b05c, 0x00000000},
++ {0x0000b060, 0x00000000},
++ {0x0000b064, 0x00000000},
++ {0x0000b068, 0x00000000},
++ {0x0000b06c, 0x00000000},
++ {0x0000b070, 0x00000000},
++ {0x0000b074, 0x00000000},
++ {0x0000b078, 0x00000000},
++ {0x0000b07c, 0x00000000},
++ {0x0000b080, 0x23232323},
++ {0x0000b084, 0x21232323},
++ {0x0000b088, 0x19191c1e},
++ {0x0000b08c, 0x12141417},
++ {0x0000b090, 0x07070e0e},
++ {0x0000b094, 0x03030305},
++ {0x0000b098, 0x00000003},
++ {0x0000b09c, 0x00000000},
++ {0x0000b0a0, 0x00000000},
++ {0x0000b0a4, 0x00000000},
++ {0x0000b0a8, 0x00000000},
++ {0x0000b0ac, 0x00000000},
++ {0x0000b0b0, 0x00000000},
++ {0x0000b0b4, 0x00000000},
++ {0x0000b0b8, 0x00000000},
++ {0x0000b0bc, 0x00000000},
++ {0x0000b0c0, 0x003f0020},
++ {0x0000b0c4, 0x00400041},
++ {0x0000b0c8, 0x0140005f},
++ {0x0000b0cc, 0x0160015f},
++ {0x0000b0d0, 0x017e017f},
++ {0x0000b0d4, 0x02410242},
++ {0x0000b0d8, 0x025f0240},
++ {0x0000b0dc, 0x027f0260},
++ {0x0000b0e0, 0x0341027e},
++ {0x0000b0e4, 0x035f0340},
++ {0x0000b0e8, 0x037f0360},
++ {0x0000b0ec, 0x04400441},
++ {0x0000b0f0, 0x0460045f},
++ {0x0000b0f4, 0x0541047f},
++ {0x0000b0f8, 0x055f0540},
++ {0x0000b0fc, 0x057f0560},
++ {0x0000b100, 0x06400641},
++ {0x0000b104, 0x0660065f},
++ {0x0000b108, 0x067e067f},
++ {0x0000b10c, 0x07410742},
++ {0x0000b110, 0x075f0740},
++ {0x0000b114, 0x077f0760},
++ {0x0000b118, 0x07800781},
++ {0x0000b11c, 0x07a0079f},
++ {0x0000b120, 0x07c107bf},
++ {0x0000b124, 0x000007c0},
++ {0x0000b128, 0x00000000},
++ {0x0000b12c, 0x00000000},
++ {0x0000b130, 0x00000000},
++ {0x0000b134, 0x00000000},
++ {0x0000b138, 0x00000000},
++ {0x0000b13c, 0x00000000},
++ {0x0000b140, 0x003f0020},
++ {0x0000b144, 0x00400041},
++ {0x0000b148, 0x0140005f},
++ {0x0000b14c, 0x0160015f},
++ {0x0000b150, 0x017e017f},
++ {0x0000b154, 0x02410242},
++ {0x0000b158, 0x025f0240},
++ {0x0000b15c, 0x027f0260},
++ {0x0000b160, 0x0341027e},
++ {0x0000b164, 0x035f0340},
++ {0x0000b168, 0x037f0360},
++ {0x0000b16c, 0x04400441},
++ {0x0000b170, 0x0460045f},
++ {0x0000b174, 0x0541047f},
++ {0x0000b178, 0x055f0540},
++ {0x0000b17c, 0x057f0560},
++ {0x0000b180, 0x06400641},
++ {0x0000b184, 0x0660065f},
++ {0x0000b188, 0x067e067f},
++ {0x0000b18c, 0x07410742},
++ {0x0000b190, 0x075f0740},
++ {0x0000b194, 0x077f0760},
++ {0x0000b198, 0x07800781},
++ {0x0000b19c, 0x07a0079f},
++ {0x0000b1a0, 0x07c107bf},
++ {0x0000b1a4, 0x000007c0},
++ {0x0000b1a8, 0x00000000},
++ {0x0000b1ac, 0x00000000},
++ {0x0000b1b0, 0x00000000},
++ {0x0000b1b4, 0x00000000},
++ {0x0000b1b8, 0x00000000},
++ {0x0000b1bc, 0x00000000},
++ {0x0000b1c0, 0x00000000},
++ {0x0000b1c4, 0x00000000},
++ {0x0000b1c8, 0x00000000},
++ {0x0000b1cc, 0x00000000},
++ {0x0000b1d0, 0x00000000},
++ {0x0000b1d4, 0x00000000},
++ {0x0000b1d8, 0x00000000},
++ {0x0000b1dc, 0x00000000},
++ {0x0000b1e0, 0x00000000},
++ {0x0000b1e4, 0x00000000},
++ {0x0000b1e8, 0x00000000},
++ {0x0000b1ec, 0x00000000},
++ {0x0000b1f0, 0x00000396},
++ {0x0000b1f4, 0x00000396},
++ {0x0000b1f8, 0x00000396},
++ {0x0000b1fc, 0x00000196},
+ };
+
+ static const u32 ar9580_1p0_baseband_postamble[][5] = {
+@@ -956,7 +1169,7 @@ static const u32 ar9580_1p0_baseband_pos
+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++ {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -809,6 +809,8 @@
+ #define AR_SREV_REVISION_9462_21 3
+ #define AR_SREV_VERSION_9565 0x2C0
+ #define AR_SREV_REVISION_9565_10 0
++#define AR_SREV_REVISION_9565_101 1
++#define AR_SREV_REVISION_9565_11 2
+ #define AR_SREV_VERSION_9550 0x400
+
+ #define AR_SREV_5416(_ah) \
+@@ -927,10 +929,18 @@
+
+ #define AR_SREV_9565(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
+-
+ #define AR_SREV_9565_10(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10))
++#define AR_SREV_9565_101(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101))
++#define AR_SREV_9565_11(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11))
++#define AR_SREV_9565_11_OR_LATER(_ah) \
++ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
++ ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11))
+
+ #define AR_SREV_9550(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9550))
projects / openwrt.git / blobdiff