sunxi: driver refresh for 3.13
[openwrt.git] / target / linux / sunxi / patches-3.13 / 150-3-dt-sun7i-gmac-add-pinmuxing.patch
1 From 249ac8d24efdc07f521b796b96796ffa55abe0a5 Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Mon, 10 Feb 2014 18:35:50 +0800
4 Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
5
6 The A20 has EMAC and GMAC muxed on the same pins.
7 Add pin sets with gmac function for MII and RGMII mode to the DTSI.
8
9 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
10 ---
11  arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
12  1 file changed, 26 insertions(+)
13
14 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
15 index 87eab0d..9bb6fdf 100644
16 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
17 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
18 @@ -484,6 +484,32 @@
19                                 allwinner,drive = <0>;
20                                 allwinner,pull = <0>;
21                         };
22 +
23 +                       gmac_pins_mii_a: gmac_mii@0 {
24 +                               allwinner,pins = "PA0", "PA1", "PA2",
25 +                                               "PA3", "PA4", "PA5", "PA6",
26 +                                               "PA7", "PA8", "PA9", "PA10",
27 +                                               "PA11", "PA12", "PA13", "PA14",
28 +                                               "PA15", "PA16";
29 +                               allwinner,function = "gmac";
30 +                               allwinner,drive = <0>;
31 +                               allwinner,pull = <0>;
32 +                       };
33 +
34 +                       gmac_pins_rgmii_a: gmac_rgmii@0 {
35 +                               allwinner,pins = "PA0", "PA1", "PA2",
36 +                                               "PA3", "PA4", "PA5", "PA6",
37 +                                               "PA7", "PA8", "PA10",
38 +                                               "PA11", "PA12", "PA13",
39 +                                               "PA15", "PA16";
40 +                               allwinner,function = "gmac";
41 +                               /*
42 +                                * data lines in RGMII mode use DDR mode
43 +                                * and need a higher signal drive strength
44 +                                */
45 +                               allwinner,drive = <3>;
46 +                               allwinner,pull = <0>;
47 +                       };
48                 };
49  
50                 timer@01c20c00 {
51 -- 
52 1.8.5.5
53