afdaa5a2481c54daf1c8cab9d05d4434d9186e0f
[openwrt.git] / target / linux / sunxi / patches-3.12 / 137-3-dt-sun5i-a10s-add-hstimer.patch
1 From 5ace5467690055b1772dcac69dd1377735b8a34b Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Thu, 7 Nov 2013 12:01:48 +0100
4 Subject: [PATCH] ARM: sun5i: a10s: Add support for the High Speed Timers
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 The Allwinner A10s has support for two high speed timers. Now that we
10 have a driver to support it, we can enable them in the device tree.
11
12 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
13 Tested-by: Emilio López <emilio@elopez.com.ar>
14 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
15 ---
16  arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++
17  1 file changed, 7 insertions(+)
18
19 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
20 index b4764be..924a2c1 100644
21 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
22 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
23 @@ -336,5 +336,12 @@
24                         clock-frequency = <100000>;
25                         status = "disabled";
26                 };
27 +
28 +               timer@01c60000 {
29 +                       compatible = "allwinner,sun5i-a13-hstimer";
30 +                       reg = <0x01c60000 0x1000>;
31 +                       interrupts = <82>, <83>;
32 +                       clocks = <&ahb_gates 28>;
33 +               };
34         };
35  };
36 -- 
37 1.8.5.1
38