target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch

   1 From 23b8a1e056b74101ae9d51ccbab2d208e46c01a4 Mon Sep 17 00:00:00 2001
   2 From: mokopatches <mokopatches@openmoko.org>
   3 Date: Fri, 4 Apr 2008 11:34:06 +0100
   4 Subject: [PATCH] hxd8-core.patch
   5  This patch adds another machine, the FIC HXD8
   6
   7 ---
   8  arch/arm/mach-s3c2440/Kconfig       |    6 +
   9  arch/arm/mach-s3c2440/Makefile      |    1 +
  10  arch/arm/mach-s3c2440/mach-hxd8.c   |  381 +++++++++++++++++++++++++++++++++++
  11  include/asm-arm/arch-s3c2440/hxd8.h |   16 ++
  12  4 files changed, 404 insertions(+), 0 deletions(-)
  13  create mode 100644 arch/arm/mach-s3c2440/mach-hxd8.c
  14  create mode 100644 include/asm-arm/arch-s3c2440/hxd8.h
  15
  16 diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
  17 index f1915bd..6798d9c 100644
  18 --- a/arch/arm/mach-s3c2440/Kconfig
  19 +++ b/arch/arm/mach-s3c2440/Kconfig
  20 @@ -67,6 +67,12 @@ config SMDK2440_CPU2440
  21         default y if ARCH_S3C2440
  22         select CPU_S3C2440
  23
  24 +config MACH_HXD8
  25 +       bool "FIC HXD8"
  26 +       select CPU_S3C2440
  27 +       select SENSORS_PCF50606
  28 +       help
  29 +          Say Y here if you are using the FIC Neo1973 GSM Phone
  30
  31  endmenu
  32
  33 diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
  34 index c81ed62..6f590d4 100644
  35 --- a/arch/arm/mach-s3c2440/Makefile
  36 +++ b/arch/arm/mach-s3c2440/Makefile
  37 @@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_OSIRIS)     += mach-osiris.o
  38  obj-$(CONFIG_MACH_RX3715)      += mach-rx3715.o
  39  obj-$(CONFIG_ARCH_S3C2440)     += mach-smdk2440.o
  40  obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
  41 +obj-$(CONFIG_MACH_HXD8)                += mach-hxd8.o
  42 diff --git a/arch/arm/mach-s3c2440/mach-hxd8.c b/arch/arm/mach-s3c2440/mach-hxd8.c
  43 new file mode 100644
  44 index 0000000..3400ed3
  45 --- /dev/null
  46 +++ b/arch/arm/mach-s3c2440/mach-hxd8.c
  47 @@ -0,0 +1,381 @@
  48 +/* linux/arch/arm/mach-s3c2440/mach-hxd8.c
  49 + *
  50 + * S3C2440 Machine Support for the FIC HXD8
  51 + *
  52 + * Copyright (c) 2007 OpenMoko, Inc.
  53 + * Author: Harald Welte <laforge@openmoko.org>
  54 + * All rights reserved.
  55 + *
  56 + * This program is free software; you can redistribute it and/or
  57 + * modify it under the terms of the GNU General Public License as
  58 + * published by the Free Software Foundation; either version 2 of
  59 + * the License, or (at your option) any later version.
  60 + *
  61 + * This program is distributed in the hope that it will be useful,
  62 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  63 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  64 + * GNU General Public License for more details.
  65 + *
  66 + * You should have received a copy of the GNU General Public License
  67 + * along with this program; if not, write to the Free Software
  68 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  69 + * MA 02111-1307 USA
  70 + *
  71 + */
  72 +
  73 +#include <linux/kernel.h>
  74 +#include <linux/types.h>
  75 +#include <linux/interrupt.h>
  76 +#include <linux/list.h>
  77 +#include <linux/timer.h>
  78 +#include <linux/init.h>
  79 +#include <linux/workqueue.h>
  80 +#include <linux/serial_core.h>
  81 +#include <linux/platform_device.h>
  82 +#include <linux/mmc/host.h>
  83 +
  84 +#include <linux/mtd/mtd.h>
  85 +#include <linux/mtd/nand.h>
  86 +#include <linux/mtd/nand_ecc.h>
  87 +#include <linux/mtd/partitions.h>
  88 +
  89 +#include <linux/pcf50606.h>
  90 +
  91 +#include <asm/mach/arch.h>
  92 +#include <asm/mach/map.h>
  93 +#include <asm/mach/irq.h>
  94 +
  95 +#include <asm/hardware.h>
  96 +#include <asm/hardware/iomd.h>
  97 +#include <asm/io.h>
  98 +#include <asm/irq.h>
  99 +#include <asm/mach-types.h>
 100 +
 101 +//#include <asm/debug-ll.h>
 102 +#include <asm/arch/regs-gpio.h>
 103 +#include <asm/arch/regs-lcd.h>
 104 +#include <asm/arch/idle.h>
 105 +#include <asm/arch/fb.h>
 106 +#include <asm/arch/mci.h>
 107 +#include <asm/arch/ts.h>
 108 +#include <asm/arch/spi.h>
 109 +#include <asm/arch/spi-gpio.h>
 110 +#include <asm/arch/usb-control.h>
 111 +
 112 +#include <asm/arch-s3c2440/hxd8.h>
 113 +#include <asm/arch/gta01.h>
 114 +
 115 +//#include "s3c2410.h"
 116 +//#include "s3c2440.h"
 117 +//#include "clock.h"
 118 +#include <asm/plat-s3c/regs-serial.h>
 119 +#include <asm/plat-s3c/nand.h>
 120 +#include <asm/plat-s3c24xx/devs.h>
 121 +#include <asm/plat-s3c24xx/cpu.h>
 122 +#include <asm/plat-s3c24xx/pm.h>
 123 +#include <asm/plat-s3c24xx/udc.h>
 124 +
 125 +static struct map_desc hxd8_iodesc[] __initdata = {
 126 +       /* ISA IO Space map (memory space selected by A24) */
 127 +
 128 +       {
 129 +               .virtual        = (u32)S3C24XX_VA_ISA_WORD,
 130 +               .pfn            = __phys_to_pfn(S3C2410_CS2),
 131 +               .length         = 0x10000,
 132 +               .type           = MT_DEVICE,
 133 +       }, {
 134 +               .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
 135 +               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
 136 +               .length         = SZ_4M,
 137 +               .type           = MT_DEVICE,
 138 +       }, {
 139 +               .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
 140 +               .pfn            = __phys_to_pfn(S3C2410_CS2),
 141 +               .length         = 0x10000,
 142 +               .type           = MT_DEVICE,
 143 +       }, {
 144 +               .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
 145 +               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
 146 +               .length         = SZ_4M,
 147 +               .type           = MT_DEVICE,
 148 +       }
 149 +};
 150 +
 151 +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 152 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 153 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 154 +
 155 +static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = {
 156 +       [0] = {
 157 +               .hwport      = 0,
 158 +               .flags       = 0,
 159 +               .ucon        = 0x3c5,
 160 +               .ulcon       = 0x03,
 161 +               .ufcon       = 0x51,
 162 +       },
 163 +       [1] = {
 164 +               .hwport      = 1,
 165 +               .flags       = 0,
 166 +               .ucon        = 0x3c5,
 167 +               .ulcon       = 0x03,
 168 +               .ufcon       = 0x51,
 169 +       },
 170 +       [2] = {
 171 +               .hwport      = 2,
 172 +               .flags       = 0,
 173 +               .ucon        = 0x3c5,
 174 +               .ulcon       = 0x03,
 175 +               .ufcon       = 0x51,
 176 +       }
 177 +};
 178 +
 179 +static struct s3c2410_nand_set hxd8_nand_sets[] = {
 180 +       [0] = {
 181 +               .name           = "hxd8-nand",
 182 +               .nr_chips       = 1,
 183 +               .flags          = S3C2410_NAND_BBT,
 184 +       },
 185 +       [1] = {
 186 +               .name           = "hxd8-nand-1",
 187 +               .nr_chips       = 1,
 188 +               .flags          = S3C2410_NAND_BBT,
 189 +       },
 190 +       [2] = {
 191 +               .name           = "hxd8-nand-2",
 192 +               .nr_chips       = 1,
 193 +               .flags          = S3C2410_NAND_BBT,
 194 +       },
 195 +};
 196 +
 197 +/* choose a set of timings which should suit most 512Mbit
 198 + * chips and beyond.
 199 +*/
 200 +
 201 +static struct s3c2410_platform_nand hxd8_nand_info = {
 202 +       .tacls          = 20,
 203 +       .twrph0         = 60,
 204 +       .twrph1         = 20,
 205 +       .nr_sets        = ARRAY_SIZE(hxd8_nand_sets),
 206 +       .sets           = hxd8_nand_sets,
 207 +};
 208 +
 209 +/* PMU configuration */
 210 +
 211 +static struct pcf50606_platform_data hxd8_pcf_pdata = {
 212 +       .used_features  = PCF50606_FEAT_EXTON |
 213 +                         PCF50606_FEAT_BBC |
 214 +                         PCF50606_FEAT_WDT |
 215 +                         PCF50606_FEAT_RTC |
 216 +                         PCF50606_FEAT_PWM |
 217 +                         PCF50606_FEAT_PWM_BL |
 218 +                         PCF50606_FEAT_BATVOLT,
 219 +       .onkey_seconds_required = 5,
 220 +       .init_brightness = 8,
 221 +       .rails  = {
 222 +               [PCF50606_REGULATOR_D1REG] = {
 223 +                       .name           = "rc_3v3",
 224 +                       .voltage        = {
 225 +                               .init   = 3300,
 226 +                               .max    = 3300,
 227 +                       },
 228 +               },
 229 +               [PCF50606_REGULATOR_D2REG] = {
 230 +                       .name           = "gps_3v3",
 231 +                       .voltage        = {
 232 +                               .init   = 3300,
 233 +                               .max    = 3300,
 234 +                       },
 235 +               },
 236 +               [PCF50606_REGULATOR_D3REG] = {
 237 +                       .name           = "io2_3v3",
 238 +                       .voltage        = {
 239 +                               .init   = 3300,
 240 +                               .max    = 3300,
 241 +                       },
 242 +               },
 243 +               [PCF50606_REGULATOR_DCD] = {
 244 +                       .name           = "core_1v3",
 245 +                       .voltage        = {
 246 +                               .init   = 1300,
 247 +                               .max    = 1500,
 248 +                       },
 249 +               },
 250 +               [PCF50606_REGULATOR_DCDE] = {
 251 +                       .name           = "io1_3v3",
 252 +                       .voltage        = {
 253 +                               .init   = 3300,
 254 +                               .max    = 3300,
 255 +                       },
 256 +               },
 257 +               [PCF50606_REGULATOR_DCUD] = {
 258 +                       .name           = "rf_3v3",
 259 +                       .voltage        = {
 260 +                               .init   = 3300,
 261 +                               .max    = 3300,
 262 +                       },
 263 +               },
 264 +               [PCF50606_REGULATOR_IOREG] = {
 265 +                       .name           = "audio_3v3",
 266 +                       .voltage        = {
 267 +                               .init   = 3300,
 268 +                               .max    = 3300,
 269 +                       },
 270 +               },
 271 +               [PCF50606_REGULATOR_LPREG] = {
 272 +                       .name           = "lcm_3v3",
 273 +                       .voltage        = {
 274 +                               .init   = 3300,
 275 +                               .max    = 3300,
 276 +                       },
 277 +               },
 278 +       },
 279 +};
 280 +
 281 +static struct resource hxd8_pmu_resources[] = {
 282 +       [0] = {
 283 +               .flags  = IORESOURCE_IRQ,
 284 +               .start  = HXD8_IRQ_PCF50606,
 285 +               .end    = HXD8_IRQ_PCF50606,
 286 +       },
 287 +};
 288 +
 289 +static struct platform_device hxd8_pmu_dev = {
 290 +       .name           = "pcf50606",
 291 +       .num_resources  = ARRAY_SIZE(hxd8_pmu_resources),
 292 +       .resource       = hxd8_pmu_resources,
 293 +       .dev            = {
 294 +               .platform_data = &hxd8_pcf_pdata,
 295 +       },
 296 +};
 297 +
 298 +/* LCD driver info */
 299 +
 300 +static struct s3c2410fb_display hxd8_displays[] __initdata =  {
 301 +       {
 302 +               .type           = S3C2410_LCDCON1_TFT,
 303 +               .width          = 480,
 304 +               .height         = 272,
 305 +               .xres           = 480,
 306 +               .yres           = 272,
 307 +               .bpp            = 16,
 308 +
 309 +               .pixclock       = 40000,        /* HCLK/4 */
 310 +               .left_margin    = 2,
 311 +               .right_margin   = 2,
 312 +               .hsync_len      = 41,
 313 +               .upper_margin   = 2,
 314 +               .lower_margin   = 2,
 315 +               .vsync_len      = 10,
 316 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 317 +                                 S3C2410_LCDCON5_INVVLINE |
 318 +                                 S3C2410_LCDCON5_INVVFRAME,
 319 +       },
 320 +};
 321 +
 322 +static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = {
 323 +       .displays       = hxd8_displays,
 324 +       .num_displays   = ARRAY_SIZE(hxd8_displays),
 325 +       .default_display = 1,
 326 +
 327 +       .lpcsel         = ((0xCE6) & ~7),
 328 +};
 329 +
 330 +static struct platform_device hxd8_pm_gsm_dev = {
 331 +       .name           = "neo1973-pm-gsm",
 332 +};
 333 +
 334 +static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
 335 +{
 336 +       printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
 337 +
 338 +       switch (cmd) {
 339 +       case S3C2410_UDC_P_ENABLE:
 340 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1);
 341 +               break;
 342 +       case S3C2410_UDC_P_DISABLE:
 343 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0);
 344 +               break;
 345 +       case S3C2410_UDC_P_RESET:
 346 +               /* FIXME! */
 347 +               break;
 348 +       default:
 349 +               break;
 350 +       }
 351 +}
 352 +
 353 +/* USB Charger */
 354 +
 355 +static void hxd8_udc_vbus_draw(unsigned int ma)
 356 +{
 357 +       if (ma >= 500) {
 358 +               /* enable fast charge */
 359 +               printk(KERN_DEBUG "udc: enabling fast charge\n");
 360 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1);
 361 +       } else {
 362 +               /* disable fast charge */
 363 +               printk(KERN_DEBUG "udc: disabling fast charge\n");
 364 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0);
 365 +       }
 366 +}
 367 +
 368 +static struct s3c2410_udc_mach_info hxd8_udc_cfg = {
 369 +       .vbus_draw      = hxd8_udc_vbus_draw,
 370 +};
 371 +
 372 +/* Touch Screen */
 373 +static struct s3c2410_ts_mach_info hxd8_ts_cfg = {
 374 +       .delay = 10000,
 375 +       .presc = 49,
 376 +       .oversampling_shift = 4,
 377 +};
 378 +
 379 +static struct platform_device *hxd8_devices[] __initdata = {
 380 +       &s3c_device_usb,
 381 +       &s3c_device_lcd,
 382 +       &s3c_device_wdt,
 383 +       &s3c_device_i2c,
 384 +       &s3c_device_iis,
 385 +       &s3c_device_sdi,
 386 +       &s3c_device_usbgadget,
 387 +       &s3c_device_nand,
 388 +       &s3c_device_ts,
 389 +};
 390 +
 391 +static void __init hxd8_map_io(void)
 392 +{
 393 +       s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc));
 394 +       s3c24xx_init_clocks(16934400);
 395 +       s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs));
 396 +}
 397 +
 398 +static void __init hxd8_machine_init(void)
 399 +{
 400 +       hxd8_udc_cfg.udc_command = gta01_udc_command;
 401 +       s3c_device_nand.dev.platform_data = &hxd8_nand_info;
 402 +
 403 +       s3c24xx_fb_set_platdata(&hxd8_lcd_cfg);
 404 +
 405 +       s3c24xx_udc_set_platdata(&hxd8_udc_cfg);
 406 +       set_s3c2410ts_info(&hxd8_ts_cfg);
 407 +
 408 +       //platform_device_register(&gta01_button_dev);
 409 +       platform_device_register(&hxd8_pm_gsm_dev);
 410 +
 411 +       platform_device_register(&hxd8_pmu_dev);
 412 +
 413 +       platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices));
 414 +
 415 +       s3c2410_pm_init();
 416 +}
 417 +
 418 +MACHINE_START(HXD8, "HXD8")
 419 +       /* Maintainer: Harald Welte <laforge@openmoko.org> */
 420 +       .phys_io        = S3C2410_PA_UART,
 421 +       .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 422 +       .boot_params    = S3C2410_SDRAM_PA + 0x100,
 423 +
 424 +       .init_irq       = s3c24xx_init_irq,
 425 +       .map_io         = hxd8_map_io,
 426 +       .init_machine   = hxd8_machine_init,
 427 +       .timer          = &s3c24xx_timer,
 428 +MACHINE_END
 429 diff --git a/include/asm-arm/arch-s3c2440/hxd8.h b/include/asm-arm/arch-s3c2440/hxd8.h
 430 new file mode 100644
 431 index 0000000..50e9c11
 432 --- /dev/null
 433 +++ b/include/asm-arm/arch-s3c2440/hxd8.h
 434 @@ -0,0 +1,16 @@
 435 +#ifndef _HXD8_H
 436 +#define _HXD8_H
 437 +
 438 +#include <asm/arch/regs-gpio.h>
 439 +#include <asm/arch/irqs.h>
 440 +
 441 +#define HXD8v1_SYSTEM_REV      0x00000110
 442 +
 443 +#define HXD8_GPIO_USB_CUR_SEL  S3C2410_GPA0
 444 +#define HXD8_GPIO_BACKLIGHT    S3C2410_GPB0
 445 +#define HXD8_GPIO_USB_PULLUP   S3C2410_GPB9
 446 +#define HXD8_GPIO_PCF50606     S3C2410_GPF6
 447 +
 448 +#define HXD8_IRQ_PCF50606      IRQ_EINT6
 449 +
 450 +#endif
 451 --
 452 1.5.6.5
 453