target/linux/ramips/patches-3.9/0117-DT-MIPS-ralink-clean-up-RT3050-dtsi-and-dts-file.patch

   1 From 0f26ec753f34e16e00d25c576a190765aedd62c9 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 21 Mar 2013 17:47:07 +0100
   4 Subject: [PATCH 117/164] DT: MIPS: ralink: clean up RT3050 dtsi and dts file
   5
   6 * remove nodes for cores whose drivers are not upstream yet
   7 * add compat string for an additional soc
   8 * fix a whitespace error
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 Acked-by: Grant Likely <grant.likely@secretlab.ca>
  12 Patchwork: http://patchwork.linux-mips.org/patch/5186/
  13 ---
  14  arch/mips/ralink/dts/rt3050.dtsi     |   52 ++--------------------------------
  15  arch/mips/ralink/dts/rt3052_eval.dts |   10 ++-----
  16  2 files changed, 4 insertions(+), 58 deletions(-)
  17
  18 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
  19 index 069d066..ef7da1e 100644
  20 --- a/arch/mips/ralink/dts/rt3050.dtsi
  21 +++ b/arch/mips/ralink/dts/rt3050.dtsi
  22 @@ -1,7 +1,7 @@
  23  / {
  24         #address-cells = <1>;
  25         #size-cells = <1>;
  26 -       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
  27 +       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
  28
  29         cpus {
  30                 cpu@0 {
  31 @@ -9,10 +9,6 @@
  32                 };
  33         };
  34
  35 -       chosen {
  36 -               bootargs = "console=ttyS0,57600 init=/init";
  37 -       };
  38 -
  39         cpuintc: cpuintc@0 {
  40                 #address-cells = <0>;
  41                 #interrupt-cells = <1>;
  42 @@ -23,7 +19,7 @@
  43         palmbus@10000000 {
  44                 compatible = "palmbus";
  45                 reg = <0x10000000 0x200000>;
  46 -                ranges = <0x0 0x10000000 0x1FFFFF>;
  47 +               ranges = <0x0 0x10000000 0x1FFFFF>;
  48
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51 @@ -33,11 +29,6 @@
  52                         reg = <0x0 0x100>;
  53                 };
  54
  55 -               timer@100 {
  56 -                       compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
  57 -                       reg = <0x100 0x100>;
  58 -               };
  59 -
  60                 intc: intc@200 {
  61                         compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
  62                         reg = <0x200 0x100>;
  63 @@ -54,45 +45,6 @@
  64                         reg = <0x300 0x100>;
  65                 };
  66
  67 -               gpio0: gpio@600 {
  68 -                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  69 -                       reg = <0x600 0x34>;
  70 -
  71 -                       gpio-controller;
  72 -                       #gpio-cells = <2>;
  73 -
  74 -                       ralink,ngpio = <24>;
  75 -                       ralink,regs = [ 00 04 08 0c
  76 -                                       20 24 28 2c
  77 -                                       30 34 ];
  78 -               };
  79 -
  80 -               gpio1: gpio@638 {
  81 -                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  82 -                       reg = <0x638 0x24>;
  83 -
  84 -                       gpio-controller;
  85 -                       #gpio-cells = <2>;
  86 -
  87 -                       ralink,ngpio = <16>;
  88 -                       ralink,regs = [ 00 04 08 0c
  89 -                                       10 14 18 1c
  90 -                                       20 24 ];
  91 -               };
  92 -
  93 -               gpio2: gpio@660 {
  94 -                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
  95 -                       reg = <0x660 0x24>;
  96 -
  97 -                       gpio-controller;
  98 -                       #gpio-cells = <2>;
  99 -
 100 -                       ralink,ngpio = <12>;
 101 -                       ralink,regs = [ 00 04 08 0c
 102 -                                       10 14 18 1c
 103 -                                       20 24 ];
 104 -               };
 105 -
 106                 uartlite@c00 {
 107                         compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
 108                         reg = <0xc00 0x100>;
 109 diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
 110 index 148a590..df17f5f 100644
 111 --- a/arch/mips/ralink/dts/rt3052_eval.dts
 112 +++ b/arch/mips/ralink/dts/rt3052_eval.dts
 113 @@ -3,8 +3,6 @@
 114  /include/ "rt3050.dtsi"
 115
 116  / {
 117 -       #address-cells = <1>;
 118 -       #size-cells = <1>;
 119         compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
 120         model = "Ralink RT3052 evaluation board";
 121
 122 @@ -12,12 +10,8 @@
 123                 reg = <0x0 0x2000000>;
 124         };
 125
 126 -       palmbus@10000000 {
 127 -               sysc@0 {
 128 -                       ralink,pinmmux = "uartlite", "spi";
 129 -                       ralink,uartmux = "gpio";
 130 -                       ralink,wdtmux = <0>;
 131 -               };
 132 +       chosen {
 133 +               bootargs = "console=ttyS0,57600";
 134         };
 135
 136         cfi@1f000000 {
 137 --
 138 1.7.10.4
 139