1 From e0fbc01d33265d32fe7f5f34269cb88be2a13c24 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 31 Mar 2013 10:17:26 +0200
4 Subject: [PATCH] MIPS: ralink: handle PCI interrupts as well
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
8 arch/mips/ralink/irq.c | 4 ++++
9 1 file changed, 4 insertions(+)
11 --- a/arch/mips/ralink/irq.c
12 +++ b/arch/mips/ralink/irq.c
14 #define INTC_INT_GLOBAL BIT(31)
16 #define RALINK_CPU_IRQ_INTC (MIPS_CPU_IRQ_BASE + 2)
17 +#define RALINK_CPU_IRQ_PCI (MIPS_CPU_IRQ_BASE + 4)
18 #define RALINK_CPU_IRQ_FE (MIPS_CPU_IRQ_BASE + 5)
19 #define RALINK_CPU_IRQ_WIFI (MIPS_CPU_IRQ_BASE + 6)
20 #define RALINK_CPU_IRQ_COUNTER (MIPS_CPU_IRQ_BASE + 7)
21 @@ -104,6 +105,9 @@ asmlinkage void plat_irq_dispatch(void)
22 else if (pending & STATUSF_IP6)
23 do_IRQ(RALINK_CPU_IRQ_WIFI);
25 + else if (pending & STATUSF_IP4)
26 + do_IRQ(RALINK_CPU_IRQ_PCI);
28 else if (pending & STATUSF_IP2)
29 do_IRQ(RALINK_CPU_IRQ_INTC);