1 From 9d13fedc08f4e2cd9640983c2af8b9e9c64c094b Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 21 Mar 2013 18:37:00 +0100
4 Subject: [PATCH 110/121] MIPS: add rt3883 dts files
6 Add a dtsi file for RT3883 SoC. This SoC is almost the same as RT3050 but has
7 OHCI/EHCI in favour of the Synopsis DWC2 core. There is also a 3x3 802.11n
10 Signed-off-by: John Crispin <blogic@openwrt.org>
12 arch/mips/ralink/Kconfig | 4 +
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/rt3883.dtsi | 186 ++++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/rt3883_eval.dts | 52 ++++++++++
16 4 files changed, 243 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/rt3883.dtsi
18 create mode 100644 arch/mips/ralink/dts/rt3883_eval.dts
20 --- a/arch/mips/ralink/Kconfig
21 +++ b/arch/mips/ralink/Kconfig
22 @@ -39,6 +39,10 @@ choice
23 bool "RT305x eval kit"
26 + config DTB_RT3883_EVAL
27 + bool "RT3883 eval kit"
28 + depends on SOC_RT3883
33 --- a/arch/mips/ralink/dts/Makefile
34 +++ b/arch/mips/ralink/dts/Makefile
36 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
37 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
38 +obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
40 +++ b/arch/mips/ralink/dts/rt3883.dtsi
43 + #address-cells = <1>;
45 + compatible = "ralink,rt3883-soc";
49 + compatible = "mips,mips74Kc";
54 + bootargs = "console=ttyS0,57600 init=/init";
57 + cpuintc: cpuintc@0 {
58 + #address-cells = <0>;
59 + #interrupt-cells = <1>;
60 + interrupt-controller;
61 + compatible = "mti,cpu-interrupt-controller";
65 + compatible = "palmbus";
66 + reg = <0x10000000 0x200000>;
67 + ranges = <0x0 0x10000000 0x1FFFFF>;
69 + #address-cells = <1>;
73 + compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
78 + compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
81 + interrupt-parent = <&intc>;
84 + status = "disabled";
88 + compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
93 + compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
94 + reg = <0x200 0x100>;
96 + interrupt-controller;
97 + #interrupt-cells = <1>;
99 + interrupt-parent = <&cpuintc>;
104 + compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
105 + reg = <0x300 0x100>;
109 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
110 + reg = <0x600 0x34>;
115 + ralink,num-gpios = <24>;
116 + ralink,register-map = [ 00 04 08 0c
120 + status = "disabled";
124 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
125 + reg = <0x638 0x24>;
130 + ralink,num-gpios = <16>;
131 + ralink,register-map = [ 00 04 08 0c
135 + status = "disabled";
139 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
140 + reg = <0x660 0x24>;
145 + ralink,num-gpios = <32>;
146 + ralink,register-map = [ 00 04 08 0c
150 + status = "disabled";
154 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
155 + reg = <0x688 0x24>;
160 + ralink,num-gpios = <24>;
161 + ralink,register-map = [ 00 04 08 0c
165 + status = "disabled";
169 + compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
170 + reg = <0xb00 0x100>;
171 + #address-cells = <1>;
174 + status = "disabled";
178 + compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
179 + reg = <0xc00 0x100>;
181 + interrupt-parent = <&intc>;
188 + ethernet@10100000 {
189 + compatible = "ralink,rt3883-eth";
190 + reg = <0x10100000 10000>;
192 + interrupt-parent = <&cpuintc>;
195 + status = "disabled";
199 + compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
200 + reg = <0x10180000 40000>;
202 + interrupt-parent = <&cpuintc>;
205 + status = "disabled";
209 + compatible = "ralink,rt3883-ehci", "ehci-platform";
210 + reg = <0x101c0000 0x1000>;
212 + interrupt-parent = <&intc>;
215 + status = "disabled";
219 + compatible = "ralink,rt3883-ohci", "ohci-platform";
220 + reg = <0x101c1000 0x1000>;
222 + interrupt-parent = <&intc>;
225 + status = "disabled";
229 +++ b/arch/mips/ralink/dts/rt3883_eval.dts
233 +/include/ "rt3883.dtsi"
236 + #address-cells = <1>;
238 + compatible = "ralink,rt3883-eval-board", "ralink,rt3883-soc";
239 + model = "Ralink RT3883 evaluation board";
242 + reg = <0x0 0x4000000>;
247 + ralink,pinmux = "uartlite", "spi";
248 + ralink,uartmux = "gpio";
249 + ralink,wdtmux = <0>;
254 + compatible = "cfi-flash";
255 + reg = <0x1f000000 0x800000>;
258 + device-width = <2>;
259 + #address-cells = <1>;
264 + reg = <0x0 0x30000>;
268 + label = "uboot-env";
269 + reg = <0x30000 0x10000>;
273 + label = "calibration";
274 + reg = <0x40000 0x10000>;
279 + reg = <0x50000 0x7b0000>;