target/linux/ramips/patches-3.8/0007-MIPS-ralink-adds-early_printk-support.patch

   1 From 5fff610b7c60195de98e68bec00c357f393ce634 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 20 Jan 2013 22:02:55 +0100
   4 Subject: [PATCH 07/14] MIPS: ralink: adds early_printk support
   5
   6 Add the code needed to make early printk work.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Patchwork: http://patchwork.linux-mips.org/patch/4897/
  11 ---
  12  arch/mips/ralink/early_printk.c |   44 +++++++++++++++++++++++++++++++++++++++
  13  1 file changed, 44 insertions(+)
  14  create mode 100644 arch/mips/ralink/early_printk.c
  15
  16 --- /dev/null
  17 +++ b/arch/mips/ralink/early_printk.c
  18 @@ -0,0 +1,44 @@
  19 +/*
  20 + *  This program is free software; you can redistribute it and/or modify it
  21 + *  under the terms of the GNU General Public License version 2 as published
  22 + *  by the Free Software Foundation.
  23 + *
  24 + *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
  25 + */
  26 +
  27 +#include <linux/io.h>
  28 +#include <linux/serial_reg.h>
  29 +
  30 +#include <asm/addrspace.h>
  31 +
  32 +#define EARLY_UART_BASE         0x10000c00
  33 +
  34 +#define UART_REG_RX             0x00
  35 +#define UART_REG_TX             0x04
  36 +#define UART_REG_IER            0x08
  37 +#define UART_REG_IIR            0x0c
  38 +#define UART_REG_FCR            0x10
  39 +#define UART_REG_LCR            0x14
  40 +#define UART_REG_MCR            0x18
  41 +#define UART_REG_LSR            0x1c
  42 +
  43 +static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
  44 +
  45 +static inline void uart_w32(u32 val, unsigned reg)
  46 +{
  47 +       __raw_writel(val, uart_membase + reg);
  48 +}
  49 +
  50 +static inline u32 uart_r32(unsigned reg)
  51 +{
  52 +       return __raw_readl(uart_membase + reg);
  53 +}
  54 +
  55 +void prom_putchar(unsigned char ch)
  56 +{
  57 +       while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
  58 +               ;
  59 +       uart_w32(ch, UART_REG_TX);
  60 +       while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
  61 +               ;
  62 +}