target/linux/ramips/patches-3.18/0043-mtd-ralink-add-mt7620-nand-driver.patch

   1 From b915fe7cd934160bfaf2cd52f03c118abcae2419 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 17 Nov 2013 17:41:46 +0100
   4 Subject: [PATCH 43/57] mtd: ralink: add mt7620 nand driver
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/mtd/maps/Kconfig       |    4 +
   9  drivers/mtd/maps/Makefile      |    2 +
  10  drivers/mtd/maps/ralink_nand.c | 2136 ++++++++++++++++++++++++++++++++++++++++
  11  drivers/mtd/maps/ralink_nand.h |  232 +++++
  12  4 files changed, 2374 insertions(+)
  13  create mode 100644 drivers/mtd/maps/ralink_nand.c
  14  create mode 100644 drivers/mtd/maps/ralink_nand.h
  15
  16 --- a/drivers/mtd/maps/Kconfig
  17 +++ b/drivers/mtd/maps/Kconfig
  18 @@ -399,4 +399,8 @@ config MTD_LATCH_ADDR
  19
  20            If compiled as a module, it will be called latch-addr-flash.
  21
  22 +config MTD_NAND_MT7620
  23 +       tristate "Support for NAND on Mediatek MT7620"
  24 +       depends on RALINK && SOC_MT7620
  25 +
  26  endmenu
  27 --- a/drivers/mtd/maps/Makefile
  28 +++ b/drivers/mtd/maps/Makefile
  29 @@ -43,3 +43,5 @@ obj-$(CONFIG_MTD_VMU)         += vmu-flash.o
  30  obj-$(CONFIG_MTD_GPIO_ADDR)    += gpio-addr-flash.o
  31  obj-$(CONFIG_MTD_LATCH_ADDR)   += latch-addr-flash.o
  32  obj-$(CONFIG_MTD_LANTIQ)       += lantiq-flash.o
  33 +obj-$(CONFIG_MTD_NAND_MT7620)  += ralink_nand.o
  34 +
  35 --- /dev/null
  36 +++ b/drivers/mtd/maps/ralink_nand.c
  37 @@ -0,0 +1,2136 @@
  38 +#define DEBUG
  39 +#include <linux/device.h>
  40 +#undef DEBUG
  41 +#include <linux/slab.h>
  42 +#include <linux/mtd/mtd.h>
  43 +#include <linux/delay.h>
  44 +#include <linux/module.h>
  45 +#include <linux/interrupt.h>
  46 +#include <linux/dma-mapping.h>
  47 +#include <linux/mtd/partitions.h>
  48 +#include <asm/io.h>
  49 +#include <linux/delay.h>
  50 +#include <linux/sched.h>
  51 +#include <linux/of.h>
  52 +#include <linux/platform_device.h>
  53 +
  54 +#include "ralink_nand.h"
  55 +#ifdef RANDOM_GEN_BAD_BLOCK
  56 +#include <linux/random.h>
  57 +#endif
  58 +
  59 +#define LARGE_MTD_BOOT_PART_SIZE       (CFG_BLOCKSIZE<<2)
  60 +#define LARGE_MTD_CONFIG_PART_SIZE     (CFG_BLOCKSIZE<<2)
  61 +#define LARGE_MTD_FACTORY_PART_SIZE    (CFG_BLOCKSIZE<<1)
  62 +
  63 +
  64 +#define BLOCK_ALIGNED(a) ((a) & (CFG_BLOCKSIZE - 1))
  65 +
  66 +#define READ_STATUS_RETRY      1000
  67 +
  68 +struct mtd_info *ranfc_mtd = NULL;
  69 +
  70 +int skipbbt = 0;
  71 +int ranfc_debug = 1;
  72 +static int ranfc_bbt = 1;
  73 +#if defined (WORKAROUND_RX_BUF_OV)
  74 +static int ranfc_verify = 1;
  75 +#endif
  76 +static u32 nand_addrlen;
  77 +
  78 +#if 0
  79 +module_param(ranfc_debug, int, 0644);
  80 +module_param(ranfc_bbt, int, 0644);
  81 +module_param(ranfc_verify, int, 0644);
  82 +#endif
  83 +
  84 +#if 0
  85 +#define ra_dbg(args...) do { if (ranfc_debug) printk(args); } while(0)
  86 +#else
  87 +#define ra_dbg(args...)
  88 +#endif
  89 +
  90 +#define CLEAR_INT_STATUS()     ra_outl(NFC_INT_ST, ra_inl(NFC_INT_ST))
  91 +#define NFC_TRANS_DONE()       (ra_inl(NFC_INT_ST) & INT_ST_ND_DONE)
  92 +
  93 +int is_nand_page_2048 = 0;
  94 +const unsigned int nand_size_map[2][3] = {{25, 30, 30}, {20, 27, 30}};
  95 +
  96 +static int nfc_wait_ready(int snooze_ms);
  97 +
  98 +static const char * const mtk_probe_types[] = { "cmdlinepart", "ofpart", NULL };
  99 +
 100 +/**
 101 + * reset nand chip
 102 + */
 103 +static int nfc_chip_reset(void)
 104 +{
 105 +       int status;
 106 +
 107 +       //ra_dbg("%s:\n", __func__);
 108 +
 109 +       // reset nand flash
 110 +       ra_outl(NFC_CMD1, 0x0);
 111 +       ra_outl(NFC_CMD2, 0xff);
 112 +       ra_outl(NFC_ADDR, 0x0);
 113 +       ra_outl(NFC_CONF, 0x0411);
 114 +
 115 +       status = nfc_wait_ready(5);  //erase wait 5us
 116 +       if (status & NAND_STATUS_FAIL) {
 117 +               printk("%s: fail \n", __func__);
 118 +       }
 119 +
 120 +       return (int)(status & NAND_STATUS_FAIL);
 121 +
 122 +}
 123 +
 124 +
 125 +
 126 +/**
 127 + * clear NFC and flash chip.
 128 + */
 129 +static int nfc_all_reset(void)
 130 +{
 131 +       int retry;
 132 +
 133 +       ra_dbg("%s: \n", __func__);
 134 +
 135 +       // reset controller
 136 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 137 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 138 +
 139 +       CLEAR_INT_STATUS();
 140 +
 141 +       retry = READ_STATUS_RETRY;
 142 +       while ((ra_inl(NFC_INT_ST) & 0x02) != 0x02 && retry--);
 143 +       if (retry <= 0) {
 144 +               printk("nfc_all_reset: clean buffer fail \n");
 145 +               return -1;
 146 +       }
 147 +
 148 +       retry = READ_STATUS_RETRY;
 149 +       while ((ra_inl(NFC_STATUS) & 0x1) != 0x0 && retry--) { //fixme, controller is busy ?
 150 +               udelay(1);
 151 +       }
 152 +
 153 +       nfc_chip_reset();
 154 +
 155 +       return 0;
 156 +}
 157 +
 158 +/** NOTICE: only called by nfc_wait_ready().
 159 + * @return -1, nfc can not get transction done
 160 + * @return 0, ok.
 161 + */
 162 +static int _nfc_read_status(char *status)
 163 +{
 164 +       unsigned long cmd1, conf;
 165 +       int int_st, nfc_st;
 166 +       int retry;
 167 +
 168 +       cmd1 = 0x70;
 169 +       conf = 0x000101 | (1 << 20);
 170 +
 171 +       //fixme, should we check nfc status?
 172 +       CLEAR_INT_STATUS();
 173 +
 174 +       ra_outl(NFC_CMD1, cmd1);
 175 +       ra_outl(NFC_CONF, conf);
 176 +
 177 +       /* FIXME,
 178 +        * 1. since we have no wired ready signal, directly
 179 +        * calling this function is not gurantee to read right status under ready state.
 180 +        * 2. the other side, we can not determine how long to become ready, this timeout retry is nonsense.
 181 +        * 3. SUGGESTION: call nfc_read_status() from nfc_wait_ready(),
 182 +        * that is aware about caller (in sementics) and has snooze plused nfc ND_DONE.
 183 +        */
 184 +       retry = READ_STATUS_RETRY;
 185 +       do {
 186 +               nfc_st = ra_inl(NFC_STATUS);
 187 +               int_st = ra_inl(NFC_INT_ST);
 188 +
 189 +               ndelay(10);
 190 +       } while (!(int_st & INT_ST_RX_BUF_RDY) && retry--);
 191 +
 192 +       if (!(int_st & INT_ST_RX_BUF_RDY)) {
 193 +               printk("nfc_read_status: NFC fail, int_st(%x), retry:%x. nfc:%x, reset nfc and flash. \n",
 194 +                      int_st, retry, nfc_st);
 195 +               nfc_all_reset();
 196 +               *status = NAND_STATUS_FAIL;
 197 +               return -1;
 198 +       }
 199 +
 200 +       *status = (char)(le32_to_cpu(ra_inl(NFC_DATA)) & 0x0ff);
 201 +       return 0;
 202 +}
 203 +
 204 +/**
 205 + * @return !0, chip protect.
 206 + * @return 0, chip not protected.
 207 + */
 208 +static int nfc_check_wp(void)
 209 +{
 210 +       /* Check the WP bit */
 211 +#if !defined CONFIG_NOT_SUPPORT_WP
 212 +       return !!(ra_inl(NFC_CTRL) & 0x01);
 213 +#else
 214 +       char result = 0;
 215 +       int ret;
 216 +
 217 +       ret = _nfc_read_status(&result);
 218 +       //FIXME, if ret < 0
 219 +
 220 +       return !(result & NAND_STATUS_WP);
 221 +#endif
 222 +}
 223 +
 224 +#if !defined CONFIG_NOT_SUPPORT_RB
 225 +/*
 226 + * @return !0, chip ready.
 227 + * @return 0, chip busy.
 228 + */
 229 +static int nfc_device_ready(void)
 230 +{
 231 +       /* Check the ready  */
 232 +       return !!(ra_inl(NFC_STATUS) & 0x04);
 233 +}
 234 +#endif
 235 +
 236 +
 237 +/**
 238 + * generic function to get data from flash.
 239 + * @return data length reading from flash.
 240 + */
 241 +static int _ra_nand_pull_data(char *buf, int len, int use_gdma)
 242 +{
 243 +#ifdef RW_DATA_BY_BYTE
 244 +       char *p = buf;
 245 +#else
 246 +       __u32 *p = (__u32 *)buf;
 247 +#endif
 248 +       int retry, int_st;
 249 +       unsigned int ret_data;
 250 +       int ret_size;
 251 +
 252 +       // receive data by use_gdma
 253 +       if (use_gdma) {
 254 +               //if (_ra_nand_dma_pull((unsigned long)p, len)) {
 255 +               if (1) {
 256 +                       printk("%s: fail \n", __func__);
 257 +                       len = -1; //return error
 258 +               }
 259 +
 260 +               return len;
 261 +       }
 262 +
 263 +       //fixme: retry count size?
 264 +       retry = READ_STATUS_RETRY;
 265 +       // no gdma
 266 +       while (len > 0) {
 267 +               int_st = ra_inl(NFC_INT_ST);
 268 +               if (int_st & INT_ST_RX_BUF_RDY) {
 269 +
 270 +                       ret_data = ra_inl(NFC_DATA);
 271 +                       ra_outl(NFC_INT_ST, INT_ST_RX_BUF_RDY);
 272 +#ifdef RW_DATA_BY_BYTE
 273 +                       ret_size = sizeof(unsigned int);
 274 +                       ret_size = min(ret_size, len);
 275 +                       len -= ret_size;
 276 +                       while (ret_size-- > 0) {
 277 +                               //nfc is little endian
 278 +                               *p++ = ret_data & 0x0ff;
 279 +                               ret_data >>= 8;
 280 +                       }
 281 +#else
 282 +                       ret_size = min(len, 4);
 283 +                       len -= ret_size;
 284 +                       if (ret_size == 4)
 285 +                               *p++ = ret_data;
 286 +                       else {
 287 +                               __u8 *q = (__u8 *)p;
 288 +                               while (ret_size-- > 0) {
 289 +                                       *q++ = ret_data & 0x0ff;
 290 +                                       ret_data >>= 8;
 291 +                               }
 292 +                               p = (__u32 *)q;
 293 +                       }
 294 +#endif
 295 +                       retry = READ_STATUS_RETRY;
 296 +               }
 297 +               else if (int_st & INT_ST_ND_DONE) {
 298 +                       break;
 299 +               }
 300 +               else {
 301 +                       udelay(1);
 302 +                       if (retry-- < 0)
 303 +                               break;
 304 +               }
 305 +       }
 306 +
 307 +#ifdef RW_DATA_BY_BYTE
 308 +       return (int)(p - buf);
 309 +#else
 310 +       return ((int)p - (int)buf);
 311 +#endif
 312 +}
 313 +
 314 +/**
 315 + * generic function to put data into flash.
 316 + * @return data length writing into flash.
 317 + */
 318 +static int _ra_nand_push_data(char *buf, int len, int use_gdma)
 319 +{
 320 +#ifdef RW_DATA_BY_BYTE
 321 +       char *p = buf;
 322 +#else
 323 +       __u32 *p = (__u32 *)buf;
 324 +#endif
 325 +       int retry, int_st;
 326 +       unsigned int tx_data = 0;
 327 +       int tx_size, iter = 0;
 328 +
 329 +       // receive data by use_gdma
 330 +       if (use_gdma) {
 331 +               //if (_ra_nand_dma_push((unsigned long)p, len))
 332 +               if (1)
 333 +                       len = 0;
 334 +               printk("%s: fail \n", __func__);
 335 +               return len;
 336 +       }
 337 +
 338 +       // no gdma
 339 +       retry = READ_STATUS_RETRY;
 340 +       while (len > 0) {
 341 +               int_st = ra_inl(NFC_INT_ST);
 342 +               if (int_st & INT_ST_TX_BUF_RDY) {
 343 +#ifdef RW_DATA_BY_BYTE
 344 +                       tx_size = min(len, (int)sizeof(unsigned long));
 345 +                       for (iter = 0; iter < tx_size; iter++) {
 346 +                               tx_data |= (*p++ << (8*iter));
 347 +                       }
 348 +#else
 349 +                       tx_size = min(len, 4);
 350 +                       if (tx_size == 4)
 351 +                               tx_data = (*p++);
 352 +                       else {
 353 +                               __u8 *q = (__u8 *)p;
 354 +                               for (iter = 0; iter < tx_size; iter++)
 355 +                                       tx_data |= (*q++ << (8*iter));
 356 +                               p = (__u32 *)q;
 357 +                       }
 358 +#endif
 359 +                       ra_outl(NFC_INT_ST, INT_ST_TX_BUF_RDY);
 360 +                       ra_outl(NFC_DATA, tx_data);
 361 +                       len -= tx_size;
 362 +                       retry = READ_STATUS_RETRY;
 363 +               }
 364 +               else if (int_st & INT_ST_ND_DONE) {
 365 +                       break;
 366 +               }
 367 +               else {
 368 +                       udelay(1);
 369 +                       if (retry-- < 0) {
 370 +                               ra_dbg("%s p:%p buf:%p \n", __func__, p, buf);
 371 +                               break;
 372 +                       }
 373 +               }
 374 +       }
 375 +
 376 +
 377 +#ifdef RW_DATA_BY_BYTE
 378 +       return (int)(p - buf);
 379 +#else
 380 +       return ((int)p - (int)buf);
 381 +#endif
 382 +
 383 +}
 384 +
 385 +static int nfc_select_chip(struct ra_nand_chip *ra, int chipnr)
 386 +{
 387 +#if (CONFIG_NUMCHIPS == 1)
 388 +       if (!(chipnr < CONFIG_NUMCHIPS))
 389 +               return -1;
 390 +       return 0;
 391 +#else
 392 +       BUG();
 393 +#endif
 394 +}
 395 +
 396 +/** @return -1: chip_select fail
 397 + *         0 : both CE and WP==0 are OK
 398 + *         1 : CE OK and WP==1
 399 + */
 400 +static int nfc_enable_chip(struct ra_nand_chip *ra, unsigned int offs, int read_only)
 401 +{
 402 +       int chipnr = offs >> ra->chip_shift;
 403 +
 404 +       ra_dbg("%s: offs:%x read_only:%x \n", __func__, offs, read_only);
 405 +
 406 +       chipnr = nfc_select_chip(ra, chipnr);
 407 +       if (chipnr < 0) {
 408 +               printk("%s: chip select error, offs(%x)\n", __func__, offs);
 409 +               return -1;
 410 +       }
 411 +
 412 +       if (!read_only)
 413 +               return nfc_check_wp();
 414 +
 415 +       return 0;
 416 +}
 417 +
 418 +/** wait nand chip becomeing ready and return queried status.
 419 + * @param snooze: sleep time in ms unit before polling device ready.
 420 + * @return status of nand chip
 421 + * @return NAN_STATUS_FAIL if something unexpected.
 422 + */
 423 +static int nfc_wait_ready(int snooze_ms)
 424 +{
 425 +       int retry;
 426 +       char status;
 427 +
 428 +       // wait nfc idle,
 429 +       if (snooze_ms == 0)
 430 +               snooze_ms = 1;
 431 +       else
 432 +               schedule_timeout(snooze_ms * HZ / 1000);
 433 +
 434 +       snooze_ms = retry = snooze_ms *1000000 / 100 ;  // ndelay(100)
 435 +
 436 +       while (!NFC_TRANS_DONE() && retry--) {
 437 +               if (!cond_resched())
 438 +                       ndelay(100);
 439 +       }
 440 +
 441 +       if (!NFC_TRANS_DONE()) {
 442 +               printk("nfc_wait_ready: no transaction done \n");
 443 +               return NAND_STATUS_FAIL;
 444 +       }
 445 +
 446 +#if !defined (CONFIG_NOT_SUPPORT_RB)
 447 +       //fixme
 448 +       while(!(status = nfc_device_ready()) && retry--) {
 449 +               ndelay(100);
 450 +       }
 451 +
 452 +       if (status == 0) {
 453 +               printk("nfc_wait_ready: no device ready. \n");
 454 +               return NAND_STATUS_FAIL;
 455 +       }
 456 +
 457 +       _nfc_read_status(&status);
 458 +       return status;
 459 +#else
 460 +
 461 +       while(retry--) {
 462 +               _nfc_read_status(&status);
 463 +               if (status & NAND_STATUS_READY)
 464 +                       break;
 465 +               ndelay(100);
 466 +       }
 467 +       if (retry<0)
 468 +               printk("nfc_wait_ready 2: no device ready, status(%x). \n", status);
 469 +
 470 +       return status;
 471 +#endif
 472 +}
 473 +
 474 +/**
 475 + * return 0: erase OK
 476 + * return -EIO: fail
 477 + */
 478 +int nfc_erase_block(struct ra_nand_chip *ra, int row_addr)
 479 +{
 480 +       unsigned long cmd1, cmd2, bus_addr, conf;
 481 +       char status;
 482 +
 483 +       cmd1 = 0x60;
 484 +       cmd2 = 0xd0;
 485 +       bus_addr = row_addr;
 486 +       conf = 0x00511 | ((CFG_ROW_ADDR_CYCLE)<<16);
 487 +
 488 +       // set NFC
 489 +       ra_dbg("%s: cmd1: %lx, cmd2:%lx bus_addr: %lx, conf: %lx \n",
 490 +              __func__, cmd1, cmd2, bus_addr, conf);
 491 +
 492 +       //fixme, should we check nfc status?
 493 +       CLEAR_INT_STATUS();
 494 +
 495 +       ra_outl(NFC_CMD1, cmd1);
 496 +       ra_outl(NFC_CMD2, cmd2);
 497 +       ra_outl(NFC_ADDR, bus_addr);
 498 +       ra_outl(NFC_CONF, conf);
 499 +
 500 +       status = nfc_wait_ready(3);  //erase wait 3ms
 501 +       if (status & NAND_STATUS_FAIL) {
 502 +               printk("%s: fail \n", __func__);
 503 +               return -EIO;
 504 +       }
 505 +
 506 +       return 0;
 507 +
 508 +}
 509 +
 510 +static inline int _nfc_read_raw_data(int cmd1, int cmd2, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
 511 +{
 512 +       int ret;
 513 +
 514 +       CLEAR_INT_STATUS();
 515 +       ra_outl(NFC_CMD1, cmd1);
 516 +       ra_outl(NFC_CMD2, cmd2);
 517 +       ra_outl(NFC_ADDR, bus_addr);
 518 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 519 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 520 +       ra_outl(NFC_ADDR2, bus_addr2);
 521 +#endif
 522 +       ra_outl(NFC_CONF, conf);
 523 +
 524 +       ret = _ra_nand_pull_data(buf, len, 0);
 525 +       if (ret != len) {
 526 +               ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
 527 +               return NAND_STATUS_FAIL;
 528 +       }
 529 +
 530 +       //FIXME, this section is not necessary
 531 +       ret = nfc_wait_ready(0); //wait ready
 532 +       /* to prevent the DATA FIFO 's old data from next operation */
 533 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 534 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 535 +
 536 +       if (ret & NAND_STATUS_FAIL) {
 537 +               printk("%s: fail \n", __func__);
 538 +               return NAND_STATUS_FAIL;
 539 +       }
 540 +
 541 +       return 0;
 542 +}
 543 +
 544 +static inline int _nfc_write_raw_data(int cmd1, int cmd3, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
 545 +{
 546 +       int ret;
 547 +
 548 +       CLEAR_INT_STATUS();
 549 +       ra_outl(NFC_CMD1, cmd1);
 550 +       ra_outl(NFC_CMD3, cmd3);
 551 +       ra_outl(NFC_ADDR, bus_addr);
 552 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 553 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 554 +       ra_outl(NFC_ADDR2, bus_addr2);
 555 +#endif
 556 +       ra_outl(NFC_CONF, conf);
 557 +
 558 +       ret = _ra_nand_push_data(buf, len, 0);
 559 +       if (ret != len) {
 560 +               ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
 561 +               return NAND_STATUS_FAIL;
 562 +       }
 563 +
 564 +       ret = nfc_wait_ready(1); //write wait 1ms
 565 +       /* to prevent the DATA FIFO 's old data from next operation */
 566 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 567 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 568 +
 569 +       if (ret & NAND_STATUS_FAIL) {
 570 +               printk("%s: fail \n", __func__);
 571 +               return NAND_STATUS_FAIL;
 572 +       }
 573 +
 574 +       return 0;
 575 +}
 576 +
 577 +/**
 578 + * @return !0: fail
 579 + * @return 0: OK
 580 + */
 581 +int nfc_read_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
 582 +{
 583 +       unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
 584 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 585 +       unsigned int ecc_en;
 586 +       int use_gdma;
 587 +       int status;
 588 +
 589 +       int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
 590 +       // constrain of nfc read function
 591 +
 592 +#if defined (WORKAROUND_RX_BUF_OV)
 593 +       BUG_ON (len > 60);      //problem of rx-buffer overrun
 594 +#endif
 595 +       BUG_ON (offs >> ra->oob_shift); //page boundry
 596 +       BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
 597 +               ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
 598 +
 599 +       use_gdma = flags & FLAG_USE_GDMA;
 600 +       ecc_en = flags & FLAG_ECC_EN;
 601 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
 602 +
 603 +       if (is_nand_page_2048) {
 604 +               bus_addr += CFG_PAGESIZE;
 605 +               bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
 606 +               cmd1 = 0x0;
 607 +               cmd2 = 0x30;
 608 +               conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 609 +       }
 610 +       else {
 611 +               cmd1 = 0x50;
 612 +               conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 613 +       }
 614 +       if (ecc_en)
 615 +               conf |= (1<<3);
 616 +       if (use_gdma)
 617 +               conf |= (1<<2);
 618 +
 619 +       ra_dbg("%s: cmd1:%x, bus_addr:%x, conf:%x, len:%x, flag:%x\n",
 620 +              __func__, cmd1, bus_addr, conf, len, flags);
 621 +
 622 +       status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf, len, flags);
 623 +       if (status & NAND_STATUS_FAIL) {
 624 +               printk("%s: fail\n", __func__);
 625 +               return -EIO;
 626 +       }
 627 +
 628 +       return 0;
 629 +}
 630 +
 631 +/**
 632 + * @return !0: fail
 633 + * @return 0: OK
 634 + */
 635 +int nfc_write_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
 636 +{
 637 +       unsigned int cmd1 = 0, cmd3=0, conf = 0;
 638 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 639 +       int use_gdma;
 640 +       int status;
 641 +
 642 +       int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
 643 +       // constrain of nfc read function
 644 +
 645 +       BUG_ON (offs >> ra->oob_shift); //page boundry
 646 +       BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
 647 +               ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
 648 +
 649 +       use_gdma = flags & FLAG_USE_GDMA;
 650 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
 651 +
 652 +       if (is_nand_page_2048) {
 653 +               cmd1 = 0x80;
 654 +               cmd3 = 0x10;
 655 +               bus_addr += CFG_PAGESIZE;
 656 +               bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
 657 +               conf = 0x001123 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
 658 +       }
 659 +       else {
 660 +               cmd1 = 0x08050;
 661 +               cmd3 = 0x10;
 662 +               conf = 0x001223 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
 663 +       }
 664 +       if (use_gdma)
 665 +               conf |= (1<<2);
 666 +
 667 +       // set NFC
 668 +       ra_dbg("%s: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
 669 +              __func__, cmd1, cmd3, bus_addr, conf, len);
 670 +
 671 +       status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, len, flags);
 672 +       if (status & NAND_STATUS_FAIL) {
 673 +               printk("%s: fail \n", __func__);
 674 +               return -EIO;
 675 +       }
 676 +
 677 +       return 0;
 678 +}
 679 +
 680 +
 681 +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
 682 +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
 683 +
 684 +
 685 +#if !defined (WORKAROUND_RX_BUF_OV)
 686 +static int one_bit_correction(char *ecc, char *expected, int *bytes, int *bits);
 687 +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
 688 +{
 689 +       int ret, i;
 690 +       char *p, *e;
 691 +       int ecc;
 692 +
 693 +       //ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
 694 +
 695 +       if (mode == FL_WRITING) {
 696 +               int len = CFG_PAGESIZE + CFG_PAGE_OOBSIZE;
 697 +               int conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 698 +               conf |= (1<<3); //(ecc_en)
 699 +               //conf |= (1<<2); // (use_gdma)
 700 +
 701 +               p = ra->readback_buffers;
 702 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
 703 +               if (ret == 0)
 704 +                       goto ecc_check;
 705 +
 706 +               //FIXME, double comfirm
 707 +               printk("%s: read back fail, try again \n",__func__);
 708 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
 709 +               if (ret != 0) {
 710 +                       printk("\t%s: read back fail agian \n",__func__);
 711 +                       goto bad_block;
 712 +               }
 713 +       }
 714 +       else if (mode == FL_READING) {
 715 +               p = buf;
 716 +       }
 717 +       else
 718 +               return -2;
 719 +
 720 +ecc_check:
 721 +       p += CFG_PAGESIZE;
 722 +       if (!is_nand_page_2048) {
 723 +               ecc = ra_inl(NFC_ECC);
 724 +               if (ecc == 0) //clean page.
 725 +                       return 0;
 726 +               e = (char*)&ecc;
 727 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 728 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 729 +                       if (*(p + eccpos) != (char)0xff)
 730 +                               break;
 731 +                       if (i == CONFIG_ECC_BYTES - 1) {
 732 +                               printk("skip ecc 0xff at page %x\n", page);
 733 +                               return 0;
 734 +                       }
 735 +               }
 736 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 737 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 738 +                       if (*(p + eccpos) != *(e + i)) {
 739 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
 740 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 741 +                                               *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 742 +                               return -1;
 743 +                       }
 744 +               }
 745 +       }
 746 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 747 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 748 +       else {
 749 +               int ecc2, ecc3, ecc4, qsz;
 750 +               char *e2, *e3, *e4;
 751 +               int correction_flag = 0;
 752 +               ecc = ra_inl(NFC_ECC_P1);
 753 +               ecc2 = ra_inl(NFC_ECC_P2);
 754 +               ecc3 = ra_inl(NFC_ECC_P3);
 755 +               ecc4 = ra_inl(NFC_ECC_P4);
 756 +               e = (char*)&ecc;
 757 +               e2 = (char*)&ecc2;
 758 +               e3 = (char*)&ecc3;
 759 +               e4 = (char*)&ecc4;
 760 +               qsz = CFG_PAGE_OOBSIZE / 4;
 761 +               if (ecc == 0 && ecc2 == 0 && ecc3 == 0 && ecc4 == 0)
 762 +                       return 0;
 763 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 764 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 765 +                       if (*(p + eccpos) != (char)0xff)
 766 +                               break;
 767 +                       else if (*(p + eccpos + qsz) != (char)0xff)
 768 +                               break;
 769 +                       else if (*(p + eccpos + qsz*2) != (char)0xff)
 770 +                               break;
 771 +                       else if (*(p + eccpos + qsz*3) != (char)0xff)
 772 +                               break;
 773 +                       if (i == CONFIG_ECC_BYTES - 1) {
 774 +                               printk("skip ecc 0xff at page %x\n", page);
 775 +                               return 0;
 776 +                       }
 777 +               }
 778 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 779 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 780 +                       if (*(p + eccpos) != *(e + i)) {
 781 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
 782 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 783 +                                               *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 784 +                               correction_flag |= 0x1;
 785 +                       }
 786 +                       if (*(p + eccpos + qsz) != *(e2 + i)) {
 787 +                               printk("%s mode:%s, invalid ecc2, page: %x read:%x %x %x, ecc2:%x \n",
 788 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 789 +                                               *(p+CONFIG_ECC_OFFSET+qsz), *(p+ CONFIG_ECC_OFFSET+1+qsz), *(p+ CONFIG_ECC_OFFSET+2+qsz), ecc2);
 790 +                               correction_flag |= 0x2;
 791 +                       }
 792 +                       if (*(p + eccpos + qsz*2) != *(e3 + i)) {
 793 +                               printk("%s mode:%s, invalid ecc3, page: %x read:%x %x %x, ecc3:%x \n",
 794 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 795 +                                               *(p+CONFIG_ECC_OFFSET+qsz*2), *(p+ CONFIG_ECC_OFFSET+1+qsz*2), *(p+ CONFIG_ECC_OFFSET+2+qsz*2), ecc3);
 796 +                               correction_flag |= 0x4;
 797 +                       }
 798 +                       if (*(p + eccpos + qsz*3) != *(e4 + i)) {
 799 +                               printk("%s mode:%s, invalid ecc4, page: %x read:%x %x %x, ecc4:%x \n",
 800 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 801 +                                               *(p+CONFIG_ECC_OFFSET+qsz*3), *(p+ CONFIG_ECC_OFFSET+1+qsz*3), *(p+ CONFIG_ECC_OFFSET+2+qsz*3), ecc4);
 802 +                               correction_flag |= 0x8;
 803 +                       }
 804 +               }
 805 +
 806 +               if (correction_flag)
 807 +               {
 808 +                       printk("trying to do correction!\n");
 809 +                       if (correction_flag & 0x1)
 810 +                       {
 811 +                               int bytes, bits;
 812 +                               char *pBuf = p - CFG_PAGESIZE;
 813 +
 814 +                               if (one_bit_correction(p + CONFIG_ECC_OFFSET, e, &bytes, &bits) == 0)
 815 +                               {
 816 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 817 +                                       printk("1. correct byte %d, bit %d!\n", bytes, bits);
 818 +                               }
 819 +                               else
 820 +                               {
 821 +                                       printk("failed to correct!\n");
 822 +                                       return -1;
 823 +                               }
 824 +                       }
 825 +
 826 +                       if (correction_flag & 0x2)
 827 +                       {
 828 +                               int bytes, bits;
 829 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/4;
 830 +
 831 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz), e2, &bytes, &bits) == 0)
 832 +                               {
 833 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 834 +                                       printk("2. correct byte %d, bit %d!\n", bytes, bits);
 835 +                               }
 836 +                               else
 837 +                               {
 838 +                                       printk("failed to correct!\n");
 839 +                                       return -1;
 840 +                               }
 841 +                       }
 842 +                       if (correction_flag & 0x4)
 843 +                       {
 844 +                               int bytes, bits;
 845 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/2;
 846 +
 847 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 2), e3, &bytes, &bits) == 0)
 848 +                               {
 849 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 850 +                                       printk("3. correct byte %d, bit %d!\n", bytes, bits);
 851 +                               }
 852 +                               else
 853 +                               {
 854 +                                       printk("failed to correct!\n");
 855 +                                       return -1;
 856 +                               }
 857 +                       }
 858 +                       if (correction_flag & 0x8)
 859 +                       {
 860 +                               int bytes, bits;
 861 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE*3/4;
 862 +
 863 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 3), e4, &bytes, &bits) == 0)
 864 +                               {
 865 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 866 +                                       printk("4. correct byte %d, bit %d!\n", bytes, bits);
 867 +                               }
 868 +                               else
 869 +                               {
 870 +                                       printk("failed to correct!\n");
 871 +                                       return -1;
 872 +                               }
 873 +                       }
 874 +               }
 875 +
 876 +       }
 877 +#endif
 878 +       return 0;
 879 +
 880 +bad_block:
 881 +       return -1;
 882 +}
 883 +
 884 +#else
 885 +
 886 +void ranfc_dump(void)
 887 +{
 888 +       int i;
 889 +       for (i=0; i<11; i++) {
 890 +               if (i==6)
 891 +                       continue;
 892 +               printk("%x: %x \n", NFC_BASE + i*4, ra_inl(NFC_BASE + i*4));
 893 +       }
 894 +}
 895 +
 896 +/**
 897 + * @return 0, ecc OK or corrected.
 898 + * @return NAND_STATUS_FAIL, ecc fail.
 899 + */
 900 +
 901 +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
 902 +{
 903 +       int ret, i;
 904 +       char *p, *e;
 905 +       int ecc;
 906 +
 907 +       if (ranfc_verify == 0)
 908 +               return 0;
 909 +
 910 +       ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
 911 +
 912 +       if (mode == FL_WRITING) { // read back and memcmp
 913 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
 914 +               if (ret != 0) //double comfirm
 915 +                       ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
 916 +
 917 +               if (ret != 0) {
 918 +                       printk("%s: mode:%x read back fail \n", __func__, mode);
 919 +                       return -1;
 920 +               }
 921 +               return memcmp(buf, ra->readback_buffers, 1<<ra->page_shift);
 922 +       }
 923 +
 924 +       if (mode == FL_READING) {
 925 +#if 0
 926 +               if (ra->sandbox_page == 0)
 927 +                       return 0;
 928 +
 929 +               ret = nfc_write_page(ra, buf, ra->sandbox_page, FLAG_USE_GDMA | FLAG_ECC_EN);
 930 +               if (ret != 0) {
 931 +                       printk("%s, fail write sandbox_page \n", __func__);
 932 +                       return -1;
 933 +               }
 934 +#else
 935 +               /** @note:
 936 +                * The following command is actually not 'write' command to drive NFC to write flash.
 937 +                * However, it can make NFC to calculate ECC, that will be used to compare with original ones.
 938 +                * --YT
 939 +                */
 940 +               unsigned int conf = 0x001223| (CFG_ADDR_CYCLE<<16) | (0x200 << 20) | (1<<3) | (1<<2);
 941 +               _nfc_write_raw_data(0xff, 0xff, ra->sandbox_page<<ra->page_shift, conf, buf, 0x200, FLAG_USE_GDMA);
 942 +#endif
 943 +
 944 +               ecc = ra_inl(NFC_ECC);
 945 +               if (ecc == 0) //clean page.
 946 +                       return 0;
 947 +               e = (char*)&ecc;
 948 +               p = buf + (1<<ra->page_shift);
 949 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 950 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 951 +                       if (*(p + eccpos) != *(e + i)) {
 952 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, write:%x \n",
 953 +                                      __func__, (mode == FL_READING)?"read":"write", page,
 954 +                                      *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 955 +
 956 +                               for (i=0; i<528; i++)
 957 +                                       printk("%-2x \n", *(buf + i));
 958 +                               return -1;
 959 +                       }
 960 +               }
 961 +               return 0;
 962 +       }
 963 +
 964 +       return -1;
 965 +
 966 +}
 967 +
 968 +#endif
 969 +
 970 +
 971 +/**
 972 + * @return -EIO, writing size is less than a page
 973 + * @return 0, OK
 974 + */
 975 +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
 976 +{
 977 +       unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
 978 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 979 +       unsigned int ecc_en;
 980 +       int use_gdma;
 981 +       int size, offs;
 982 +       int status = 0;
 983 +
 984 +       use_gdma = flags & FLAG_USE_GDMA;
 985 +       ecc_en = flags & FLAG_ECC_EN;
 986 +
 987 +       page = page & (CFG_CHIPSIZE - 1); // chip boundary
 988 +       size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
 989 +       offs = 0;
 990 +
 991 +       while (size > 0) {
 992 +               int len;
 993 +#if defined (WORKAROUND_RX_BUF_OV)
 994 +               len = min(60, size);
 995 +#else
 996 +               len = size;
 997 +#endif
 998 +               bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8)-1));
 999 +               if (is_nand_page_2048) {
1000 +                       bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
1001 +                       cmd1 = 0x0;
1002 +                       cmd2 = 0x30;
1003 +                       conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
1004 +               }
1005 +               else {
1006 +                       if (offs & ~(CFG_PAGESIZE-1))
1007 +                               cmd1 = 0x50;
1008 +                       else if (offs & ~((1<<CFG_COLUMN_ADDR_CYCLE*8)-1))
1009 +                               cmd1 = 0x01;
1010 +                       else
1011 +                               cmd1 = 0;
1012 +
1013 +                       conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
1014 +               }
1015 +#if !defined (WORKAROUND_RX_BUF_OV)
1016 +               if (ecc_en)
1017 +                       conf |= (1<<3);
1018 +#endif
1019 +               if (use_gdma)
1020 +                       conf |= (1<<2);
1021 +
1022 +               status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf+offs, len, flags);
1023 +               if (status & NAND_STATUS_FAIL) {
1024 +                       printk("%s: fail \n", __func__);
1025 +                       return -EIO;
1026 +               }
1027 +
1028 +               offs += len;
1029 +               size -= len;
1030 +       }
1031 +
1032 +       // verify and correct ecc
1033 +       if ((flags & (FLAG_VERIFY | FLAG_ECC_EN)) == (FLAG_VERIFY | FLAG_ECC_EN)) {
1034 +               status = nfc_ecc_verify(ra, buf, page, FL_READING);
1035 +               if (status != 0) {
1036 +                       printk("%s: fail, buf:%x, page:%x, flag:%x\n",
1037 +                              __func__, (unsigned int)buf, page, flags);
1038 +                       return -EBADMSG;
1039 +               }
1040 +       }
1041 +       else {
1042 +               // fix,e not yet support
1043 +               ra->buffers_page = -1; //cached
1044 +       }
1045 +
1046 +       return 0;
1047 +}
1048 +
1049 +
1050 +/**
1051 + * @return -EIO, fail to write
1052 + * @return 0, OK
1053 + */
1054 +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
1055 +{
1056 +       unsigned int cmd1 = 0, cmd3, conf = 0;
1057 +       unsigned int bus_addr = 0, bus_addr2 = 0;
1058 +       unsigned int ecc_en;
1059 +       int use_gdma;
1060 +       int size;
1061 +       char status;
1062 +       uint8_t *oob = buf + (1<<ra->page_shift);
1063 +
1064 +       use_gdma = flags & FLAG_USE_GDMA;
1065 +       ecc_en = flags & FLAG_ECC_EN;
1066 +
1067 +       oob[ra->badblockpos] = 0xff;    //tag as good block.
1068 +       ra->buffers_page = -1; //cached
1069 +
1070 +       page = page & (CFG_CHIPSIZE-1); //chip boundary
1071 +       size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
1072 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)); //write_page always write from offset 0.
1073 +
1074 +       if (is_nand_page_2048) {
1075 +       bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
1076 +               cmd1 = 0x80;
1077 +               cmd3 = 0x10;
1078 +               conf = 0x001123| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
1079 +       }
1080 +       else {
1081 +       cmd1 = 0x8000;
1082 +       cmd3 = 0x10;
1083 +       conf = 0x001223| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
1084 +}
1085 +       if (ecc_en)
1086 +               conf |= (1<<3); //enable ecc
1087 +       if (use_gdma)
1088 +               conf |= (1<<2);
1089 +
1090 +       // set NFC
1091 +       ra_dbg("nfc_write_page: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
1092 +              cmd1, cmd3, bus_addr, conf, size);
1093 +
1094 +       status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
1095 +       if (status & NAND_STATUS_FAIL) {
1096 +               printk("%s: fail \n", __func__);
1097 +               return -EIO;
1098 +       }
1099 +
1100 +
1101 +       if (flags & FLAG_VERIFY) { // verify and correct ecc
1102 +               status = nfc_ecc_verify(ra, buf, page, FL_WRITING);
1103 +
1104 +#ifdef RANDOM_GEN_BAD_BLOCK
1105 +               if (((random32() & 0x1ff) == 0x0) && (page >= 0x100)) // randomly create bad block
1106 +               {
1107 +                       printk("hmm... create a bad block at page %x\n", (bus_addr >> 16));
1108 +                       status = -1;
1109 +               }
1110 +#endif
1111 +
1112 +               if (status != 0) {
1113 +                       printk("%s: ecc_verify fail: ret:%x \n", __func__, status);
1114 +                       oob[ra->badblockpos] = 0x33;
1115 +                       page -= page % (CFG_BLOCKSIZE/CFG_PAGESIZE);
1116 +                       printk("create a bad block at page %x\n", page);
1117 +                       if (!is_nand_page_2048)
1118 +                               status = nfc_write_oob(ra, page, ra->badblockpos, oob+ra->badblockpos, 1, flags);
1119 +                       else
1120 +                       {
1121 +                               status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
1122 +                               nfc_write_oob(ra, page, 0, oob, 16, FLAG_NONE);
1123 +                       }
1124 +                       return -EBADMSG;
1125 +               }
1126 +       }
1127 +
1128 +
1129 +       ra->buffers_page = page; //cached
1130 +       return 0;
1131 +}
1132 +
1133 +
1134 +
1135 +/*************************************************************
1136 + * nand internal process
1137 + *************************************************************/
1138 +
1139 +/**
1140 + * nand_release_device - [GENERIC] release chip
1141 + * @mtd:       MTD device structure
1142 + *
1143 + * Deselect, release chip lock and wake up anyone waiting on the device
1144 + */
1145 +static void nand_release_device(struct ra_nand_chip *ra)
1146 +{
1147 +       /* De-select the NAND device */
1148 +       nfc_select_chip(ra, -1);
1149 +
1150 +       /* Release the controller and the chip */
1151 +       ra->state = FL_READY;
1152 +
1153 +       mutex_unlock(ra->controller);
1154 +}
1155 +
1156 +/**
1157 + * nand_get_device - [GENERIC] Get chip for selected access
1158 + * @chip:      the nand chip descriptor
1159 + * @mtd:       MTD device structure
1160 + * @new_state: the state which is requested
1161 + *
1162 + * Get the device and lock it for exclusive access
1163 + */
1164 +static int
1165 +nand_get_device(struct ra_nand_chip *ra, int new_state)
1166 +{
1167 +       int ret = 0;
1168 +
1169 +       ret = mutex_lock_interruptible(ra->controller);
1170 +       if (!ret)
1171 +               ra->state = new_state;
1172 +
1173 +       return ret;
1174 +
1175 +}
1176 +
1177 +
1178 +
1179 +/*************************************************************
1180 + * nand internal process
1181 + *************************************************************/
1182 +
1183 +int nand_bbt_get(struct ra_nand_chip *ra, int block)
1184 +{
1185 +       int byte, bits;
1186 +       bits = block * BBTTAG_BITS;
1187 +
1188 +       byte = bits / 8;
1189 +       bits = bits % 8;
1190 +
1191 +       return (ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK;
1192 +}
1193 +
1194 +int nand_bbt_set(struct ra_nand_chip *ra, int block, int tag)
1195 +{
1196 +       int byte, bits;
1197 +       bits = block * BBTTAG_BITS;
1198 +
1199 +       byte = bits / 8;
1200 +       bits = bits % 8;
1201 +
1202 +       // If previous tag is bad, dont overwrite it
1203 +       if (((ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK) == BBT_TAG_BAD)
1204 +       {
1205 +               return BBT_TAG_BAD;
1206 +       }
1207 +
1208 +       ra->bbt[byte] = (ra->bbt[byte] & ~(BBTTAG_BITS_MASK << bits)) | ((tag & BBTTAG_BITS_MASK) << bits);
1209 +
1210 +       return tag;
1211 +}
1212 +
1213 +/**
1214 + * nand_block_checkbad - [GENERIC] Check if a block is marked bad
1215 + * @mtd:       MTD device structure
1216 + * @ofs:       offset from device start
1217 + *
1218 + * Check, if the block is bad. Either by reading the bad block table or
1219 + * calling of the scan function.
1220 + */
1221 +int nand_block_checkbad(struct ra_nand_chip *ra, loff_t offs)
1222 +{
1223 +       int page, block;
1224 +       int ret = 4;
1225 +       unsigned int tag;
1226 +       char *str[]= {"UNK", "RES", "BAD", "GOOD"};
1227 +
1228 +       if (ranfc_bbt == 0)
1229 +               return 0;
1230 +
1231 +       {
1232 +               // align with chip
1233 +
1234 +               offs = offs & ((1<<ra->chip_shift) -1);
1235 +
1236 +               page = offs >> ra->page_shift;
1237 +               block = offs >> ra->erase_shift;
1238 +       }
1239 +
1240 +       tag = nand_bbt_get(ra, block);
1241 +
1242 +       if (tag == BBT_TAG_UNKNOWN) {
1243 +               ret = nfc_read_oob(ra, page, ra->badblockpos, (char*)&tag, 1, FLAG_NONE);
1244 +               if (ret == 0)
1245 +                       tag = ((le32_to_cpu(tag) & 0x0ff) == 0x0ff) ? BBT_TAG_GOOD : BBT_TAG_BAD;
1246 +               else
1247 +                       tag = BBT_TAG_BAD;
1248 +
1249 +               nand_bbt_set(ra, block, tag);
1250 +       }
1251 +
1252 +       if (tag != BBT_TAG_GOOD) {
1253 +               printk("%s: offs:%x tag: %s \n", __func__, (unsigned int)offs, str[tag]);
1254 +               return 1;
1255 +       }
1256 +       else
1257 +               return 0;
1258 +
1259 +}
1260 +
1261 +
1262 +
1263 +/**
1264 + * nand_block_markbad -
1265 + */
1266 +int nand_block_markbad(struct ra_nand_chip *ra, loff_t offs)
1267 +{
1268 +       int page, block;
1269 +       int ret = 4;
1270 +       unsigned int tag;
1271 +       char *ecc;
1272 +
1273 +       // align with chip
1274 +       ra_dbg("%s offs: %x \n", __func__, (int)offs);
1275 +
1276 +       offs = offs & ((1<<ra->chip_shift) -1);
1277 +
1278 +       page = offs >> ra->page_shift;
1279 +       block = offs >> ra->erase_shift;
1280 +
1281 +       tag = nand_bbt_get(ra, block);
1282 +
1283 +       if (tag == BBT_TAG_BAD) {
1284 +               printk("%s: mark repeatedly \n", __func__);
1285 +               return 0;
1286 +       }
1287 +
1288 +       // new tag as bad
1289 +       tag =BBT_TAG_BAD;
1290 +       ret = nfc_read_page(ra, ra->buffers, page, FLAG_NONE);
1291 +       if (ret != 0) {
1292 +               printk("%s: fail to read bad block tag \n", __func__);
1293 +               goto tag_bbt;
1294 +       }
1295 +
1296 +       ecc = &ra->buffers[(1<<ra->page_shift)+ra->badblockpos];
1297 +       if (*ecc == (char)0x0ff) {
1298 +               //tag into flash
1299 +               *ecc = (char)tag;
1300 +               ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA);
1301 +               if (ret)
1302 +                       printk("%s: fail to write bad block tag \n", __func__);
1303 +
1304 +       }
1305 +
1306 +tag_bbt:
1307 +       //update bbt
1308 +       nand_bbt_set(ra, block, tag);
1309 +
1310 +       return 0;
1311 +}
1312 +
1313 +
1314 +#if defined (WORKAROUND_RX_BUF_OV)
1315 +/**
1316 + * to find a bad block for ecc verify of read_page
1317 + */
1318 +unsigned int nand_bbt_find_sandbox(struct ra_nand_chip *ra)
1319 +{
1320 +       loff_t offs = 0;
1321 +       int chipsize = 1 << ra->chip_shift;
1322 +       int blocksize = 1 << ra->erase_shift;
1323 +
1324 +
1325 +       while (offs < chipsize) {
1326 +               if (nand_block_checkbad(ra, offs)) //scan and verify the unknown tag
1327 +                       break;
1328 +               offs += blocksize;
1329 +       }
1330 +
1331 +       if (offs >= chipsize) {
1332 +               offs = chipsize - blocksize;
1333 +       }
1334 +
1335 +       nand_bbt_set(ra, (unsigned int)offs>>ra->erase_shift, BBT_TAG_RES);      // tag bbt only, instead of update badblockpos of flash.
1336 +       return (offs >> ra->page_shift);
1337 +}
1338 +#endif
1339 +
1340 +
1341 +
1342 +/**
1343 + * nand_erase_nand - [Internal] erase block(s)
1344 + * @mtd:       MTD device structure
1345 + * @instr:     erase instruction
1346 + * @allowbbt:  allow erasing the bbt area
1347 + *
1348 + * Erase one ore more blocks
1349 + */
1350 +int _nand_erase_nand(struct ra_nand_chip *ra, struct erase_info *instr)
1351 +{
1352 +       int page, len, status, ret;
1353 +       unsigned int addr, blocksize = 1<<ra->erase_shift;
1354 +
1355 +       ra_dbg("%s: start:%x, len:%x \n", __func__,
1356 +              (unsigned int)instr->addr, (unsigned int)instr->len);
1357 +
1358 +//#define BLOCK_ALIGNED(a) ((a) & (blocksize - 1)) // already defined
1359 +
1360 +       if (BLOCK_ALIGNED(instr->addr) || BLOCK_ALIGNED(instr->len)) {
1361 +               ra_dbg("%s: erase block not aligned, addr:%x len:%x\n", __func__, instr->addr, instr->len);
1362 +               return -EINVAL;
1363 +       }
1364 +
1365 +       instr->fail_addr = 0xffffffff;
1366 +
1367 +       len = instr->len;
1368 +       addr = instr->addr;
1369 +       instr->state = MTD_ERASING;
1370 +
1371 +       while (len) {
1372 +
1373 +               page = (int)(addr >> ra->page_shift);
1374 +
1375 +               /* select device and check wp */
1376 +               if (nfc_enable_chip(ra, addr, 0)) {
1377 +                       printk("%s: nand is write protected \n", __func__);
1378 +                       instr->state = MTD_ERASE_FAILED;
1379 +                       goto erase_exit;
1380 +               }
1381 +
1382 +               /* if we have a bad block, we do not erase bad blocks */
1383 +               if (nand_block_checkbad(ra, addr)) {
1384 +                       printk(KERN_WARNING "nand_erase: attempt to erase a "
1385 +                              "bad block at 0x%08x\n", addr);
1386 +                       instr->state = MTD_ERASE_FAILED;
1387 +                       goto erase_exit;
1388 +               }
1389 +
1390 +               /*
1391 +                * Invalidate the page cache, if we erase the block which
1392 +                * contains the current cached page
1393 +                */
1394 +               if (BLOCK_ALIGNED(addr) == BLOCK_ALIGNED(ra->buffers_page << ra->page_shift))
1395 +                       ra->buffers_page = -1;
1396 +
1397 +               status = nfc_erase_block(ra, page);
1398 +               /* See if block erase succeeded */
1399 +               if (status) {
1400 +                       printk("%s: failed erase, page 0x%08x\n", __func__, page);
1401 +                       instr->state = MTD_ERASE_FAILED;
1402 +                       instr->fail_addr = (page << ra->page_shift);
1403 +                       goto erase_exit;
1404 +               }
1405 +
1406 +
1407 +               /* Increment page address and decrement length */
1408 +               len -= blocksize;
1409 +               addr += blocksize;
1410 +
1411 +       }
1412 +       instr->state = MTD_ERASE_DONE;
1413 +
1414 +erase_exit:
1415 +
1416 +       ret = ((instr->state == MTD_ERASE_DONE) ? 0 : -EIO);
1417 +       /* Do call back function */
1418 +       if (!ret)
1419 +               mtd_erase_callback(instr);
1420 +
1421 +       if (ret) {
1422 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1423 +       }
1424 +
1425 +       /* Return more or less happy */
1426 +       return ret;
1427 +}
1428 +
1429 +static int
1430 +nand_write_oob_buf(struct ra_nand_chip *ra, uint8_t *buf, uint8_t *oob, size_t size,
1431 +                  int mode, int ooboffs)
1432 +{
1433 +       size_t oobsize = 1<<ra->oob_shift;
1434 +       struct nand_oobfree *free;
1435 +       uint32_t woffs = ooboffs;
1436 +       int retsize = 0;
1437 +
1438 +       ra_dbg("%s: size:%x, mode:%x, offs:%x  \n", __func__, size, mode, ooboffs);
1439 +
1440 +       switch(mode) {
1441 +       case MTD_OPS_PLACE_OOB:
1442 +       case MTD_OPS_RAW:
1443 +               if (ooboffs > oobsize)
1444 +                       return -1;
1445 +
1446 +               size = min(size, oobsize - ooboffs);
1447 +               memcpy(buf + ooboffs, oob, size);
1448 +               retsize = size;
1449 +               break;
1450 +
1451 +       case MTD_OPS_AUTO_OOB:
1452 +               if (ooboffs > ra->oob->oobavail)
1453 +                       return -1;
1454 +
1455 +               while (size) {
1456 +                       for(free = ra->oob->oobfree; free->length && size; free++) {
1457 +                               int wlen = free->length - woffs;
1458 +                               int bytes = 0;
1459 +
1460 +                               /* Write request not from offset 0 ? */
1461 +                               if (wlen <= 0) {
1462 +                                       woffs = -wlen;
1463 +                                       continue;
1464 +                               }
1465 +
1466 +                               bytes = min_t(size_t, size, wlen);
1467 +                               memcpy (buf + free->offset + woffs, oob, bytes);
1468 +                               woffs = 0;
1469 +                               oob += bytes;
1470 +                               size -= bytes;
1471 +                               retsize += bytes;
1472 +                       }
1473 +                       buf += oobsize;
1474 +               }
1475 +               break;
1476 +
1477 +       default:
1478 +               BUG();
1479 +       }
1480 +
1481 +       return retsize;
1482 +}
1483 +
1484 +static int nand_read_oob_buf(struct ra_nand_chip *ra, uint8_t *oob, size_t size,
1485 +                            int mode, int ooboffs)
1486 +{
1487 +       size_t oobsize = 1<<ra->oob_shift;
1488 +       uint8_t *buf = ra->buffers + (1<<ra->page_shift);
1489 +       int retsize=0;
1490 +
1491 +       ra_dbg("%s: size:%x, mode:%x, offs:%x  \n", __func__, size, mode, ooboffs);
1492 +
1493 +       switch(mode) {
1494 +       case MTD_OPS_PLACE_OOB:
1495 +       case MTD_OPS_RAW:
1496 +               if (ooboffs > oobsize)
1497 +                       return -1;
1498 +
1499 +               size = min(size, oobsize - ooboffs);
1500 +               memcpy(oob, buf + ooboffs, size);
1501 +               return size;
1502 +
1503 +       case MTD_OPS_AUTO_OOB: {
1504 +               struct nand_oobfree *free;
1505 +               uint32_t woffs = ooboffs;
1506 +
1507 +               if (ooboffs > ra->oob->oobavail)
1508 +                       return -1;
1509 +
1510 +               size = min(size, ra->oob->oobavail - ooboffs);
1511 +               for(free = ra->oob->oobfree; free->length && size; free++) {
1512 +                       int wlen = free->length - woffs;
1513 +                       int bytes = 0;
1514 +
1515 +                       /* Write request not from offset 0 ? */
1516 +                       if (wlen <= 0) {
1517 +                               woffs = -wlen;
1518 +                               continue;
1519 +                       }
1520 +
1521 +                       bytes = min_t(size_t, size, wlen);
1522 +                       memcpy (oob, buf + free->offset + woffs, bytes);
1523 +                       woffs = 0;
1524 +                       oob += bytes;
1525 +                       size -= bytes;
1526 +                       retsize += bytes;
1527 +               }
1528 +               return retsize;
1529 +       }
1530 +       default:
1531 +               BUG();
1532 +       }
1533 +
1534 +       return -1;
1535 +}
1536 +
1537 +/**
1538 + * nand_do_write_ops - [Internal] NAND write with ECC
1539 + * @mtd:       MTD device structure
1540 + * @to:                offset to write to
1541 + * @ops:       oob operations description structure
1542 + *
1543 + * NAND write with ECC
1544 + */
1545 +static int nand_do_write_ops(struct ra_nand_chip *ra, loff_t to,
1546 +                            struct mtd_oob_ops *ops)
1547 +{
1548 +       int page;
1549 +       uint32_t datalen = ops->len;
1550 +       uint32_t ooblen = ops->ooblen;
1551 +       uint8_t *oob = ops->oobbuf;
1552 +       uint8_t *data = ops->datbuf;
1553 +       int pagesize = (1<<ra->page_shift);
1554 +       int pagemask = (pagesize -1);
1555 +       int oobsize = 1<<ra->oob_shift;
1556 +       loff_t addr = to;
1557 +       //int i = 0; //for ra_dbg only
1558 +
1559 +       ra_dbg("%s: to:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x oobmode:%x \n",
1560 +              __func__, (unsigned int)to, data, oob, datalen, ooblen, ops->ooboffs, ops->mode);
1561 +
1562 +       ops->retlen = 0;
1563 +       ops->oobretlen = 0;
1564 +
1565 +
1566 +       /* Invalidate the page cache, when we write to the cached page */
1567 +       ra->buffers_page = -1;
1568 +
1569 +
1570 +       if (data ==0)
1571 +               datalen = 0;
1572 +
1573 +       // oob sequential (burst) write
1574 +       if (datalen == 0 && ooblen) {
1575 +               int len = ((ooblen + ops->ooboffs) + (ra->oob->oobavail - 1)) / ra->oob->oobavail * oobsize;
1576 +
1577 +               /* select chip, and check if it is write protected */
1578 +               if (nfc_enable_chip(ra, addr, 0))
1579 +                       return -EIO;
1580 +
1581 +               //FIXME, need sanity check of block boundary
1582 +               page = (int)((to & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
1583 +               memset(ra->buffers, 0x0ff, pagesize);
1584 +               //fixme, should we reserve the original content?
1585 +               if (ops->mode == MTD_OPS_AUTO_OOB) {
1586 +                       nfc_read_oob(ra, page, 0, ra->buffers, len, FLAG_NONE);
1587 +               }
1588 +               //prepare buffers
1589 +               if (ooblen != 8)
1590 +               {
1591 +                       nand_write_oob_buf(ra, ra->buffers, oob, ooblen, ops->mode, ops->ooboffs);
1592 +                       // write out buffer to chip
1593 +                       nfc_write_oob(ra, page, 0, ra->buffers, len, FLAG_USE_GDMA);
1594 +               }
1595 +
1596 +               ops->oobretlen = ooblen;
1597 +               ooblen = 0;
1598 +       }
1599 +
1600 +       // data sequential (burst) write
1601 +       if (datalen && ooblen == 0) {
1602 +               // ranfc can not support write_data_burst, since hw-ecc and fifo constraints..
1603 +       }
1604 +
1605 +       // page write
1606 +       while(datalen || ooblen) {
1607 +               int len;
1608 +               int ret;
1609 +               int offs;
1610 +               int ecc_en = 0;
1611 +
1612 +               ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1613 +                      __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1614 +
1615 +               page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
1616 +
1617 +               /* select chip, and check if it is write protected */
1618 +               if (nfc_enable_chip(ra, addr, 0))
1619 +                       return -EIO;
1620 +
1621 +               // oob write
1622 +               if (ops->mode == MTD_OPS_AUTO_OOB) {
1623 +                       //fixme, this path is not yet varified
1624 +                       nfc_read_oob(ra, page, 0, ra->buffers + pagesize, oobsize, FLAG_NONE);
1625 +               }
1626 +               if (oob && ooblen > 0) {
1627 +                       len = nand_write_oob_buf(ra, ra->buffers + pagesize, oob, ooblen, ops->mode, ops->ooboffs);
1628 +                       if (len < 0)
1629 +                               return -EINVAL;
1630 +
1631 +                       oob += len;
1632 +                       ops->oobretlen += len;
1633 +                       ooblen -= len;
1634 +               }
1635 +
1636 +               // data write
1637 +               offs = addr & pagemask;
1638 +               len = min_t(size_t, datalen, pagesize - offs);
1639 +               if (data && len > 0) {
1640 +                       memcpy(ra->buffers + offs, data, len);  // we can not sure ops->buf wether is DMA-able.
1641 +
1642 +                       data += len;
1643 +                       datalen -= len;
1644 +                       ops->retlen += len;
1645 +
1646 +                       ecc_en = FLAG_ECC_EN;
1647 +               }
1648 +               ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA | FLAG_VERIFY |
1649 +                                    ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0 : ecc_en ));
1650 +               if (ret) {
1651 +                       nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1652 +                       return ret;
1653 +               }
1654 +
1655 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
1656 +
1657 +               addr = (page+1) << ra->page_shift;
1658 +
1659 +       }
1660 +       return 0;
1661 +}
1662 +
1663 +/**
1664 + * nand_do_read_ops - [Internal] Read data with ECC
1665 + *
1666 + * @mtd:       MTD device structure
1667 + * @from:      offset to read from
1668 + * @ops:       oob ops structure
1669 + *
1670 + * Internal function. Called with chip held.
1671 + */
1672 +static int nand_do_read_ops(struct ra_nand_chip *ra, loff_t from,
1673 +                           struct mtd_oob_ops *ops)
1674 +{
1675 +       int page;
1676 +       uint32_t datalen = ops->len;
1677 +       uint32_t ooblen = ops->ooblen;
1678 +       uint8_t *oob = ops->oobbuf;
1679 +       uint8_t *data = ops->datbuf;
1680 +       int pagesize = (1<<ra->page_shift);
1681 +       int pagemask = (pagesize -1);
1682 +       loff_t addr = from;
1683 +       //int i = 0; //for ra_dbg only
1684 +
1685 +       ra_dbg("%s: addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1686 +              __func__, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1687 +
1688 +       ops->retlen = 0;
1689 +       ops->oobretlen = 0;
1690 +       if (data == 0)
1691 +               datalen = 0;
1692 +
1693 +
1694 +       while(datalen || ooblen) {
1695 +               int len;
1696 +               int ret;
1697 +               int offs;
1698 +
1699 +               ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1700 +                      __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1701 +               /* select chip */
1702 +               if (nfc_enable_chip(ra, addr, 1) < 0)
1703 +                       return -EIO;
1704 +
1705 +               page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift);
1706 +
1707 +               ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
1708 +                                   ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
1709 +               //FIXME, something strange here, some page needs 2 more tries to guarantee read success.
1710 +               if (ret) {
1711 +                       printk("read again:\n");
1712 +                       ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
1713 +                                           ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
1714 +
1715 +                       if (ret) {
1716 +                               printk("read again fail \n");
1717 +                               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1718 +                               if ((ret != -EUCLEAN) && (ret != -EBADMSG)) {
1719 +                                       return ret;
1720 +                               }
1721 +                               else {
1722 +                                       /* ecc verification fail, but data need to be returned. */
1723 +                               }
1724 +                       }
1725 +                       else {
1726 +                               printk(" read agian susccess \n");
1727 +                       }
1728 +               }
1729 +
1730 +               // oob read
1731 +               if (oob && ooblen > 0) {
1732 +                       len = nand_read_oob_buf(ra, oob, ooblen, ops->mode, ops->ooboffs);
1733 +                       if (len < 0) {
1734 +                               printk("nand_read_oob_buf: fail return %x \n", len);
1735 +                               return -EINVAL;
1736 +                       }
1737 +
1738 +                       oob += len;
1739 +                       ops->oobretlen += len;
1740 +                       ooblen -= len;
1741 +               }
1742 +
1743 +               // data read
1744 +               offs = addr & pagemask;
1745 +               len = min_t(size_t, datalen, pagesize - offs);
1746 +               if (data && len > 0) {
1747 +                       memcpy(data, ra->buffers + offs, len);  // we can not sure ops->buf wether is DMA-able.
1748 +
1749 +                       data += len;
1750 +                       datalen -= len;
1751 +                       ops->retlen += len;
1752 +                       if (ret)
1753 +                               return ret;
1754 +               }
1755 +
1756 +
1757 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
1758 +               // address go further to next page, instead of increasing of length of write. This avoids some special cases wrong.
1759 +               addr = (page+1) << ra->page_shift;
1760 +       }
1761 +       return 0;
1762 +}
1763 +
1764 +static int
1765 +ramtd_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
1766 +{
1767 +       struct ra_nand_chip *ra = (struct ra_nand_chip *)mtd->priv;
1768 +       int ret;
1769 +
1770 +       ra_dbg("%s: start:%x, len:%x \n", __func__,
1771 +               (unsigned int)instr->addr, (unsigned int)instr->len);
1772 +
1773 +       nand_get_device(ra, FL_ERASING);
1774 +       ret = _nand_erase_nand((struct ra_nand_chip *)mtd->priv, instr);
1775 +       nand_release_device(ra);
1776 +
1777 +       return ret;
1778 +}
1779 +
1780 +static int
1781 +ramtd_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
1782 +               size_t *retlen, const uint8_t *buf)
1783 +{
1784 +       struct ra_nand_chip *ra = mtd->priv;
1785 +       struct mtd_oob_ops ops;
1786 +       int ret;
1787 +
1788 +       ra_dbg("%s: to 0x%x len=0x%x\n", __func__, to, len);
1789 +
1790 +       if ((to + len) > mtd->size)
1791 +               return -EINVAL;
1792 +
1793 +       if (!len)
1794 +               return 0;
1795 +
1796 +       nand_get_device(ra, FL_WRITING);
1797 +
1798 +       memset(&ops, 0, sizeof(ops));
1799 +       ops.len = len;
1800 +       ops.datbuf = (uint8_t *)buf;
1801 +       ops.oobbuf = NULL;
1802 +       ops.mode =  MTD_OPS_AUTO_OOB;
1803 +
1804 +       ret = nand_do_write_ops(ra, to, &ops);
1805 +
1806 +       *retlen = ops.retlen;
1807 +
1808 +       nand_release_device(ra);
1809 +
1810 +       return ret;
1811 +}
1812 +
1813 +static int
1814 +ramtd_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1815 +               size_t *retlen, uint8_t *buf)
1816 +{
1817 +
1818 +       struct ra_nand_chip *ra = mtd->priv;
1819 +       int ret;
1820 +       struct mtd_oob_ops ops;
1821 +
1822 +       ra_dbg("%s: mtd:%p from:%x, len:%x, buf:%p \n", __func__, mtd, (unsigned int)from, len, buf);
1823 +
1824 +       /* Do not allow reads past end of device */
1825 +       if ((from + len) > mtd->size)
1826 +               return -EINVAL;
1827 +       if (!len)
1828 +               return 0;
1829 +
1830 +       nand_get_device(ra, FL_READING);
1831 +
1832 +       memset(&ops, 0, sizeof(ops));
1833 +       ops.len = len;
1834 +       ops.datbuf = buf;
1835 +       ops.oobbuf = NULL;
1836 +       ops.mode = MTD_OPS_AUTO_OOB;
1837 +
1838 +       ret = nand_do_read_ops(ra, from, &ops);
1839 +
1840 +       *retlen = ops.retlen;
1841 +
1842 +       nand_release_device(ra);
1843 +
1844 +       return ret;
1845 +
1846 +}
1847 +
1848 +static int
1849 +ramtd_nand_readoob(struct mtd_info *mtd, loff_t from,
1850 +                       struct mtd_oob_ops *ops)
1851 +{
1852 +       struct ra_nand_chip *ra = mtd->priv;
1853 +       int ret;
1854 +
1855 +       ra_dbg("%s: \n", __func__);
1856 +
1857 +       nand_get_device(ra, FL_READING);
1858 +
1859 +       ret = nand_do_read_ops(ra, from, ops);
1860 +
1861 +       nand_release_device(ra);
1862 +
1863 +       return ret;
1864 +}
1865 +
1866 +static int
1867 +ramtd_nand_writeoob(struct mtd_info *mtd, loff_t to,
1868 +                       struct mtd_oob_ops *ops)
1869 +{
1870 +       struct ra_nand_chip *ra = mtd->priv;
1871 +       int ret;
1872 +
1873 +       nand_get_device(ra, FL_READING);
1874 +       ret = nand_do_write_ops(ra, to, ops);
1875 +       nand_release_device(ra);
1876 +
1877 +       return ret;
1878 +}
1879 +
1880 +static int
1881 +ramtd_nand_block_isbad(struct mtd_info *mtd, loff_t offs)
1882 +{
1883 +       if (offs > mtd->size)
1884 +               return -EINVAL;
1885 +
1886 +       return nand_block_checkbad((struct ra_nand_chip *)mtd->priv, offs);
1887 +}
1888 +
1889 +static int
1890 +ramtd_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1891 +{
1892 +       struct ra_nand_chip *ra = mtd->priv;
1893 +       int ret;
1894 +
1895 +       ra_dbg("%s: \n", __func__);
1896 +       nand_get_device(ra, FL_WRITING);
1897 +       ret = nand_block_markbad(ra, ofs);
1898 +       nand_release_device(ra);
1899 +
1900 +       return ret;
1901 +}
1902 +
1903 +// 1-bit error detection
1904 +static int one_bit_correction(char *ecc1, char *ecc2, int *bytes, int *bits)
1905 +{
1906 +       // check if ecc and expected are all valid
1907 +       char *p, nibble, crumb;
1908 +       int i, xor, iecc1 = 0, iecc2 = 0;
1909 +
1910 +       printk("correction : %x %x %x\n", ecc1[0], ecc1[1], ecc1[2]);
1911 +       printk("correction : %x %x %x\n", ecc2[0], ecc2[1], ecc2[2]);
1912 +
1913 +       p = (char *)ecc1;
1914 +       for (i = 0; i < CONFIG_ECC_BYTES; i++)
1915 +       {
1916 +               nibble = *(p+i) & 0xf;
1917 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1918 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1919 +                       return -1;
1920 +               nibble = ((*(p+i)) >> 4) & 0xf;
1921 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1922 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1923 +                       return -1;
1924 +       }
1925 +
1926 +       p = (char *)ecc2;
1927 +       for (i = 0; i < CONFIG_ECC_BYTES; i++)
1928 +       {
1929 +               nibble = *(p+i) & 0xf;
1930 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1931 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1932 +                       return -1;
1933 +               nibble = ((*(p+i)) >> 4) & 0xf;
1934 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1935 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1936 +                       return -1;
1937 +       }
1938 +
1939 +       memcpy(&iecc1, ecc1, 3);
1940 +       memcpy(&iecc2, ecc2, 3);
1941 +
1942 +       xor = iecc1 ^ iecc2;
1943 +       printk("xor = %x (%x %x)\n", xor, iecc1, iecc2);
1944 +
1945 +       *bytes = 0;
1946 +       for (i = 0; i < 9; i++)
1947 +       {
1948 +               crumb = (xor >> (2*i)) & 0x3;
1949 +               if ((crumb == 0x0) || (crumb == 0x3))
1950 +                       return -1;
1951 +               if (crumb == 0x2)
1952 +                       *bytes += (1 << i);
1953 +       }
1954 +
1955 +       *bits = 0;
1956 +       for (i = 0; i < 3; i++)
1957 +       {
1958 +               crumb = (xor >> (18 + 2*i)) & 0x3;
1959 +               if ((crumb == 0x0) || (crumb == 0x3))
1960 +                       return -1;
1961 +               if (crumb == 0x2)
1962 +                       *bits += (1 << i);
1963 +       }
1964 +
1965 +       return 0;
1966 +}
1967 +
1968 +
1969 +
1970 +/************************************************************
1971 + * the init/exit section.
1972 + */
1973 +
1974 +static struct nand_ecclayout ra_oob_layout = {
1975 +       .eccbytes = CONFIG_ECC_BYTES,
1976 +       .eccpos = {5, 6, 7},
1977 +       .oobfree = {
1978 +                {.offset = 0, .length = 4},
1979 +                {.offset = 8, .length = 8},
1980 +                {.offset = 0, .length = 0}
1981 +        },
1982 +#define RA_CHIP_OOB_AVAIL (4+8)
1983 +       .oobavail = RA_CHIP_OOB_AVAIL,
1984 +       // 5th byte is bad-block flag.
1985 +};
1986 +
1987 +static int
1988 +mtk_nand_probe(struct platform_device *pdev)
1989 +{
1990 +        struct mtd_part_parser_data ppdata;
1991 +       struct ra_nand_chip *ra;
1992 +       int alloc_size, bbt_size, buffers_size, reg, err;
1993 +       unsigned char chip_mode = 12;
1994 +
1995 +/*     if(ra_check_flash_type()!=BOOT_FROM_NAND) {
1996 +               return 0;
1997 +       }*/
1998 +
1999 +       //FIXME: config 512 or 2048-byte page according to HWCONF
2000 +#if defined (CONFIG_RALINK_RT6855A)
2001 +       reg = ra_inl(RALINK_SYSCTL_BASE+0x8c);
2002 +       chip_mode = ((reg>>28) & 0x3)|(((reg>>22) & 0x3)<<2);
2003 +       if (chip_mode == 1) {
2004 +               printk("! nand 2048\n");
2005 +               ra_or(NFC_CONF1, 1);
2006 +               is_nand_page_2048 = 1;
2007 +               nand_addrlen = 5;
2008 +       }
2009 +       else {
2010 +               printk("! nand 512\n");
2011 +               ra_and(NFC_CONF1, ~1);
2012 +               is_nand_page_2048 = 0;
2013 +               nand_addrlen = 4;
2014 +       }
2015 +#elif (defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855))
2016 +       ra_outl(RALINK_SYSCTL_BASE+0x60, ra_inl(RALINK_SYSCTL_BASE+0x60) & ~(0x3<<18));
2017 +       reg = ra_inl(RALINK_SYSCTL_BASE+0x10);
2018 +       chip_mode = (reg & 0x0F);
2019 +       if((chip_mode==1)||(chip_mode==11)) {
2020 +               ra_or(NFC_CONF1, 1);
2021 +               is_nand_page_2048 = 1;
2022 +               nand_addrlen = ((chip_mode!=11) ? 4 : 5);
2023 +               printk("!!! nand page size = 2048, addr len=%d\n", nand_addrlen);
2024 +       }
2025 +       else {
2026 +               ra_and(NFC_CONF1, ~1);
2027 +               is_nand_page_2048 = 0;
2028 +               nand_addrlen = ((chip_mode!=10) ? 3 : 4);
2029 +               printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
2030 +       }
2031 +#else
2032 +       is_nand_page_2048 = 0;
2033 +       nand_addrlen = 3;
2034 +       printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
2035 +#endif
2036 +
2037 +#if defined (CONFIG_RALINK_RT6855A) || defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855)
2038 +       //config ECC location
2039 +    ra_and(NFC_CONF1, 0xfff000ff);
2040 +       ra_or(NFC_CONF1, ((CONFIG_ECC_OFFSET + 2) << 16) +
2041 +                                               ((CONFIG_ECC_OFFSET + 1) << 12) +
2042 +                                               (CONFIG_ECC_OFFSET << 8));
2043 +#endif
2044 +
2045 +#define ALIGNE_16(a) (((unsigned long)(a)+15) & ~15)
2046 +       buffers_size = ALIGNE_16((1<<CONFIG_PAGE_SIZE_BIT) + (1<<CONFIG_OOBSIZE_PER_PAGE_BIT)); //ra->buffers
2047 +       bbt_size = BBTTAG_BITS * (1<<(CONFIG_CHIP_SIZE_BIT - (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))) / 8; //ra->bbt
2048 +       bbt_size = ALIGNE_16(bbt_size);
2049 +
2050 +       alloc_size = buffers_size + bbt_size;
2051 +       alloc_size += buffers_size; //for ra->readback_buffers
2052 +       alloc_size += sizeof(*ra);
2053 +       alloc_size += sizeof(*ranfc_mtd);
2054 +
2055 +       //make sure gpio-0 is input
2056 +       ra_outl(RALINK_PIO_BASE+0x24, ra_inl(RALINK_PIO_BASE+0x24) & ~0x01);
2057 +
2058 +       ra = (struct ra_nand_chip *)kzalloc(alloc_size, GFP_KERNEL | GFP_DMA);
2059 +       if (!ra) {
2060 +               printk("%s: mem alloc fail \n", __func__);
2061 +               return -ENOMEM;
2062 +       }
2063 +       memset(ra, 0, alloc_size);
2064 +
2065 +       //dynamic
2066 +       ra->buffers = (char *)((char *)ra + sizeof(*ra));
2067 +       ra->readback_buffers = ra->buffers + buffers_size;
2068 +       ra->bbt = ra->readback_buffers + buffers_size;
2069 +       ranfc_mtd = (struct mtd_info *)(ra->bbt + bbt_size);
2070 +
2071 +       //static
2072 +       ra->numchips            = CONFIG_NUMCHIPS;
2073 +       ra->chip_shift          = CONFIG_CHIP_SIZE_BIT;
2074 +       ra->page_shift          = CONFIG_PAGE_SIZE_BIT;
2075 +       ra->oob_shift           = CONFIG_OOBSIZE_PER_PAGE_BIT;
2076 +       ra->erase_shift         = (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT);
2077 +       ra->badblockpos         = CONFIG_BAD_BLOCK_POS;
2078 +       ra_oob_layout.eccpos[0] = CONFIG_ECC_OFFSET;
2079 +       ra_oob_layout.eccpos[1] = CONFIG_ECC_OFFSET + 1;
2080 +       ra_oob_layout.eccpos[2] = CONFIG_ECC_OFFSET + 2;
2081 +       ra->oob                 = &ra_oob_layout;
2082 +       ra->buffers_page        = -1;
2083 +
2084 +#if defined (WORKAROUND_RX_BUF_OV)
2085 +       if (ranfc_verify) {
2086 +               ra->sandbox_page = nand_bbt_find_sandbox(ra);
2087 +       }
2088 +#endif
2089 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x01); //set wp to high
2090 +       nfc_all_reset();
2091 +
2092 +       ranfc_mtd->type         = MTD_NANDFLASH;
2093 +       ranfc_mtd->flags        = MTD_CAP_NANDFLASH;
2094 +       ranfc_mtd->size         = CONFIG_NUMCHIPS * CFG_CHIPSIZE;
2095 +       ranfc_mtd->erasesize    = CFG_BLOCKSIZE;
2096 +       ranfc_mtd->writesize    = CFG_PAGESIZE;
2097 +       ranfc_mtd->oobsize      = CFG_PAGE_OOBSIZE;
2098 +       ranfc_mtd->oobavail     = RA_CHIP_OOB_AVAIL;
2099 +       ranfc_mtd->name         = "ra_nfc";
2100 +       //ranfc_mtd->index
2101 +       ranfc_mtd->ecclayout    = &ra_oob_layout;
2102 +       //ranfc_mtd->numberaseregions
2103 +       //ranfc_mtd->eraseregions
2104 +       //ranfc_mtd->bansize
2105 +       ranfc_mtd->_erase       = ramtd_nand_erase;
2106 +       //ranfc_mtd->point
2107 +       //ranfc_mtd->unpoint
2108 +       ranfc_mtd->_read                = ramtd_nand_read;
2109 +       ranfc_mtd->_write       = ramtd_nand_write;
2110 +       ranfc_mtd->_read_oob    = ramtd_nand_readoob;
2111 +       ranfc_mtd->_write_oob   = ramtd_nand_writeoob;
2112 +       //ranfc_mtd->get_fact_prot_info; ranfc_mtd->read_fact_prot_reg;
2113 +       //ranfc_mtd->get_user_prot_info; ranfc_mtd->read_user_prot_reg;
2114 +       //ranfc_mtd->write_user_prot_reg; ranfc_mtd->lock_user_prot_reg;
2115 +       //ranfc_mtd->writev; ranfc_mtd->sync; ranfc_mtd->lock; ranfc_mtd->unlock; ranfc_mtd->suspend; ranfc_mtd->resume;
2116 +       ranfc_mtd->_block_isbad         = ramtd_nand_block_isbad;
2117 +       ranfc_mtd->_block_markbad       = ramtd_nand_block_markbad;
2118 +       //ranfc_mtd->reboot_notifier
2119 +       //ranfc_mtd->ecc_stats;
2120 +       // subpage_sht;
2121 +
2122 +       //ranfc_mtd->get_device; ranfc_mtd->put_device
2123 +       ranfc_mtd->priv = ra;
2124 +
2125 +       ranfc_mtd->owner = THIS_MODULE;
2126 +       ra->controller = &ra->hwcontrol;
2127 +       mutex_init(ra->controller);
2128 +
2129 +       printk("%s: alloc %x, at %p , btt(%p, %x), ranfc_mtd:%p\n",
2130 +              __func__ , alloc_size, ra, ra->bbt, bbt_size, ranfc_mtd);
2131 +
2132 +       ppdata.of_node = pdev->dev.of_node;
2133 +       err = mtd_device_parse_register(ranfc_mtd, mtk_probe_types,
2134 +                       &ppdata, NULL, 0);
2135 +
2136 +       return err;
2137 +}
2138 +
2139 +static int
2140 +mtk_nand_remove(struct platform_device *pdev)
2141 +{
2142 +       struct ra_nand_chip *ra;
2143 +
2144 +       if (ranfc_mtd) {
2145 +               ra = (struct ra_nand_chip  *)ranfc_mtd->priv;
2146 +
2147 +               /* Deregister partitions */
2148 +               //del_mtd_partitions(ranfc_mtd);
2149 +               kfree(ra);
2150 +       }
2151 +       return 0;
2152 +}
2153 +
2154 +static const struct of_device_id mtk_nand_match[] = {
2155 +       { .compatible = "mtk,mt7620-nand" },
2156 +       {},
2157 +};
2158 +MODULE_DEVICE_TABLE(of, mtk_nand_match);
2159 +
2160 +static struct platform_driver mtk_nand_driver = {
2161 +       .probe = mtk_nand_probe,
2162 +       .remove = mtk_nand_remove,
2163 +       .driver = {
2164 +               .name = "mt7620_nand",
2165 +               .owner = THIS_MODULE,
2166 +               .of_match_table = mtk_nand_match,
2167 +       },
2168 +};
2169 +
2170 +module_platform_driver(mtk_nand_driver);
2171 +
2172 +
2173 +MODULE_LICENSE("GPL");
2174 --- /dev/null
2175 +++ b/drivers/mtd/maps/ralink_nand.h
2176 @@ -0,0 +1,232 @@
2177 +#ifndef RT2880_NAND_H
2178 +#define RT2880_NAND_H
2179 +
2180 +#include <linux/mtd/mtd.h>
2181 +
2182 +//#include "gdma.h"
2183 +
2184 +#define RALINK_SYSCTL_BASE             0xB0000000
2185 +#define RALINK_PIO_BASE                        0xB0000600
2186 +#define RALINK_NAND_CTRL_BASE          0xB0000810
2187 +#define CONFIG_RALINK_MT7620
2188 +
2189 +#define SKIP_BAD_BLOCK
2190 +//#define RANDOM_GEN_BAD_BLOCK
2191 +
2192 +#define ra_inl(addr)  (*(volatile unsigned int *)(addr))
2193 +#define ra_outl(addr, value)  (*(volatile unsigned int *)(addr) = (value))
2194 +#define ra_aor(addr, a_mask, o_value)  ra_outl(addr, (ra_inl(addr) & (a_mask)) | (o_value))
2195 +#define ra_and(addr, a_mask)  ra_aor(addr, a_mask, 0)
2196 +#define ra_or(addr, o_value)  ra_aor(addr, -1, o_value)
2197 +
2198 +
2199 +#define CONFIG_NUMCHIPS 1
2200 +#define CONFIG_NOT_SUPPORT_WP //rt3052 has no WP signal for chip.
2201 +//#define CONFIG_NOT_SUPPORT_RB
2202 +
2203 +extern int is_nand_page_2048;
2204 +extern const unsigned int nand_size_map[2][3];
2205 +
2206 +//chip
2207 +// chip geometry: SAMSUNG small size 32MB.
2208 +#define CONFIG_CHIP_SIZE_BIT (nand_size_map[is_nand_page_2048][nand_addrlen-3]) //! (1<<NAND_SIZE_BYTE) MB
2209 +//#define CONFIG_CHIP_SIZE_BIT (is_nand_page_2048? 29 : 25)    //! (1<<NAND_SIZE_BYTE) MB
2210 +#define CONFIG_PAGE_SIZE_BIT (is_nand_page_2048? 11 : 9)       //! (1<<PAGE_SIZE) MB
2211 +//#define CONFIG_SUBPAGE_BIT 1         //! these bits will be compensate by command cycle
2212 +#define CONFIG_NUMPAGE_PER_BLOCK_BIT (is_nand_page_2048? 6 : 5)        //! order of number of pages a block.
2213 +#define CONFIG_OOBSIZE_PER_PAGE_BIT (is_nand_page_2048? 6 : 4) //! byte number of oob a page.
2214 +#define CONFIG_BAD_BLOCK_POS (is_nand_page_2048? 0 : 4)     //! offset of byte to denote bad block.
2215 +#define CONFIG_ECC_BYTES 3      //! ecc has 3 bytes
2216 +#define CONFIG_ECC_OFFSET (is_nand_page_2048? 6 : 5)        //! ecc starts from offset 5.
2217 +
2218 +//this section should not be modified.
2219 +//#define CFG_COLUMN_ADDR_MASK ((1 << (CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT)) - 1)
2220 +//#define CFG_COLUMN_ADDR_CYCLE (((CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT) + 7)/8)
2221 +//#define CFG_ROW_ADDR_CYCLE ((CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT + 7)/8)
2222 +//#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
2223 +
2224 +#define CFG_COLUMN_ADDR_CYCLE   (is_nand_page_2048? 2 : 1)
2225 +#define CFG_ROW_ADDR_CYCLE      (nand_addrlen - CFG_COLUMN_ADDR_CYCLE)
2226 +#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
2227 +
2228 +#define CFG_CHIPSIZE    (1 << ((CONFIG_CHIP_SIZE_BIT>=32)? 31 : CONFIG_CHIP_SIZE_BIT))
2229 +//#define CFG_CHIPSIZE         (1 << CONFIG_CHIP_SIZE_BIT)
2230 +#define CFG_PAGESIZE   (1 << CONFIG_PAGE_SIZE_BIT)
2231 +#define CFG_BLOCKSIZE  (CFG_PAGESIZE << CONFIG_NUMPAGE_PER_BLOCK_BIT)
2232 +#define CFG_NUMPAGE    (1 << (CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT))
2233 +#define CFG_NUMBLOCK   (CFG_NUMPAGE >> CONFIG_NUMPAGE_PER_BLOCK_BIT)
2234 +#define CFG_BLOCK_OOBSIZE      (1 << (CONFIG_OOBSIZE_PER_PAGE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))
2235 +#define CFG_PAGE_OOBSIZE       (1 << CONFIG_OOBSIZE_PER_PAGE_BIT)
2236 +
2237 +#define NAND_BLOCK_ALIGN(addr) ((addr) & (CFG_BLOCKSIZE-1))
2238 +#define NAND_PAGE_ALIGN(addr) ((addr) & (CFG_PAGESIZE-1))
2239 +
2240 +
2241 +#define NFC_BASE       RALINK_NAND_CTRL_BASE
2242 +#define NFC_CTRL       (NFC_BASE + 0x0)
2243 +#define NFC_CONF       (NFC_BASE + 0x4)
2244 +#define NFC_CMD1       (NFC_BASE + 0x8)
2245 +#define NFC_CMD2       (NFC_BASE + 0xc)
2246 +#define NFC_CMD3       (NFC_BASE + 0x10)
2247 +#define NFC_ADDR       (NFC_BASE + 0x14)
2248 +#define NFC_DATA       (NFC_BASE + 0x18)
2249 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
2250 +       defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
2251 +#define NFC_ECC                (NFC_BASE + 0x30)
2252 +#else
2253 +#define NFC_ECC                (NFC_BASE + 0x1c)
2254 +#endif
2255 +#define NFC_STATUS     (NFC_BASE + 0x20)
2256 +#define NFC_INT_EN     (NFC_BASE + 0x24)
2257 +#define NFC_INT_ST     (NFC_BASE + 0x28)
2258 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
2259 +       defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
2260 +#define NFC_CONF1      (NFC_BASE + 0x2c)
2261 +#define NFC_ECC_P1     (NFC_BASE + 0x30)
2262 +#define NFC_ECC_P2     (NFC_BASE + 0x34)
2263 +#define NFC_ECC_P3     (NFC_BASE + 0x38)
2264 +#define NFC_ECC_P4     (NFC_BASE + 0x3c)
2265 +#define NFC_ECC_ERR1   (NFC_BASE + 0x40)
2266 +#define NFC_ECC_ERR2   (NFC_BASE + 0x44)
2267 +#define NFC_ECC_ERR3   (NFC_BASE + 0x48)
2268 +#define NFC_ECC_ERR4   (NFC_BASE + 0x4c)
2269 +#define NFC_ADDR2      (NFC_BASE + 0x50)
2270 +#endif
2271 +
2272 +enum _int_stat {
2273 +       INT_ST_ND_DONE  = 1<<0,
2274 +       INT_ST_TX_BUF_RDY       = 1<<1,
2275 +       INT_ST_RX_BUF_RDY       = 1<<2,
2276 +       INT_ST_ECC_ERR          = 1<<3,
2277 +       INT_ST_TX_TRAS_ERR      = 1<<4,
2278 +       INT_ST_RX_TRAS_ERR      = 1<<5,
2279 +       INT_ST_TX_KICK_ERR      = 1<<6,
2280 +       INT_ST_RX_KICK_ERR      = 1<<7
2281 +};
2282 +
2283 +
2284 +//#define WORKAROUND_RX_BUF_OV 1
2285 +
2286 +
2287 +/*************************************************************
2288 + * stolen from nand.h
2289 + *************************************************************/
2290 +
2291 +/*
2292 + * Standard NAND flash commands
2293 + */
2294 +#define NAND_CMD_READ0         0
2295 +#define NAND_CMD_READ1         1
2296 +#define NAND_CMD_RNDOUT                5
2297 +#define NAND_CMD_PAGEPROG      0x10
2298 +#define NAND_CMD_READOOB       0x50
2299 +#define NAND_CMD_ERASE1                0x60
2300 +#define NAND_CMD_STATUS                0x70
2301 +#define NAND_CMD_STATUS_MULTI  0x71
2302 +#define NAND_CMD_SEQIN         0x80
2303 +#define NAND_CMD_RNDIN         0x85
2304 +#define NAND_CMD_READID                0x90
2305 +#define NAND_CMD_ERASE2                0xd0
2306 +#define NAND_CMD_RESET         0xff
2307 +
2308 +/* Extended commands for large page devices */
2309 +#define NAND_CMD_READSTART     0x30
2310 +#define NAND_CMD_RNDOUTSTART   0xE0
2311 +#define NAND_CMD_CACHEDPROG    0x15
2312 +
2313 +/* Extended commands for AG-AND device */
2314 +/*
2315 + * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
2316 + *       there is no way to distinguish that from NAND_CMD_READ0
2317 + *       until the remaining sequence of commands has been completed
2318 + *       so add a high order bit and mask it off in the command.
2319 + */
2320 +#define NAND_CMD_DEPLETE1      0x100
2321 +#define NAND_CMD_DEPLETE2      0x38
2322 +#define NAND_CMD_STATUS_MULTI  0x71
2323 +#define NAND_CMD_STATUS_ERROR  0x72
2324 +/* multi-bank error status (banks 0-3) */
2325 +#define NAND_CMD_STATUS_ERROR0 0x73
2326 +#define NAND_CMD_STATUS_ERROR1 0x74
2327 +#define NAND_CMD_STATUS_ERROR2 0x75
2328 +#define NAND_CMD_STATUS_ERROR3 0x76
2329 +#define NAND_CMD_STATUS_RESET  0x7f
2330 +#define NAND_CMD_STATUS_CLEAR  0xff
2331 +
2332 +#define NAND_CMD_NONE          -1
2333 +
2334 +/* Status bits */
2335 +#define NAND_STATUS_FAIL       0x01
2336 +#define NAND_STATUS_FAIL_N1    0x02
2337 +#define NAND_STATUS_TRUE_READY 0x20
2338 +#define NAND_STATUS_READY      0x40
2339 +#define NAND_STATUS_WP         0x80
2340 +
2341 +typedef enum {
2342 +       FL_READY,
2343 +       FL_READING,
2344 +       FL_WRITING,
2345 +       FL_ERASING,
2346 +       FL_SYNCING,
2347 +       FL_CACHEDPRG,
2348 +       FL_PM_SUSPENDED,
2349 +} nand_state_t;
2350 +
2351 +/*************************************************************/
2352 +
2353 +
2354 +
2355 +typedef enum _ra_flags {
2356 +       FLAG_NONE       = 0,
2357 +       FLAG_ECC_EN     = (1<<0),
2358 +       FLAG_USE_GDMA   = (1<<1),
2359 +       FLAG_VERIFY     = (1<<2),
2360 +} RA_FLAGS;
2361 +
2362 +
2363 +#define BBTTAG_BITS            2
2364 +#define BBTTAG_BITS_MASK       ((1<<BBTTAG_BITS) -1)
2365 +enum BBT_TAG {
2366 +       BBT_TAG_UNKNOWN = 0, //2'b01
2367 +       BBT_TAG_GOOD    = 3, //2'b11
2368 +       BBT_TAG_BAD     = 2, //2'b10
2369 +       BBT_TAG_RES     = 1, //2'b01
2370 +};
2371 +
2372 +struct ra_nand_chip {
2373 +       int     numchips;
2374 +       int     chip_shift;
2375 +       int     page_shift;
2376 +       int     erase_shift;
2377 +       int     oob_shift;
2378 +       int     badblockpos;
2379 +#if !defined (__UBOOT__)
2380 +       struct mutex hwcontrol;
2381 +       struct mutex *controller;
2382 +#endif
2383 +       struct nand_ecclayout   *oob;
2384 +       int     state;
2385 +       unsigned int    buffers_page;
2386 +       char    *buffers; //[CFG_PAGESIZE + CFG_PAGE_OOBSIZE];
2387 +       char    *readback_buffers;
2388 +       unsigned char   *bbt;
2389 +#if defined (WORKAROUND_RX_BUF_OV)
2390 +       unsigned int     sandbox_page;  // steal a page (block) for read ECC verification
2391 +#endif
2392 +
2393 +};
2394 +
2395 +
2396 +
2397 +//fixme, gdma api
2398 +int nand_dma_sync(void);
2399 +void release_dma_buf(void);
2400 +int set_gdma_ch(unsigned long dst,
2401 +               unsigned long src, unsigned int len, int burst_size,
2402 +               int soft_mode, int src_req_type, int dst_req_type,
2403 +               int src_burst_mode, int dst_burst_mode);
2404 +
2405 +
2406 +
2407 +
2408 +#endif