target/linux/ramips/patches-3.14/0020-MIPS-ralink-update-dts-files.patch

   1 From 0c1e8630dca36c2d5a9bf98a5f1f8c15f75d0253 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 12 Aug 2013 18:11:33 +0200
   4 Subject: [PATCH 20/57] MIPS: ralink: update dts files
   5
   6 Add the devicetree nodes needed to make the newly merged drivers work.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/ralink/dts/mt7620a.dtsi |  135 +++++++++++++++++++++++
  11  arch/mips/ralink/dts/rt3050.dtsi  |  156 ++++++++++++++++++++++++++
  12  arch/mips/ralink/dts/rt3883.dtsi  |  219 +++++++++++++++++++++++++++++++++++++
  13  3 files changed, 510 insertions(+)
  14
  15 --- a/arch/mips/ralink/dts/mt7620a.dtsi
  16 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
  17 @@ -29,10 +29,32 @@
  18                         reg = <0x0 0x100>;
  19                 };
  20
  21 +               timer@100 {
  22 +                       compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  23 +                       reg = <0x100 0x20>;
  24 +
  25 +                       interrupt-parent = <&intc>;
  26 +                       interrupts = <1>;
  27 +               };
  28 +
  29 +               watchdog@120 {
  30 +                       compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  31 +                       reg = <0x120 0x10>;
  32 +
  33 +                       resets = <&rstctrl 8>;
  34 +                       reset-names = "wdt";
  35 +
  36 +                       interrupt-parent = <&intc>;
  37 +                       interrupts = <1>;
  38 +               };
  39 +
  40                 intc: intc@200 {
  41                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  42                         reg = <0x200 0x100>;
  43
  44 +                       resets = <&rstctrl 19>;
  45 +                       reset-names = "intc";
  46 +
  47                         interrupt-controller;
  48                         #interrupt-cells = <1>;
  49
  50 @@ -43,16 +65,129 @@
  51                 memc@300 {
  52                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  53                         reg = <0x300 0x100>;
  54 +
  55 +                       resets = <&rstctrl 20>;
  56 +                       reset-names = "mc";
  57 +
  58 +                       interrupt-parent = <&intc>;
  59 +                       interrupts = <3>;
  60 +               };
  61 +
  62 +               uart@500 {
  63 +                       compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  64 +                       reg = <0x500 0x100>;
  65 +
  66 +                       resets = <&rstctrl 12>;
  67 +                       reset-names = "uart";
  68 +
  69 +                       interrupt-parent = <&intc>;
  70 +                       interrupts = <5>;
  71 +
  72 +                       reg-shift = <2>;
  73 +
  74 +                       status = "disabled";
  75 +               };
  76 +
  77 +               gpio0: gpio@600 {
  78 +                       compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  79 +                       reg = <0x600 0x34>;
  80 +
  81 +                       resets = <&rstctrl 13>;
  82 +                       reset-names = "pio";
  83 +
  84 +                       interrupt-parent = <&intc>;
  85 +                       interrupts = <6>;
  86 +
  87 +                       gpio-controller;
  88 +                       #gpio-cells = <2>;
  89 +
  90 +                       ralink,gpio-base = <0>;
  91 +                       ralink,num-gpios = <24>;
  92 +                       ralink,register-map = [ 00 04 08 0c
  93 +                                               20 24 28 2c
  94 +                                               30 34 ];
  95 +
  96 +                       status = "disabled";
  97 +               };
  98 +
  99 +               gpio1: gpio@638 {
 100 +                       compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 101 +                       reg = <0x638 0x24>;
 102 +
 103 +                       interrupt-parent = <&intc>;
 104 +                       interrupts = <6>;
 105 +
 106 +                       gpio-controller;
 107 +                       #gpio-cells = <2>;
 108 +
 109 +                       ralink,gpio-base = <24>;
 110 +                       ralink,num-gpios = <16>;
 111 +                       ralink,register-map = [ 00 04 08 0c
 112 +                                               10 14 18 1c
 113 +                                               20 24 ];
 114 +
 115 +                       status = "disabled";
 116 +               };
 117 +
 118 +               gpio2: gpio@660 {
 119 +                       compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 120 +                       reg = <0x660 0x24>;
 121 +
 122 +                       interrupt-parent = <&intc>;
 123 +                       interrupts = <6>;
 124 +
 125 +                       gpio-controller;
 126 +                       #gpio-cells = <2>;
 127 +
 128 +                       ralink,gpio-base = <40>;
 129 +                       ralink,num-gpios = <32>;
 130 +                       ralink,register-map = [ 00 04 08 0c
 131 +                                               10 14 18 1c
 132 +                                               20 24 ];
 133 +
 134 +                       status = "disabled";
 135 +               };
 136 +
 137 +               spi@b00 {
 138 +                       compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 139 +                       reg = <0xb00 0x100>;
 140 +
 141 +                       resets = <&rstctrl 18>;
 142 +                       reset-names = "spi";
 143 +
 144 +                       #address-cells = <1>;
 145 +                       #size-cells = <1>;
 146 +
 147 +                       status = "disabled";
 148                 };
 149
 150                 uartlite@c00 {
 151                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 152                         reg = <0xc00 0x100>;
 153
 154 +                       resets = <&rstctrl 19>;
 155 +                       reset-names = "uartl";
 156 +
 157                         interrupt-parent = <&intc>;
 158                         interrupts = <12>;
 159
 160                         reg-shift = <2>;
 161                 };
 162 +
 163 +               systick@d00 {
 164 +                       compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 165 +                       reg = <0xd00 0x10>;
 166 +
 167 +                       resets = <&rstctrl 28>;
 168 +                       reset-names = "intc";
 169 +
 170 +                       interrupt-parent = <&cpuintc>;
 171 +                       interrupts = <7>;
 172 +               };
 173 +       };
 174 +
 175 +       rstctrl: rstctrl {
 176 +               compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 177 +               #reset-cells = <1>;
 178         };
 179  };
 180 --- a/arch/mips/ralink/dts/rt3050.dtsi
 181 +++ b/arch/mips/ralink/dts/rt3050.dtsi
 182 @@ -9,6 +9,10 @@
 183                 };
 184         };
 185
 186 +       chosen {
 187 +               bootargs = "console=ttyS0,57600";
 188 +       };
 189 +
 190         cpuintc: cpuintc@0 {
 191                 #address-cells = <0>;
 192                 #interrupt-cells = <1>;
 193 @@ -29,10 +33,32 @@
 194                         reg = <0x0 0x100>;
 195                 };
 196
 197 +               timer@100 {
 198 +                       compatible = "ralink,rt3052-timer", "ralink,rt2880-timer";
 199 +                       reg = <0x100 0x20>;
 200 +
 201 +                       interrupt-parent = <&intc>;
 202 +                       interrupts = <1>;
 203 +               };
 204 +
 205 +               watchdog@120 {
 206 +                       compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
 207 +                       reg = <0x120 0x10>;
 208 +
 209 +                       resets = <&rstctrl 8>;
 210 +                       reset-names = "wdt";
 211 +
 212 +                       interrupt-parent = <&intc>;
 213 +                       interrupts = <1>;
 214 +               };
 215 +
 216                 intc: intc@200 {
 217                         compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
 218                         reg = <0x200 0x100>;
 219
 220 +                       resets = <&rstctrl 19>;
 221 +                       reset-names = "intc";
 222 +
 223                         interrupt-controller;
 224                         #interrupt-cells = <1>;
 225
 226 @@ -43,17 +69,144 @@
 227                 memc@300 {
 228                         compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
 229                         reg = <0x300 0x100>;
 230 +
 231 +                       resets = <&rstctrl 20>;
 232 +                       reset-names = "mc";
 233 +
 234 +                       interrupt-parent = <&intc>;
 235 +                       interrupts = <3>;
 236 +               };
 237 +
 238 +               uart@500 {
 239 +                       compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
 240 +                       reg = <0x500 0x100>;
 241 +
 242 +                       resets = <&rstctrl 12>;
 243 +                       reset-names = "uart";
 244 +
 245 +                       interrupt-parent = <&intc>;
 246 +                       interrupts = <5>;
 247 +
 248 +                       reg-shift = <2>;
 249 +
 250 +                       status = "disabled";
 251 +               };
 252 +
 253 +               gpio0: gpio@600 {
 254 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
 255 +                       reg = <0x600 0x34>;
 256 +
 257 +                       gpio-controller;
 258 +                       #gpio-cells = <2>;
 259 +
 260 +                       ralink,gpio-base = <0>;
 261 +                       ralink,num-gpios = <24>;
 262 +                       ralink,register-map = [ 00 04 08 0c
 263 +                                               20 24 28 2c
 264 +                                               30 34 ];
 265 +
 266 +                       resets = <&rstctrl 13>;
 267 +                       reset-names = "pio";
 268 +
 269 +                       interrupt-parent = <&intc>;
 270 +                       interrupts = <6>;
 271 +
 272 +                       status = "disabled";
 273 +               };
 274 +
 275 +               gpio1: gpio@638 {
 276 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
 277 +                       reg = <0x638 0x24>;
 278 +
 279 +                       gpio-controller;
 280 +                       #gpio-cells = <2>;
 281 +
 282 +                       ralink,gpio-base = <24>;
 283 +                       ralink,num-gpios = <16>;
 284 +                       ralink,register-map = [ 00 04 08 0c
 285 +                                               10 14 18 1c
 286 +                                               20 24 ];
 287 +
 288 +                       status = "disabled";
 289 +               };
 290 +
 291 +               gpio2: gpio@660 {
 292 +                       compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
 293 +                       reg = <0x660 0x24>;
 294 +
 295 +                       gpio-controller;
 296 +                       #gpio-cells = <2>;
 297 +
 298 +                       ralink,gpio-base = <40>;
 299 +                       ralink,num-gpios = <12>;
 300 +                       ralink,register-map = [ 00 04 08 0c
 301 +                                               10 14 18 1c
 302 +                                               20 24 ];
 303 +
 304 +                       status = "disabled";
 305 +               };
 306 +
 307 +               spi@b00 {
 308 +                       compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
 309 +                       reg = <0xb00 0x100>;
 310 +
 311 +                       resets = <&rstctrl 18>;
 312 +                       reset-names = "spi";
 313 +
 314 +                       #address-cells = <1>;
 315 +                       #size-cells = <0>;
 316 +
 317 +                       status = "disabled";
 318                 };
 319
 320                 uartlite@c00 {
 321                         compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
 322                         reg = <0xc00 0x100>;
 323
 324 +                       resets = <&rstctrl 19>;
 325 +                       reset-names = "uartl";
 326 +
 327                         interrupt-parent = <&intc>;
 328                         interrupts = <12>;
 329
 330                         reg-shift = <2>;
 331                 };
 332 +
 333 +       };
 334 +
 335 +       rstctrl: rstctrl {
 336 +               compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
 337 +               #reset-cells = <1>;
 338 +       };
 339 +
 340 +       ethernet@10100000 {
 341 +               compatible = "ralink,rt3050-eth";
 342 +               reg = <0x10100000 10000>;
 343 +
 344 +               interrupt-parent = <&cpuintc>;
 345 +               interrupts = <5>;
 346 +
 347 +               status = "disabled";
 348 +       };
 349 +
 350 +       esw@10110000 {
 351 +               compatible = "ralink,rt3050-esw";
 352 +               reg = <0x10110000 8000>;
 353 +
 354 +               interrupt-parent = <&intc>;
 355 +               interrupts = <17>;
 356 +
 357 +               status = "disabled";
 358 +       };
 359 +
 360 +       wmac@10180000 {
 361 +               compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
 362 +               reg = <0x10180000 40000>;
 363 +
 364 +               interrupt-parent = <&cpuintc>;
 365 +               interrupts = <6>;
 366 +
 367 +               status = "disabled";
 368         };
 369
 370         usb@101c0000 {
 371 @@ -63,6 +216,9 @@
 372                 interrupt-parent = <&intc>;
 373                 interrupts = <18>;
 374
 375 +               resets = <&rstctrl 22>;
 376 +               reset-names = "otg";
 377 +
 378                 status = "disabled";
 379         };
 380  };
 381 --- a/arch/mips/ralink/dts/rt3883.dtsi
 382 +++ b/arch/mips/ralink/dts/rt3883.dtsi
 383 @@ -29,10 +29,32 @@
 384                         reg = <0x0 0x100>;
 385                 };
 386
 387 +               timer@100 {
 388 +                       compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
 389 +                       reg = <0x100 0x20>;
 390 +
 391 +                       interrupt-parent = <&intc>;
 392 +                       interrupts = <1>;
 393 +               };
 394 +
 395 +               watchdog@120 {
 396 +                       compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
 397 +                       reg = <0x120 0x10>;
 398 +
 399 +                       resets = <&rstctrl 8>;
 400 +                       reset-names = "wdt";
 401 +
 402 +                       interrupt-parent = <&intc>;
 403 +                       interrupts = <1>;
 404 +               };
 405 +
 406                 intc: intc@200 {
 407                         compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
 408                         reg = <0x200 0x100>;
 409
 410 +                       resets = <&rstctrl 19>;
 411 +                       reset-names = "intc";
 412 +
 413                         interrupt-controller;
 414                         #interrupt-cells = <1>;
 415
 416 @@ -43,16 +65,213 @@
 417                 memc@300 {
 418                         compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
 419                         reg = <0x300 0x100>;
 420 +
 421 +                       resets = <&rstctrl 20>;
 422 +                       reset-names = "mc";
 423 +
 424 +                       interrupt-parent = <&intc>;
 425 +                       interrupts = <3>;
 426 +               };
 427 +
 428 +               uart@500 {
 429 +                       compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 430 +                       reg = <0x500 0x100>;
 431 +
 432 +                       resets = <&rstctrl 12>;
 433 +                       reset-names = "uart";
 434 +
 435 +                       interrupt-parent = <&intc>;
 436 +                       interrupts = <5>;
 437 +
 438 +                       reg-shift = <2>;
 439 +
 440 +                       status = "disabled";
 441 +               };
 442 +
 443 +               gpio0: gpio@600 {
 444 +                       compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 445 +                       reg = <0x600 0x34>;
 446 +
 447 +                       resets = <&rstctrl 13>;
 448 +                       reset-names = "pio";
 449 +
 450 +                       interrupt-parent = <&intc>;
 451 +                       interrupts = <6>;
 452 +
 453 +                       gpio-controller;
 454 +                       #gpio-cells = <2>;
 455 +
 456 +                       ralink,gpio-base = <0>;
 457 +                       ralink,num-gpios = <24>;
 458 +                       ralink,register-map = [ 00 04 08 0c
 459 +                                               20 24 28 2c
 460 +                                               30 34 ];
 461 +
 462 +                       status = "disabled";
 463 +               };
 464 +
 465 +               gpio1: gpio@638 {
 466 +                       compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 467 +                       reg = <0x638 0x24>;
 468 +
 469 +                       gpio-controller;
 470 +                       #gpio-cells = <2>;
 471 +
 472 +                       ralink,gpio-base = <24>;
 473 +                       ralink,num-gpios = <16>;
 474 +                       ralink,register-map = [ 00 04 08 0c
 475 +                                               10 14 18 1c
 476 +                                               20 24 ];
 477 +
 478 +                       status = "disabled";
 479 +               };
 480 +
 481 +               gpio2: gpio@660 {
 482 +                       compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 483 +                       reg = <0x660 0x24>;
 484 +
 485 +                       gpio-controller;
 486 +                       #gpio-cells = <2>;
 487 +
 488 +                       ralink,gpio-base = <40>;
 489 +                       ralink,num-gpios = <32>;
 490 +                       ralink,register-map = [ 00 04 08 0c
 491 +                                               10 14 18 1c
 492 +                                               20 24 ];
 493 +
 494 +                       status = "disabled";
 495 +               };
 496 +
 497 +               gpio3: gpio@688 {
 498 +                       compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 499 +                       reg = <0x688 0x24>;
 500 +
 501 +                       gpio-controller;
 502 +                       #gpio-cells = <2>;
 503 +
 504 +                       ralink,gpio-base = <72>;
 505 +                       ralink,num-gpios = <24>;
 506 +                       ralink,register-map = [ 00 04 08 0c
 507 +                                               10 14 18 1c
 508 +                                               20 24 ];
 509 +
 510 +                       status = "disabled";
 511 +               };
 512 +
 513 +               spi0: spi@b00 {
 514 +                       compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
 515 +                       reg = <0xb00 0x100>;
 516 +                       #address-cells = <1>;
 517 +                       #size-cells = <0>;
 518 +
 519 +                       resets = <&rstctrl 18>;
 520 +                       reset-names = "spi";
 521 +
 522 +                       status = "disabled";
 523                 };
 524
 525                 uartlite@c00 {
 526                         compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 527                         reg = <0xc00 0x100>;
 528
 529 +                       resets = <&rstctrl 19>;
 530 +                       reset-names = "uartl";
 531 +
 532                         interrupt-parent = <&intc>;
 533                         interrupts = <12>;
 534
 535                         reg-shift = <2>;
 536                 };
 537         };
 538 +
 539 +       rstctrl: rstctrl {
 540 +               compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
 541 +               #reset-cells = <1>;
 542 +       };
 543 +
 544 +       pci@10140000 {
 545 +               compatible = "ralink,rt3883-pci";
 546 +               reg = <0x10140000 0x20000>;
 547 +               #address-cells = <1>;
 548 +               #size-cells = <1>;
 549 +               ranges; /* direct mapping */
 550 +
 551 +               status = "disabled";
 552 +
 553 +               pciintc: interrupt-controller {
 554 +                       interrupt-controller;
 555 +                       #address-cells = <0>;
 556 +                       #interrupt-cells = <1>;
 557 +
 558 +                       interrupt-parent = <&cpuintc>;
 559 +                       interrupts = <4>;
 560 +               };
 561 +
 562 +               host-bridge {
 563 +                       #address-cells = <3>;
 564 +                       #size-cells = <2>;
 565 +                       #interrupt-cells = <1>;
 566 +
 567 +                       device_type = "pci";
 568 +
 569 +                       bus-range = <0 255>;
 570 +                       ranges = <
 571 +                               0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 572 +                               0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 573 +                       >;
 574 +
 575 +                       interrupt-map-mask = <0xf800 0 0 7>;
 576 +                       interrupt-map = <
 577 +                               /* IDSEL 17 */
 578 +                               0x8800 0 0 1 &pciintc 18
 579 +                               0x8800 0 0 2 &pciintc 18
 580 +                               0x8800 0 0 3 &pciintc 18
 581 +                               0x8800 0 0 4 &pciintc 18
 582 +                               /* IDSEL 18 */
 583 +                               0x9000 0 0 1 &pciintc 19
 584 +                               0x9000 0 0 2 &pciintc 19
 585 +                               0x9000 0 0 3 &pciintc 19
 586 +                               0x9000 0 0 4 &pciintc 19
 587 +                       >;
 588 +
 589 +                       pci-bridge@1 {
 590 +                               reg = <0x0800 0 0 0 0>;
 591 +                               device_type = "pci";
 592 +                               #interrupt-cells = <1>;
 593 +                               #address-cells = <3>;
 594 +                               #size-cells = <2>;
 595 +
 596 +                               status = "disabled";
 597 +
 598 +                               ralink,pci-slot = <1>;
 599 +
 600 +                               interrupt-map-mask = <0x0 0 0 0>;
 601 +                               interrupt-map = <0x0 0 0 0 &pciintc 20>;
 602 +                       };
 603 +
 604 +                       pci-slot@17 {
 605 +                               reg = <0x8800 0 0 0 0>;
 606 +                               device_type = "pci";
 607 +                               #interrupt-cells = <1>;
 608 +                               #address-cells = <3>;
 609 +                               #size-cells = <2>;
 610 +
 611 +                               ralink,pci-slot = <17>;
 612 +
 613 +                               status = "disabled";
 614 +                       };
 615 +
 616 +                       pci-slot@18 {
 617 +                               reg = <0x9000 0 0 0 0>;
 618 +                               device_type = "pci";
 619 +                               #interrupt-cells = <1>;
 620 +                               #address-cells = <3>;
 621 +                               #size-cells = <2>;
 622 +
 623 +                               ralink,pci-slot = <18>;
 624 +
 625 +                               status = "disabled";
 626 +                       };
 627 +               };
 628 +       };
 629  };