target/linux/ramips/patches-3.10/0250-nand-7620.patch

   1 From a5fc495c8dc199ffa997d43331693a5b7ee07270 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 17 Nov 2013 17:41:46 +0100
   4 Subject: [PATCH] ralink: add mt7620 nand driver
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/mtd/maps/Kconfig       |    4 +
   9  drivers/mtd/maps/Makefile      |    2 +
  10  drivers/mtd/maps/ralink_nand.c | 2136 ++++++++++++++++++++++++++++++++++++++++
  11  drivers/mtd/maps/ralink_nand.h |  232 +++++
  12  drivers/mtd/nand/Makefile      |    2 +-
  13  5 files changed, 2375 insertions(+), 1 deletion(-)
  14  create mode 100644 drivers/mtd/maps/ralink_nand.c
  15  create mode 100644 drivers/mtd/maps/ralink_nand.h
  16
  17 --- a/drivers/mtd/maps/Kconfig
  18 +++ b/drivers/mtd/maps/Kconfig
  19 @@ -424,4 +424,8 @@ config MTD_LATCH_ADDR
  20
  21            If compiled as a module, it will be called latch-addr-flash.
  22
  23 +config MTD_NAND_MT7620
  24 +       tristate "Support for NAND on Mediatek MT7620"
  25 +       depends on RALINK && SOC_MT7620
  26 +
  27  endmenu
  28 --- a/drivers/mtd/maps/Makefile
  29 +++ b/drivers/mtd/maps/Makefile
  30 @@ -46,3 +46,5 @@ obj-$(CONFIG_MTD_VMU)         += vmu-flash.o
  31  obj-$(CONFIG_MTD_GPIO_ADDR)    += gpio-addr-flash.o
  32  obj-$(CONFIG_MTD_LATCH_ADDR)   += latch-addr-flash.o
  33  obj-$(CONFIG_MTD_LANTIQ)       += lantiq-flash.o
  34 +obj-$(CONFIG_MTD_NAND_MT7620)  += ralink_nand.o
  35 +
  36 --- /dev/null
  37 +++ b/drivers/mtd/maps/ralink_nand.c
  38 @@ -0,0 +1,2136 @@
  39 +#define DEBUG
  40 +#include <linux/device.h>
  41 +#undef DEBUG
  42 +#include <linux/slab.h>
  43 +#include <linux/mtd/mtd.h>
  44 +#include <linux/delay.h>
  45 +#include <linux/module.h>
  46 +#include <linux/interrupt.h>
  47 +#include <linux/dma-mapping.h>
  48 +#include <linux/mtd/partitions.h>
  49 +#include <asm/io.h>
  50 +#include <linux/delay.h>
  51 +#include <linux/sched.h>
  52 +#include <linux/of.h>
  53 +#include <linux/platform_device.h>
  54 +
  55 +#include "ralink_nand.h"
  56 +#ifdef RANDOM_GEN_BAD_BLOCK
  57 +#include <linux/random.h>
  58 +#endif
  59 +
  60 +#define LARGE_MTD_BOOT_PART_SIZE       (CFG_BLOCKSIZE<<2)
  61 +#define LARGE_MTD_CONFIG_PART_SIZE     (CFG_BLOCKSIZE<<2)
  62 +#define LARGE_MTD_FACTORY_PART_SIZE    (CFG_BLOCKSIZE<<1)
  63 +
  64 +
  65 +#define BLOCK_ALIGNED(a) ((a) & (CFG_BLOCKSIZE - 1))
  66 +
  67 +#define READ_STATUS_RETRY      1000
  68 +
  69 +struct mtd_info *ranfc_mtd = NULL;
  70 +
  71 +int skipbbt = 0;
  72 +int ranfc_debug = 1;
  73 +static int ranfc_bbt = 1;
  74 +#if defined (WORKAROUND_RX_BUF_OV)
  75 +static int ranfc_verify = 1;
  76 +#endif
  77 +static u32 nand_addrlen;
  78 +
  79 +#if 0
  80 +module_param(ranfc_debug, int, 0644);
  81 +module_param(ranfc_bbt, int, 0644);
  82 +module_param(ranfc_verify, int, 0644);
  83 +#endif
  84 +
  85 +#if 0
  86 +#define ra_dbg(args...) do { if (ranfc_debug) printk(args); } while(0)
  87 +#else
  88 +#define ra_dbg(args...)
  89 +#endif
  90 +
  91 +#define CLEAR_INT_STATUS()     ra_outl(NFC_INT_ST, ra_inl(NFC_INT_ST))
  92 +#define NFC_TRANS_DONE()       (ra_inl(NFC_INT_ST) & INT_ST_ND_DONE)
  93 +
  94 +int is_nand_page_2048 = 0;
  95 +const unsigned int nand_size_map[2][3] = {{25, 30, 30}, {20, 27, 30}};
  96 +
  97 +static int nfc_wait_ready(int snooze_ms);
  98 +
  99 +static const char * const mtk_probe_types[] = { "cmdlinepart", "ofpart", NULL };
 100 +
 101 +/**
 102 + * reset nand chip
 103 + */
 104 +static int nfc_chip_reset(void)
 105 +{
 106 +       int status;
 107 +
 108 +       //ra_dbg("%s:\n", __func__);
 109 +
 110 +       // reset nand flash
 111 +       ra_outl(NFC_CMD1, 0x0);
 112 +       ra_outl(NFC_CMD2, 0xff);
 113 +       ra_outl(NFC_ADDR, 0x0);
 114 +       ra_outl(NFC_CONF, 0x0411);
 115 +
 116 +       status = nfc_wait_ready(5);  //erase wait 5us
 117 +       if (status & NAND_STATUS_FAIL) {
 118 +               printk("%s: fail \n", __func__);
 119 +       }
 120 +
 121 +       return (int)(status & NAND_STATUS_FAIL);
 122 +
 123 +}
 124 +
 125 +
 126 +
 127 +/**
 128 + * clear NFC and flash chip.
 129 + */
 130 +static int nfc_all_reset(void)
 131 +{
 132 +       int retry;
 133 +
 134 +       ra_dbg("%s: \n", __func__);
 135 +
 136 +       // reset controller
 137 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 138 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 139 +
 140 +       CLEAR_INT_STATUS();
 141 +
 142 +       retry = READ_STATUS_RETRY;
 143 +       while ((ra_inl(NFC_INT_ST) & 0x02) != 0x02 && retry--);
 144 +       if (retry <= 0) {
 145 +               printk("nfc_all_reset: clean buffer fail \n");
 146 +               return -1;
 147 +       }
 148 +
 149 +       retry = READ_STATUS_RETRY;
 150 +       while ((ra_inl(NFC_STATUS) & 0x1) != 0x0 && retry--) { //fixme, controller is busy ?
 151 +               udelay(1);
 152 +       }
 153 +
 154 +       nfc_chip_reset();
 155 +
 156 +       return 0;
 157 +}
 158 +
 159 +/** NOTICE: only called by nfc_wait_ready().
 160 + * @return -1, nfc can not get transction done
 161 + * @return 0, ok.
 162 + */
 163 +static int _nfc_read_status(char *status)
 164 +{
 165 +       unsigned long cmd1, conf;
 166 +       int int_st, nfc_st;
 167 +       int retry;
 168 +
 169 +       cmd1 = 0x70;
 170 +       conf = 0x000101 | (1 << 20);
 171 +
 172 +       //fixme, should we check nfc status?
 173 +       CLEAR_INT_STATUS();
 174 +
 175 +       ra_outl(NFC_CMD1, cmd1);
 176 +       ra_outl(NFC_CONF, conf);
 177 +
 178 +       /* FIXME,
 179 +        * 1. since we have no wired ready signal, directly
 180 +        * calling this function is not gurantee to read right status under ready state.
 181 +        * 2. the other side, we can not determine how long to become ready, this timeout retry is nonsense.
 182 +        * 3. SUGGESTION: call nfc_read_status() from nfc_wait_ready(),
 183 +        * that is aware about caller (in sementics) and has snooze plused nfc ND_DONE.
 184 +        */
 185 +       retry = READ_STATUS_RETRY;
 186 +       do {
 187 +               nfc_st = ra_inl(NFC_STATUS);
 188 +               int_st = ra_inl(NFC_INT_ST);
 189 +
 190 +               ndelay(10);
 191 +       } while (!(int_st & INT_ST_RX_BUF_RDY) && retry--);
 192 +
 193 +       if (!(int_st & INT_ST_RX_BUF_RDY)) {
 194 +               printk("nfc_read_status: NFC fail, int_st(%x), retry:%x. nfc:%x, reset nfc and flash. \n",
 195 +                      int_st, retry, nfc_st);
 196 +               nfc_all_reset();
 197 +               *status = NAND_STATUS_FAIL;
 198 +               return -1;
 199 +       }
 200 +
 201 +       *status = (char)(le32_to_cpu(ra_inl(NFC_DATA)) & 0x0ff);
 202 +       return 0;
 203 +}
 204 +
 205 +/**
 206 + * @return !0, chip protect.
 207 + * @return 0, chip not protected.
 208 + */
 209 +static int nfc_check_wp(void)
 210 +{
 211 +       /* Check the WP bit */
 212 +#if !defined CONFIG_NOT_SUPPORT_WP
 213 +       return !!(ra_inl(NFC_CTRL) & 0x01);
 214 +#else
 215 +       char result = 0;
 216 +       int ret;
 217 +
 218 +       ret = _nfc_read_status(&result);
 219 +       //FIXME, if ret < 0
 220 +
 221 +       return !(result & NAND_STATUS_WP);
 222 +#endif
 223 +}
 224 +
 225 +#if !defined CONFIG_NOT_SUPPORT_RB
 226 +/*
 227 + * @return !0, chip ready.
 228 + * @return 0, chip busy.
 229 + */
 230 +static int nfc_device_ready(void)
 231 +{
 232 +       /* Check the ready  */
 233 +       return !!(ra_inl(NFC_STATUS) & 0x04);
 234 +}
 235 +#endif
 236 +
 237 +
 238 +/**
 239 + * generic function to get data from flash.
 240 + * @return data length reading from flash.
 241 + */
 242 +static int _ra_nand_pull_data(char *buf, int len, int use_gdma)
 243 +{
 244 +#ifdef RW_DATA_BY_BYTE
 245 +       char *p = buf;
 246 +#else
 247 +       __u32 *p = (__u32 *)buf;
 248 +#endif
 249 +       int retry, int_st;
 250 +       unsigned int ret_data;
 251 +       int ret_size;
 252 +
 253 +       // receive data by use_gdma
 254 +       if (use_gdma) {
 255 +               //if (_ra_nand_dma_pull((unsigned long)p, len)) {
 256 +               if (1) {
 257 +                       printk("%s: fail \n", __func__);
 258 +                       len = -1; //return error
 259 +               }
 260 +
 261 +               return len;
 262 +       }
 263 +
 264 +       //fixme: retry count size?
 265 +       retry = READ_STATUS_RETRY;
 266 +       // no gdma
 267 +       while (len > 0) {
 268 +               int_st = ra_inl(NFC_INT_ST);
 269 +               if (int_st & INT_ST_RX_BUF_RDY) {
 270 +
 271 +                       ret_data = ra_inl(NFC_DATA);
 272 +                       ra_outl(NFC_INT_ST, INT_ST_RX_BUF_RDY);
 273 +#ifdef RW_DATA_BY_BYTE
 274 +                       ret_size = sizeof(unsigned int);
 275 +                       ret_size = min(ret_size, len);
 276 +                       len -= ret_size;
 277 +                       while (ret_size-- > 0) {
 278 +                               //nfc is little endian
 279 +                               *p++ = ret_data & 0x0ff;
 280 +                               ret_data >>= 8;
 281 +                       }
 282 +#else
 283 +                       ret_size = min(len, 4);
 284 +                       len -= ret_size;
 285 +                       if (ret_size == 4)
 286 +                               *p++ = ret_data;
 287 +                       else {
 288 +                               __u8 *q = (__u8 *)p;
 289 +                               while (ret_size-- > 0) {
 290 +                                       *q++ = ret_data & 0x0ff;
 291 +                                       ret_data >>= 8;
 292 +                               }
 293 +                               p = (__u32 *)q;
 294 +                       }
 295 +#endif
 296 +                       retry = READ_STATUS_RETRY;
 297 +               }
 298 +               else if (int_st & INT_ST_ND_DONE) {
 299 +                       break;
 300 +               }
 301 +               else {
 302 +                       udelay(1);
 303 +                       if (retry-- < 0)
 304 +                               break;
 305 +               }
 306 +       }
 307 +
 308 +#ifdef RW_DATA_BY_BYTE
 309 +       return (int)(p - buf);
 310 +#else
 311 +       return ((int)p - (int)buf);
 312 +#endif
 313 +}
 314 +
 315 +/**
 316 + * generic function to put data into flash.
 317 + * @return data length writing into flash.
 318 + */
 319 +static int _ra_nand_push_data(char *buf, int len, int use_gdma)
 320 +{
 321 +#ifdef RW_DATA_BY_BYTE
 322 +       char *p = buf;
 323 +#else
 324 +       __u32 *p = (__u32 *)buf;
 325 +#endif
 326 +       int retry, int_st;
 327 +       unsigned int tx_data = 0;
 328 +       int tx_size, iter = 0;
 329 +
 330 +       // receive data by use_gdma
 331 +       if (use_gdma) {
 332 +               //if (_ra_nand_dma_push((unsigned long)p, len))
 333 +               if (1)
 334 +                       len = 0;
 335 +               printk("%s: fail \n", __func__);
 336 +               return len;
 337 +       }
 338 +
 339 +       // no gdma
 340 +       retry = READ_STATUS_RETRY;
 341 +       while (len > 0) {
 342 +               int_st = ra_inl(NFC_INT_ST);
 343 +               if (int_st & INT_ST_TX_BUF_RDY) {
 344 +#ifdef RW_DATA_BY_BYTE
 345 +                       tx_size = min(len, (int)sizeof(unsigned long));
 346 +                       for (iter = 0; iter < tx_size; iter++) {
 347 +                               tx_data |= (*p++ << (8*iter));
 348 +                       }
 349 +#else
 350 +                       tx_size = min(len, 4);
 351 +                       if (tx_size == 4)
 352 +                               tx_data = (*p++);
 353 +                       else {
 354 +                               __u8 *q = (__u8 *)p;
 355 +                               for (iter = 0; iter < tx_size; iter++)
 356 +                                       tx_data |= (*q++ << (8*iter));
 357 +                               p = (__u32 *)q;
 358 +                       }
 359 +#endif
 360 +                       ra_outl(NFC_INT_ST, INT_ST_TX_BUF_RDY);
 361 +                       ra_outl(NFC_DATA, tx_data);
 362 +                       len -= tx_size;
 363 +                       retry = READ_STATUS_RETRY;
 364 +               }
 365 +               else if (int_st & INT_ST_ND_DONE) {
 366 +                       break;
 367 +               }
 368 +               else {
 369 +                       udelay(1);
 370 +                       if (retry-- < 0) {
 371 +                               ra_dbg("%s p:%p buf:%p \n", __func__, p, buf);
 372 +                               break;
 373 +                       }
 374 +               }
 375 +       }
 376 +
 377 +
 378 +#ifdef RW_DATA_BY_BYTE
 379 +       return (int)(p - buf);
 380 +#else
 381 +       return ((int)p - (int)buf);
 382 +#endif
 383 +
 384 +}
 385 +
 386 +static int nfc_select_chip(struct ra_nand_chip *ra, int chipnr)
 387 +{
 388 +#if (CONFIG_NUMCHIPS == 1)
 389 +       if (!(chipnr < CONFIG_NUMCHIPS))
 390 +               return -1;
 391 +       return 0;
 392 +#else
 393 +       BUG();
 394 +#endif
 395 +}
 396 +
 397 +/** @return -1: chip_select fail
 398 + *         0 : both CE and WP==0 are OK
 399 + *         1 : CE OK and WP==1
 400 + */
 401 +static int nfc_enable_chip(struct ra_nand_chip *ra, unsigned int offs, int read_only)
 402 +{
 403 +       int chipnr = offs >> ra->chip_shift;
 404 +
 405 +       ra_dbg("%s: offs:%x read_only:%x \n", __func__, offs, read_only);
 406 +
 407 +       chipnr = nfc_select_chip(ra, chipnr);
 408 +       if (chipnr < 0) {
 409 +               printk("%s: chip select error, offs(%x)\n", __func__, offs);
 410 +               return -1;
 411 +       }
 412 +
 413 +       if (!read_only)
 414 +               return nfc_check_wp();
 415 +
 416 +       return 0;
 417 +}
 418 +
 419 +/** wait nand chip becomeing ready and return queried status.
 420 + * @param snooze: sleep time in ms unit before polling device ready.
 421 + * @return status of nand chip
 422 + * @return NAN_STATUS_FAIL if something unexpected.
 423 + */
 424 +static int nfc_wait_ready(int snooze_ms)
 425 +{
 426 +       int retry;
 427 +       char status;
 428 +
 429 +       // wait nfc idle,
 430 +       if (snooze_ms == 0)
 431 +               snooze_ms = 1;
 432 +       else
 433 +               schedule_timeout(snooze_ms * HZ / 1000);
 434 +
 435 +       snooze_ms = retry = snooze_ms *1000000 / 100 ;  // ndelay(100)
 436 +
 437 +       while (!NFC_TRANS_DONE() && retry--) {
 438 +               if (!cond_resched())
 439 +                       ndelay(100);
 440 +       }
 441 +
 442 +       if (!NFC_TRANS_DONE()) {
 443 +               printk("nfc_wait_ready: no transaction done \n");
 444 +               return NAND_STATUS_FAIL;
 445 +       }
 446 +
 447 +#if !defined (CONFIG_NOT_SUPPORT_RB)
 448 +       //fixme
 449 +       while(!(status = nfc_device_ready()) && retry--) {
 450 +               ndelay(100);
 451 +       }
 452 +
 453 +       if (status == 0) {
 454 +               printk("nfc_wait_ready: no device ready. \n");
 455 +               return NAND_STATUS_FAIL;
 456 +       }
 457 +
 458 +       _nfc_read_status(&status);
 459 +       return status;
 460 +#else
 461 +
 462 +       while(retry--) {
 463 +               _nfc_read_status(&status);
 464 +               if (status & NAND_STATUS_READY)
 465 +                       break;
 466 +               ndelay(100);
 467 +       }
 468 +       if (retry<0)
 469 +               printk("nfc_wait_ready 2: no device ready, status(%x). \n", status);
 470 +
 471 +       return status;
 472 +#endif
 473 +}
 474 +
 475 +/**
 476 + * return 0: erase OK
 477 + * return -EIO: fail
 478 + */
 479 +int nfc_erase_block(struct ra_nand_chip *ra, int row_addr)
 480 +{
 481 +       unsigned long cmd1, cmd2, bus_addr, conf;
 482 +       char status;
 483 +
 484 +       cmd1 = 0x60;
 485 +       cmd2 = 0xd0;
 486 +       bus_addr = row_addr;
 487 +       conf = 0x00511 | ((CFG_ROW_ADDR_CYCLE)<<16);
 488 +
 489 +       // set NFC
 490 +       ra_dbg("%s: cmd1: %lx, cmd2:%lx bus_addr: %lx, conf: %lx \n",
 491 +              __func__, cmd1, cmd2, bus_addr, conf);
 492 +
 493 +       //fixme, should we check nfc status?
 494 +       CLEAR_INT_STATUS();
 495 +
 496 +       ra_outl(NFC_CMD1, cmd1);
 497 +       ra_outl(NFC_CMD2, cmd2);
 498 +       ra_outl(NFC_ADDR, bus_addr);
 499 +       ra_outl(NFC_CONF, conf);
 500 +
 501 +       status = nfc_wait_ready(3);  //erase wait 3ms
 502 +       if (status & NAND_STATUS_FAIL) {
 503 +               printk("%s: fail \n", __func__);
 504 +               return -EIO;
 505 +       }
 506 +
 507 +       return 0;
 508 +
 509 +}
 510 +
 511 +static inline int _nfc_read_raw_data(int cmd1, int cmd2, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
 512 +{
 513 +       int ret;
 514 +
 515 +       CLEAR_INT_STATUS();
 516 +       ra_outl(NFC_CMD1, cmd1);
 517 +       ra_outl(NFC_CMD2, cmd2);
 518 +       ra_outl(NFC_ADDR, bus_addr);
 519 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 520 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 521 +       ra_outl(NFC_ADDR2, bus_addr2);
 522 +#endif
 523 +       ra_outl(NFC_CONF, conf);
 524 +
 525 +       ret = _ra_nand_pull_data(buf, len, 0);
 526 +       if (ret != len) {
 527 +               ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
 528 +               return NAND_STATUS_FAIL;
 529 +       }
 530 +
 531 +       //FIXME, this section is not necessary
 532 +       ret = nfc_wait_ready(0); //wait ready
 533 +       /* to prevent the DATA FIFO 's old data from next operation */
 534 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 535 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 536 +
 537 +       if (ret & NAND_STATUS_FAIL) {
 538 +               printk("%s: fail \n", __func__);
 539 +               return NAND_STATUS_FAIL;
 540 +       }
 541 +
 542 +       return 0;
 543 +}
 544 +
 545 +static inline int _nfc_write_raw_data(int cmd1, int cmd3, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
 546 +{
 547 +       int ret;
 548 +
 549 +       CLEAR_INT_STATUS();
 550 +       ra_outl(NFC_CMD1, cmd1);
 551 +       ra_outl(NFC_CMD3, cmd3);
 552 +       ra_outl(NFC_ADDR, bus_addr);
 553 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 554 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 555 +       ra_outl(NFC_ADDR2, bus_addr2);
 556 +#endif
 557 +       ra_outl(NFC_CONF, conf);
 558 +
 559 +       ret = _ra_nand_push_data(buf, len, 0);
 560 +       if (ret != len) {
 561 +               ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
 562 +               return NAND_STATUS_FAIL;
 563 +       }
 564 +
 565 +       ret = nfc_wait_ready(1); //write wait 1ms
 566 +       /* to prevent the DATA FIFO 's old data from next operation */
 567 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
 568 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
 569 +
 570 +       if (ret & NAND_STATUS_FAIL) {
 571 +               printk("%s: fail \n", __func__);
 572 +               return NAND_STATUS_FAIL;
 573 +       }
 574 +
 575 +       return 0;
 576 +}
 577 +
 578 +/**
 579 + * @return !0: fail
 580 + * @return 0: OK
 581 + */
 582 +int nfc_read_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
 583 +{
 584 +       unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
 585 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 586 +       unsigned int ecc_en;
 587 +       int use_gdma;
 588 +       int status;
 589 +
 590 +       int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
 591 +       // constrain of nfc read function
 592 +
 593 +#if defined (WORKAROUND_RX_BUF_OV)
 594 +       BUG_ON (len > 60);      //problem of rx-buffer overrun
 595 +#endif
 596 +       BUG_ON (offs >> ra->oob_shift); //page boundry
 597 +       BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
 598 +               ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
 599 +
 600 +       use_gdma = flags & FLAG_USE_GDMA;
 601 +       ecc_en = flags & FLAG_ECC_EN;
 602 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
 603 +
 604 +       if (is_nand_page_2048) {
 605 +               bus_addr += CFG_PAGESIZE;
 606 +               bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
 607 +               cmd1 = 0x0;
 608 +               cmd2 = 0x30;
 609 +               conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 610 +       }
 611 +       else {
 612 +               cmd1 = 0x50;
 613 +               conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 614 +       }
 615 +       if (ecc_en)
 616 +               conf |= (1<<3);
 617 +       if (use_gdma)
 618 +               conf |= (1<<2);
 619 +
 620 +       ra_dbg("%s: cmd1:%x, bus_addr:%x, conf:%x, len:%x, flag:%x\n",
 621 +              __func__, cmd1, bus_addr, conf, len, flags);
 622 +
 623 +       status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf, len, flags);
 624 +       if (status & NAND_STATUS_FAIL) {
 625 +               printk("%s: fail\n", __func__);
 626 +               return -EIO;
 627 +       }
 628 +
 629 +       return 0;
 630 +}
 631 +
 632 +/**
 633 + * @return !0: fail
 634 + * @return 0: OK
 635 + */
 636 +int nfc_write_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
 637 +{
 638 +       unsigned int cmd1 = 0, cmd3=0, conf = 0;
 639 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 640 +       int use_gdma;
 641 +       int status;
 642 +
 643 +       int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
 644 +       // constrain of nfc read function
 645 +
 646 +       BUG_ON (offs >> ra->oob_shift); //page boundry
 647 +       BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
 648 +               ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
 649 +
 650 +       use_gdma = flags & FLAG_USE_GDMA;
 651 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
 652 +
 653 +       if (is_nand_page_2048) {
 654 +               cmd1 = 0x80;
 655 +               cmd3 = 0x10;
 656 +               bus_addr += CFG_PAGESIZE;
 657 +               bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
 658 +               conf = 0x001123 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
 659 +       }
 660 +       else {
 661 +               cmd1 = 0x08050;
 662 +               cmd3 = 0x10;
 663 +               conf = 0x001223 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
 664 +       }
 665 +       if (use_gdma)
 666 +               conf |= (1<<2);
 667 +
 668 +       // set NFC
 669 +       ra_dbg("%s: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
 670 +              __func__, cmd1, cmd3, bus_addr, conf, len);
 671 +
 672 +       status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, len, flags);
 673 +       if (status & NAND_STATUS_FAIL) {
 674 +               printk("%s: fail \n", __func__);
 675 +               return -EIO;
 676 +       }
 677 +
 678 +       return 0;
 679 +}
 680 +
 681 +
 682 +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
 683 +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
 684 +
 685 +
 686 +#if !defined (WORKAROUND_RX_BUF_OV)
 687 +static int one_bit_correction(char *ecc, char *expected, int *bytes, int *bits);
 688 +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
 689 +{
 690 +       int ret, i;
 691 +       char *p, *e;
 692 +       int ecc;
 693 +
 694 +       //ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
 695 +
 696 +       if (mode == FL_WRITING) {
 697 +               int len = CFG_PAGESIZE + CFG_PAGE_OOBSIZE;
 698 +               int conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
 699 +               conf |= (1<<3); //(ecc_en)
 700 +               //conf |= (1<<2); // (use_gdma)
 701 +
 702 +               p = ra->readback_buffers;
 703 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
 704 +               if (ret == 0)
 705 +                       goto ecc_check;
 706 +
 707 +               //FIXME, double comfirm
 708 +               printk("%s: read back fail, try again \n",__func__);
 709 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
 710 +               if (ret != 0) {
 711 +                       printk("\t%s: read back fail agian \n",__func__);
 712 +                       goto bad_block;
 713 +               }
 714 +       }
 715 +       else if (mode == FL_READING) {
 716 +               p = buf;
 717 +       }
 718 +       else
 719 +               return -2;
 720 +
 721 +ecc_check:
 722 +       p += CFG_PAGESIZE;
 723 +       if (!is_nand_page_2048) {
 724 +               ecc = ra_inl(NFC_ECC);
 725 +               if (ecc == 0) //clean page.
 726 +                       return 0;
 727 +               e = (char*)&ecc;
 728 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 729 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 730 +                       if (*(p + eccpos) != (char)0xff)
 731 +                               break;
 732 +                       if (i == CONFIG_ECC_BYTES - 1) {
 733 +                               printk("skip ecc 0xff at page %x\n", page);
 734 +                               return 0;
 735 +                       }
 736 +               }
 737 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 738 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 739 +                       if (*(p + eccpos) != *(e + i)) {
 740 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
 741 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 742 +                                               *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 743 +                               return -1;
 744 +                       }
 745 +               }
 746 +       }
 747 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
 748 +    defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
 749 +       else {
 750 +               int ecc2, ecc3, ecc4, qsz;
 751 +               char *e2, *e3, *e4;
 752 +               int correction_flag = 0;
 753 +               ecc = ra_inl(NFC_ECC_P1);
 754 +               ecc2 = ra_inl(NFC_ECC_P2);
 755 +               ecc3 = ra_inl(NFC_ECC_P3);
 756 +               ecc4 = ra_inl(NFC_ECC_P4);
 757 +               e = (char*)&ecc;
 758 +               e2 = (char*)&ecc2;
 759 +               e3 = (char*)&ecc3;
 760 +               e4 = (char*)&ecc4;
 761 +               qsz = CFG_PAGE_OOBSIZE / 4;
 762 +               if (ecc == 0 && ecc2 == 0 && ecc3 == 0 && ecc4 == 0)
 763 +                       return 0;
 764 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 765 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 766 +                       if (*(p + eccpos) != (char)0xff)
 767 +                               break;
 768 +                       else if (*(p + eccpos + qsz) != (char)0xff)
 769 +                               break;
 770 +                       else if (*(p + eccpos + qsz*2) != (char)0xff)
 771 +                               break;
 772 +                       else if (*(p + eccpos + qsz*3) != (char)0xff)
 773 +                               break;
 774 +                       if (i == CONFIG_ECC_BYTES - 1) {
 775 +                               printk("skip ecc 0xff at page %x\n", page);
 776 +                               return 0;
 777 +                       }
 778 +               }
 779 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 780 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 781 +                       if (*(p + eccpos) != *(e + i)) {
 782 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
 783 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 784 +                                               *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 785 +                               correction_flag |= 0x1;
 786 +                       }
 787 +                       if (*(p + eccpos + qsz) != *(e2 + i)) {
 788 +                               printk("%s mode:%s, invalid ecc2, page: %x read:%x %x %x, ecc2:%x \n",
 789 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 790 +                                               *(p+CONFIG_ECC_OFFSET+qsz), *(p+ CONFIG_ECC_OFFSET+1+qsz), *(p+ CONFIG_ECC_OFFSET+2+qsz), ecc2);
 791 +                               correction_flag |= 0x2;
 792 +                       }
 793 +                       if (*(p + eccpos + qsz*2) != *(e3 + i)) {
 794 +                               printk("%s mode:%s, invalid ecc3, page: %x read:%x %x %x, ecc3:%x \n",
 795 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 796 +                                               *(p+CONFIG_ECC_OFFSET+qsz*2), *(p+ CONFIG_ECC_OFFSET+1+qsz*2), *(p+ CONFIG_ECC_OFFSET+2+qsz*2), ecc3);
 797 +                               correction_flag |= 0x4;
 798 +                       }
 799 +                       if (*(p + eccpos + qsz*3) != *(e4 + i)) {
 800 +                               printk("%s mode:%s, invalid ecc4, page: %x read:%x %x %x, ecc4:%x \n",
 801 +                                               __func__, (mode == FL_READING)?"read":"write", page,
 802 +                                               *(p+CONFIG_ECC_OFFSET+qsz*3), *(p+ CONFIG_ECC_OFFSET+1+qsz*3), *(p+ CONFIG_ECC_OFFSET+2+qsz*3), ecc4);
 803 +                               correction_flag |= 0x8;
 804 +                       }
 805 +               }
 806 +
 807 +               if (correction_flag)
 808 +               {
 809 +                       printk("trying to do correction!\n");
 810 +                       if (correction_flag & 0x1)
 811 +                       {
 812 +                               int bytes, bits;
 813 +                               char *pBuf = p - CFG_PAGESIZE;
 814 +
 815 +                               if (one_bit_correction(p + CONFIG_ECC_OFFSET, e, &bytes, &bits) == 0)
 816 +                               {
 817 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 818 +                                       printk("1. correct byte %d, bit %d!\n", bytes, bits);
 819 +                               }
 820 +                               else
 821 +                               {
 822 +                                       printk("failed to correct!\n");
 823 +                                       return -1;
 824 +                               }
 825 +                       }
 826 +
 827 +                       if (correction_flag & 0x2)
 828 +                       {
 829 +                               int bytes, bits;
 830 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/4;
 831 +
 832 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz), e2, &bytes, &bits) == 0)
 833 +                               {
 834 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 835 +                                       printk("2. correct byte %d, bit %d!\n", bytes, bits);
 836 +                               }
 837 +                               else
 838 +                               {
 839 +                                       printk("failed to correct!\n");
 840 +                                       return -1;
 841 +                               }
 842 +                       }
 843 +                       if (correction_flag & 0x4)
 844 +                       {
 845 +                               int bytes, bits;
 846 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/2;
 847 +
 848 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 2), e3, &bytes, &bits) == 0)
 849 +                               {
 850 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 851 +                                       printk("3. correct byte %d, bit %d!\n", bytes, bits);
 852 +                               }
 853 +                               else
 854 +                               {
 855 +                                       printk("failed to correct!\n");
 856 +                                       return -1;
 857 +                               }
 858 +                       }
 859 +                       if (correction_flag & 0x8)
 860 +                       {
 861 +                               int bytes, bits;
 862 +                               char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE*3/4;
 863 +
 864 +                               if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 3), e4, &bytes, &bits) == 0)
 865 +                               {
 866 +                                       pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
 867 +                                       printk("4. correct byte %d, bit %d!\n", bytes, bits);
 868 +                               }
 869 +                               else
 870 +                               {
 871 +                                       printk("failed to correct!\n");
 872 +                                       return -1;
 873 +                               }
 874 +                       }
 875 +               }
 876 +
 877 +       }
 878 +#endif
 879 +       return 0;
 880 +
 881 +bad_block:
 882 +       return -1;
 883 +}
 884 +
 885 +#else
 886 +
 887 +void ranfc_dump(void)
 888 +{
 889 +       int i;
 890 +       for (i=0; i<11; i++) {
 891 +               if (i==6)
 892 +                       continue;
 893 +               printk("%x: %x \n", NFC_BASE + i*4, ra_inl(NFC_BASE + i*4));
 894 +       }
 895 +}
 896 +
 897 +/**
 898 + * @return 0, ecc OK or corrected.
 899 + * @return NAND_STATUS_FAIL, ecc fail.
 900 + */
 901 +
 902 +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
 903 +{
 904 +       int ret, i;
 905 +       char *p, *e;
 906 +       int ecc;
 907 +
 908 +       if (ranfc_verify == 0)
 909 +               return 0;
 910 +
 911 +       ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
 912 +
 913 +       if (mode == FL_WRITING) { // read back and memcmp
 914 +               ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
 915 +               if (ret != 0) //double comfirm
 916 +                       ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
 917 +
 918 +               if (ret != 0) {
 919 +                       printk("%s: mode:%x read back fail \n", __func__, mode);
 920 +                       return -1;
 921 +               }
 922 +               return memcmp(buf, ra->readback_buffers, 1<<ra->page_shift);
 923 +       }
 924 +
 925 +       if (mode == FL_READING) {
 926 +#if 0
 927 +               if (ra->sandbox_page == 0)
 928 +                       return 0;
 929 +
 930 +               ret = nfc_write_page(ra, buf, ra->sandbox_page, FLAG_USE_GDMA | FLAG_ECC_EN);
 931 +               if (ret != 0) {
 932 +                       printk("%s, fail write sandbox_page \n", __func__);
 933 +                       return -1;
 934 +               }
 935 +#else
 936 +               /** @note:
 937 +                * The following command is actually not 'write' command to drive NFC to write flash.
 938 +                * However, it can make NFC to calculate ECC, that will be used to compare with original ones.
 939 +                * --YT
 940 +                */
 941 +               unsigned int conf = 0x001223| (CFG_ADDR_CYCLE<<16) | (0x200 << 20) | (1<<3) | (1<<2);
 942 +               _nfc_write_raw_data(0xff, 0xff, ra->sandbox_page<<ra->page_shift, conf, buf, 0x200, FLAG_USE_GDMA);
 943 +#endif
 944 +
 945 +               ecc = ra_inl(NFC_ECC);
 946 +               if (ecc == 0) //clean page.
 947 +                       return 0;
 948 +               e = (char*)&ecc;
 949 +               p = buf + (1<<ra->page_shift);
 950 +               for (i=0; i<CONFIG_ECC_BYTES; i++) {
 951 +                       int eccpos = CONFIG_ECC_OFFSET + i;
 952 +                       if (*(p + eccpos) != *(e + i)) {
 953 +                               printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, write:%x \n",
 954 +                                      __func__, (mode == FL_READING)?"read":"write", page,
 955 +                                      *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
 956 +
 957 +                               for (i=0; i<528; i++)
 958 +                                       printk("%-2x \n", *(buf + i));
 959 +                               return -1;
 960 +                       }
 961 +               }
 962 +               return 0;
 963 +       }
 964 +
 965 +       return -1;
 966 +
 967 +}
 968 +
 969 +#endif
 970 +
 971 +
 972 +/**
 973 + * @return -EIO, writing size is less than a page
 974 + * @return 0, OK
 975 + */
 976 +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
 977 +{
 978 +       unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
 979 +       unsigned int bus_addr = 0, bus_addr2 = 0;
 980 +       unsigned int ecc_en;
 981 +       int use_gdma;
 982 +       int size, offs;
 983 +       int status = 0;
 984 +
 985 +       use_gdma = flags & FLAG_USE_GDMA;
 986 +       ecc_en = flags & FLAG_ECC_EN;
 987 +
 988 +       page = page & (CFG_CHIPSIZE - 1); // chip boundary
 989 +       size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
 990 +       offs = 0;
 991 +
 992 +       while (size > 0) {
 993 +               int len;
 994 +#if defined (WORKAROUND_RX_BUF_OV)
 995 +               len = min(60, size);
 996 +#else
 997 +               len = size;
 998 +#endif
 999 +               bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8)-1));
1000 +               if (is_nand_page_2048) {
1001 +                       bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
1002 +                       cmd1 = 0x0;
1003 +                       cmd2 = 0x30;
1004 +                       conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
1005 +               }
1006 +               else {
1007 +                       if (offs & ~(CFG_PAGESIZE-1))
1008 +                               cmd1 = 0x50;
1009 +                       else if (offs & ~((1<<CFG_COLUMN_ADDR_CYCLE*8)-1))
1010 +                               cmd1 = 0x01;
1011 +                       else
1012 +                               cmd1 = 0;
1013 +
1014 +                       conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
1015 +               }
1016 +#if !defined (WORKAROUND_RX_BUF_OV)
1017 +               if (ecc_en)
1018 +                       conf |= (1<<3);
1019 +#endif
1020 +               if (use_gdma)
1021 +                       conf |= (1<<2);
1022 +
1023 +               status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf+offs, len, flags);
1024 +               if (status & NAND_STATUS_FAIL) {
1025 +                       printk("%s: fail \n", __func__);
1026 +                       return -EIO;
1027 +               }
1028 +
1029 +               offs += len;
1030 +               size -= len;
1031 +       }
1032 +
1033 +       // verify and correct ecc
1034 +       if ((flags & (FLAG_VERIFY | FLAG_ECC_EN)) == (FLAG_VERIFY | FLAG_ECC_EN)) {
1035 +               status = nfc_ecc_verify(ra, buf, page, FL_READING);
1036 +               if (status != 0) {
1037 +                       printk("%s: fail, buf:%x, page:%x, flag:%x\n",
1038 +                              __func__, (unsigned int)buf, page, flags);
1039 +                       return -EBADMSG;
1040 +               }
1041 +       }
1042 +       else {
1043 +               // fix,e not yet support
1044 +               ra->buffers_page = -1; //cached
1045 +       }
1046 +
1047 +       return 0;
1048 +}
1049 +
1050 +
1051 +/**
1052 + * @return -EIO, fail to write
1053 + * @return 0, OK
1054 + */
1055 +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
1056 +{
1057 +       unsigned int cmd1 = 0, cmd3, conf = 0;
1058 +       unsigned int bus_addr = 0, bus_addr2 = 0;
1059 +       unsigned int ecc_en;
1060 +       int use_gdma;
1061 +       int size;
1062 +       char status;
1063 +       uint8_t *oob = buf + (1<<ra->page_shift);
1064 +
1065 +       use_gdma = flags & FLAG_USE_GDMA;
1066 +       ecc_en = flags & FLAG_ECC_EN;
1067 +
1068 +       oob[ra->badblockpos] = 0xff;    //tag as good block.
1069 +       ra->buffers_page = -1; //cached
1070 +
1071 +       page = page & (CFG_CHIPSIZE-1); //chip boundary
1072 +       size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
1073 +       bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)); //write_page always write from offset 0.
1074 +
1075 +       if (is_nand_page_2048) {
1076 +       bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
1077 +               cmd1 = 0x80;
1078 +               cmd3 = 0x10;
1079 +               conf = 0x001123| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
1080 +       }
1081 +       else {
1082 +       cmd1 = 0x8000;
1083 +       cmd3 = 0x10;
1084 +       conf = 0x001223| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
1085 +}
1086 +       if (ecc_en)
1087 +               conf |= (1<<3); //enable ecc
1088 +       if (use_gdma)
1089 +               conf |= (1<<2);
1090 +
1091 +       // set NFC
1092 +       ra_dbg("nfc_write_page: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
1093 +              cmd1, cmd3, bus_addr, conf, size);
1094 +
1095 +       status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
1096 +       if (status & NAND_STATUS_FAIL) {
1097 +               printk("%s: fail \n", __func__);
1098 +               return -EIO;
1099 +       }
1100 +
1101 +
1102 +       if (flags & FLAG_VERIFY) { // verify and correct ecc
1103 +               status = nfc_ecc_verify(ra, buf, page, FL_WRITING);
1104 +
1105 +#ifdef RANDOM_GEN_BAD_BLOCK
1106 +               if (((random32() & 0x1ff) == 0x0) && (page >= 0x100)) // randomly create bad block
1107 +               {
1108 +                       printk("hmm... create a bad block at page %x\n", (bus_addr >> 16));
1109 +                       status = -1;
1110 +               }
1111 +#endif
1112 +
1113 +               if (status != 0) {
1114 +                       printk("%s: ecc_verify fail: ret:%x \n", __func__, status);
1115 +                       oob[ra->badblockpos] = 0x33;
1116 +                       page -= page % (CFG_BLOCKSIZE/CFG_PAGESIZE);
1117 +                       printk("create a bad block at page %x\n", page);
1118 +                       if (!is_nand_page_2048)
1119 +                               status = nfc_write_oob(ra, page, ra->badblockpos, oob+ra->badblockpos, 1, flags);
1120 +                       else
1121 +                       {
1122 +                               status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
1123 +                               nfc_write_oob(ra, page, 0, oob, 16, FLAG_NONE);
1124 +                       }
1125 +                       return -EBADMSG;
1126 +               }
1127 +       }
1128 +
1129 +
1130 +       ra->buffers_page = page; //cached
1131 +       return 0;
1132 +}
1133 +
1134 +
1135 +
1136 +/*************************************************************
1137 + * nand internal process
1138 + *************************************************************/
1139 +
1140 +/**
1141 + * nand_release_device - [GENERIC] release chip
1142 + * @mtd:       MTD device structure
1143 + *
1144 + * Deselect, release chip lock and wake up anyone waiting on the device
1145 + */
1146 +static void nand_release_device(struct ra_nand_chip *ra)
1147 +{
1148 +       /* De-select the NAND device */
1149 +       nfc_select_chip(ra, -1);
1150 +
1151 +       /* Release the controller and the chip */
1152 +       ra->state = FL_READY;
1153 +
1154 +       mutex_unlock(ra->controller);
1155 +}
1156 +
1157 +/**
1158 + * nand_get_device - [GENERIC] Get chip for selected access
1159 + * @chip:      the nand chip descriptor
1160 + * @mtd:       MTD device structure
1161 + * @new_state: the state which is requested
1162 + *
1163 + * Get the device and lock it for exclusive access
1164 + */
1165 +static int
1166 +nand_get_device(struct ra_nand_chip *ra, int new_state)
1167 +{
1168 +       int ret = 0;
1169 +
1170 +       ret = mutex_lock_interruptible(ra->controller);
1171 +       if (!ret)
1172 +               ra->state = new_state;
1173 +
1174 +       return ret;
1175 +
1176 +}
1177 +
1178 +
1179 +
1180 +/*************************************************************
1181 + * nand internal process
1182 + *************************************************************/
1183 +
1184 +int nand_bbt_get(struct ra_nand_chip *ra, int block)
1185 +{
1186 +       int byte, bits;
1187 +       bits = block * BBTTAG_BITS;
1188 +
1189 +       byte = bits / 8;
1190 +       bits = bits % 8;
1191 +
1192 +       return (ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK;
1193 +}
1194 +
1195 +int nand_bbt_set(struct ra_nand_chip *ra, int block, int tag)
1196 +{
1197 +       int byte, bits;
1198 +       bits = block * BBTTAG_BITS;
1199 +
1200 +       byte = bits / 8;
1201 +       bits = bits % 8;
1202 +
1203 +       // If previous tag is bad, dont overwrite it
1204 +       if (((ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK) == BBT_TAG_BAD)
1205 +       {
1206 +               return BBT_TAG_BAD;
1207 +       }
1208 +
1209 +       ra->bbt[byte] = (ra->bbt[byte] & ~(BBTTAG_BITS_MASK << bits)) | ((tag & BBTTAG_BITS_MASK) << bits);
1210 +
1211 +       return tag;
1212 +}
1213 +
1214 +/**
1215 + * nand_block_checkbad - [GENERIC] Check if a block is marked bad
1216 + * @mtd:       MTD device structure
1217 + * @ofs:       offset from device start
1218 + *
1219 + * Check, if the block is bad. Either by reading the bad block table or
1220 + * calling of the scan function.
1221 + */
1222 +int nand_block_checkbad(struct ra_nand_chip *ra, loff_t offs)
1223 +{
1224 +       int page, block;
1225 +       int ret = 4;
1226 +       unsigned int tag;
1227 +       char *str[]= {"UNK", "RES", "BAD", "GOOD"};
1228 +
1229 +       if (ranfc_bbt == 0)
1230 +               return 0;
1231 +
1232 +       {
1233 +               // align with chip
1234 +
1235 +               offs = offs & ((1<<ra->chip_shift) -1);
1236 +
1237 +               page = offs >> ra->page_shift;
1238 +               block = offs >> ra->erase_shift;
1239 +       }
1240 +
1241 +       tag = nand_bbt_get(ra, block);
1242 +
1243 +       if (tag == BBT_TAG_UNKNOWN) {
1244 +               ret = nfc_read_oob(ra, page, ra->badblockpos, (char*)&tag, 1, FLAG_NONE);
1245 +               if (ret == 0)
1246 +                       tag = ((le32_to_cpu(tag) & 0x0ff) == 0x0ff) ? BBT_TAG_GOOD : BBT_TAG_BAD;
1247 +               else
1248 +                       tag = BBT_TAG_BAD;
1249 +
1250 +               nand_bbt_set(ra, block, tag);
1251 +       }
1252 +
1253 +       if (tag != BBT_TAG_GOOD) {
1254 +               printk("%s: offs:%x tag: %s \n", __func__, (unsigned int)offs, str[tag]);
1255 +               return 1;
1256 +       }
1257 +       else
1258 +               return 0;
1259 +
1260 +}
1261 +
1262 +
1263 +
1264 +/**
1265 + * nand_block_markbad -
1266 + */
1267 +int nand_block_markbad(struct ra_nand_chip *ra, loff_t offs)
1268 +{
1269 +       int page, block;
1270 +       int ret = 4;
1271 +       unsigned int tag;
1272 +       char *ecc;
1273 +
1274 +       // align with chip
1275 +       ra_dbg("%s offs: %x \n", __func__, (int)offs);
1276 +
1277 +       offs = offs & ((1<<ra->chip_shift) -1);
1278 +
1279 +       page = offs >> ra->page_shift;
1280 +       block = offs >> ra->erase_shift;
1281 +
1282 +       tag = nand_bbt_get(ra, block);
1283 +
1284 +       if (tag == BBT_TAG_BAD) {
1285 +               printk("%s: mark repeatedly \n", __func__);
1286 +               return 0;
1287 +       }
1288 +
1289 +       // new tag as bad
1290 +       tag =BBT_TAG_BAD;
1291 +       ret = nfc_read_page(ra, ra->buffers, page, FLAG_NONE);
1292 +       if (ret != 0) {
1293 +               printk("%s: fail to read bad block tag \n", __func__);
1294 +               goto tag_bbt;
1295 +       }
1296 +
1297 +       ecc = &ra->buffers[(1<<ra->page_shift)+ra->badblockpos];
1298 +       if (*ecc == (char)0x0ff) {
1299 +               //tag into flash
1300 +               *ecc = (char)tag;
1301 +               ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA);
1302 +               if (ret)
1303 +                       printk("%s: fail to write bad block tag \n", __func__);
1304 +
1305 +       }
1306 +
1307 +tag_bbt:
1308 +       //update bbt
1309 +       nand_bbt_set(ra, block, tag);
1310 +
1311 +       return 0;
1312 +}
1313 +
1314 +
1315 +#if defined (WORKAROUND_RX_BUF_OV)
1316 +/**
1317 + * to find a bad block for ecc verify of read_page
1318 + */
1319 +unsigned int nand_bbt_find_sandbox(struct ra_nand_chip *ra)
1320 +{
1321 +       loff_t offs = 0;
1322 +       int chipsize = 1 << ra->chip_shift;
1323 +       int blocksize = 1 << ra->erase_shift;
1324 +
1325 +
1326 +       while (offs < chipsize) {
1327 +               if (nand_block_checkbad(ra, offs)) //scan and verify the unknown tag
1328 +                       break;
1329 +               offs += blocksize;
1330 +       }
1331 +
1332 +       if (offs >= chipsize) {
1333 +               offs = chipsize - blocksize;
1334 +       }
1335 +
1336 +       nand_bbt_set(ra, (unsigned int)offs>>ra->erase_shift, BBT_TAG_RES);      // tag bbt only, instead of update badblockpos of flash.
1337 +       return (offs >> ra->page_shift);
1338 +}
1339 +#endif
1340 +
1341 +
1342 +
1343 +/**
1344 + * nand_erase_nand - [Internal] erase block(s)
1345 + * @mtd:       MTD device structure
1346 + * @instr:     erase instruction
1347 + * @allowbbt:  allow erasing the bbt area
1348 + *
1349 + * Erase one ore more blocks
1350 + */
1351 +int _nand_erase_nand(struct ra_nand_chip *ra, struct erase_info *instr)
1352 +{
1353 +       int page, len, status, ret;
1354 +       unsigned int addr, blocksize = 1<<ra->erase_shift;
1355 +
1356 +       ra_dbg("%s: start:%x, len:%x \n", __func__,
1357 +              (unsigned int)instr->addr, (unsigned int)instr->len);
1358 +
1359 +//#define BLOCK_ALIGNED(a) ((a) & (blocksize - 1)) // already defined
1360 +
1361 +       if (BLOCK_ALIGNED(instr->addr) || BLOCK_ALIGNED(instr->len)) {
1362 +               ra_dbg("%s: erase block not aligned, addr:%x len:%x\n", __func__, instr->addr, instr->len);
1363 +               return -EINVAL;
1364 +       }
1365 +
1366 +       instr->fail_addr = 0xffffffff;
1367 +
1368 +       len = instr->len;
1369 +       addr = instr->addr;
1370 +       instr->state = MTD_ERASING;
1371 +
1372 +       while (len) {
1373 +
1374 +               page = (int)(addr >> ra->page_shift);
1375 +
1376 +               /* select device and check wp */
1377 +               if (nfc_enable_chip(ra, addr, 0)) {
1378 +                       printk("%s: nand is write protected \n", __func__);
1379 +                       instr->state = MTD_ERASE_FAILED;
1380 +                       goto erase_exit;
1381 +               }
1382 +
1383 +               /* if we have a bad block, we do not erase bad blocks */
1384 +               if (nand_block_checkbad(ra, addr)) {
1385 +                       printk(KERN_WARNING "nand_erase: attempt to erase a "
1386 +                              "bad block at 0x%08x\n", addr);
1387 +                       instr->state = MTD_ERASE_FAILED;
1388 +                       goto erase_exit;
1389 +               }
1390 +
1391 +               /*
1392 +                * Invalidate the page cache, if we erase the block which
1393 +                * contains the current cached page
1394 +                */
1395 +               if (BLOCK_ALIGNED(addr) == BLOCK_ALIGNED(ra->buffers_page << ra->page_shift))
1396 +                       ra->buffers_page = -1;
1397 +
1398 +               status = nfc_erase_block(ra, page);
1399 +               /* See if block erase succeeded */
1400 +               if (status) {
1401 +                       printk("%s: failed erase, page 0x%08x\n", __func__, page);
1402 +                       instr->state = MTD_ERASE_FAILED;
1403 +                       instr->fail_addr = (page << ra->page_shift);
1404 +                       goto erase_exit;
1405 +               }
1406 +
1407 +
1408 +               /* Increment page address and decrement length */
1409 +               len -= blocksize;
1410 +               addr += blocksize;
1411 +
1412 +       }
1413 +       instr->state = MTD_ERASE_DONE;
1414 +
1415 +erase_exit:
1416 +
1417 +       ret = ((instr->state == MTD_ERASE_DONE) ? 0 : -EIO);
1418 +       /* Do call back function */
1419 +       if (!ret)
1420 +               mtd_erase_callback(instr);
1421 +
1422 +       if (ret) {
1423 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1424 +       }
1425 +
1426 +       /* Return more or less happy */
1427 +       return ret;
1428 +}
1429 +
1430 +static int
1431 +nand_write_oob_buf(struct ra_nand_chip *ra, uint8_t *buf, uint8_t *oob, size_t size,
1432 +                  int mode, int ooboffs)
1433 +{
1434 +       size_t oobsize = 1<<ra->oob_shift;
1435 +       struct nand_oobfree *free;
1436 +       uint32_t woffs = ooboffs;
1437 +       int retsize = 0;
1438 +
1439 +       ra_dbg("%s: size:%x, mode:%x, offs:%x  \n", __func__, size, mode, ooboffs);
1440 +
1441 +       switch(mode) {
1442 +       case MTD_OPS_PLACE_OOB:
1443 +       case MTD_OPS_RAW:
1444 +               if (ooboffs > oobsize)
1445 +                       return -1;
1446 +
1447 +               size = min(size, oobsize - ooboffs);
1448 +               memcpy(buf + ooboffs, oob, size);
1449 +               retsize = size;
1450 +               break;
1451 +
1452 +       case MTD_OPS_AUTO_OOB:
1453 +               if (ooboffs > ra->oob->oobavail)
1454 +                       return -1;
1455 +
1456 +               while (size) {
1457 +                       for(free = ra->oob->oobfree; free->length && size; free++) {
1458 +                               int wlen = free->length - woffs;
1459 +                               int bytes = 0;
1460 +
1461 +                               /* Write request not from offset 0 ? */
1462 +                               if (wlen <= 0) {
1463 +                                       woffs = -wlen;
1464 +                                       continue;
1465 +                               }
1466 +
1467 +                               bytes = min_t(size_t, size, wlen);
1468 +                               memcpy (buf + free->offset + woffs, oob, bytes);
1469 +                               woffs = 0;
1470 +                               oob += bytes;
1471 +                               size -= bytes;
1472 +                               retsize += bytes;
1473 +                       }
1474 +                       buf += oobsize;
1475 +               }
1476 +               break;
1477 +
1478 +       default:
1479 +               BUG();
1480 +       }
1481 +
1482 +       return retsize;
1483 +}
1484 +
1485 +static int nand_read_oob_buf(struct ra_nand_chip *ra, uint8_t *oob, size_t size,
1486 +                            int mode, int ooboffs)
1487 +{
1488 +       size_t oobsize = 1<<ra->oob_shift;
1489 +       uint8_t *buf = ra->buffers + (1<<ra->page_shift);
1490 +       int retsize=0;
1491 +
1492 +       ra_dbg("%s: size:%x, mode:%x, offs:%x  \n", __func__, size, mode, ooboffs);
1493 +
1494 +       switch(mode) {
1495 +       case MTD_OPS_PLACE_OOB:
1496 +       case MTD_OPS_RAW:
1497 +               if (ooboffs > oobsize)
1498 +                       return -1;
1499 +
1500 +               size = min(size, oobsize - ooboffs);
1501 +               memcpy(oob, buf + ooboffs, size);
1502 +               return size;
1503 +
1504 +       case MTD_OPS_AUTO_OOB: {
1505 +               struct nand_oobfree *free;
1506 +               uint32_t woffs = ooboffs;
1507 +
1508 +               if (ooboffs > ra->oob->oobavail)
1509 +                       return -1;
1510 +
1511 +               size = min(size, ra->oob->oobavail - ooboffs);
1512 +               for(free = ra->oob->oobfree; free->length && size; free++) {
1513 +                       int wlen = free->length - woffs;
1514 +                       int bytes = 0;
1515 +
1516 +                       /* Write request not from offset 0 ? */
1517 +                       if (wlen <= 0) {
1518 +                               woffs = -wlen;
1519 +                               continue;
1520 +                       }
1521 +
1522 +                       bytes = min_t(size_t, size, wlen);
1523 +                       memcpy (oob, buf + free->offset + woffs, bytes);
1524 +                       woffs = 0;
1525 +                       oob += bytes;
1526 +                       size -= bytes;
1527 +                       retsize += bytes;
1528 +               }
1529 +               return retsize;
1530 +       }
1531 +       default:
1532 +               BUG();
1533 +       }
1534 +
1535 +       return -1;
1536 +}
1537 +
1538 +/**
1539 + * nand_do_write_ops - [Internal] NAND write with ECC
1540 + * @mtd:       MTD device structure
1541 + * @to:                offset to write to
1542 + * @ops:       oob operations description structure
1543 + *
1544 + * NAND write with ECC
1545 + */
1546 +static int nand_do_write_ops(struct ra_nand_chip *ra, loff_t to,
1547 +                            struct mtd_oob_ops *ops)
1548 +{
1549 +       int page;
1550 +       uint32_t datalen = ops->len;
1551 +       uint32_t ooblen = ops->ooblen;
1552 +       uint8_t *oob = ops->oobbuf;
1553 +       uint8_t *data = ops->datbuf;
1554 +       int pagesize = (1<<ra->page_shift);
1555 +       int pagemask = (pagesize -1);
1556 +       int oobsize = 1<<ra->oob_shift;
1557 +       loff_t addr = to;
1558 +       //int i = 0; //for ra_dbg only
1559 +
1560 +       ra_dbg("%s: to:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x oobmode:%x \n",
1561 +              __func__, (unsigned int)to, data, oob, datalen, ooblen, ops->ooboffs, ops->mode);
1562 +
1563 +       ops->retlen = 0;
1564 +       ops->oobretlen = 0;
1565 +
1566 +
1567 +       /* Invalidate the page cache, when we write to the cached page */
1568 +       ra->buffers_page = -1;
1569 +
1570 +
1571 +       if (data ==0)
1572 +               datalen = 0;
1573 +
1574 +       // oob sequential (burst) write
1575 +       if (datalen == 0 && ooblen) {
1576 +               int len = ((ooblen + ops->ooboffs) + (ra->oob->oobavail - 1)) / ra->oob->oobavail * oobsize;
1577 +
1578 +               /* select chip, and check if it is write protected */
1579 +               if (nfc_enable_chip(ra, addr, 0))
1580 +                       return -EIO;
1581 +
1582 +               //FIXME, need sanity check of block boundary
1583 +               page = (int)((to & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
1584 +               memset(ra->buffers, 0x0ff, pagesize);
1585 +               //fixme, should we reserve the original content?
1586 +               if (ops->mode == MTD_OPS_AUTO_OOB) {
1587 +                       nfc_read_oob(ra, page, 0, ra->buffers, len, FLAG_NONE);
1588 +               }
1589 +               //prepare buffers
1590 +               if (ooblen != 8)
1591 +               {
1592 +                       nand_write_oob_buf(ra, ra->buffers, oob, ooblen, ops->mode, ops->ooboffs);
1593 +                       // write out buffer to chip
1594 +                       nfc_write_oob(ra, page, 0, ra->buffers, len, FLAG_USE_GDMA);
1595 +               }
1596 +
1597 +               ops->oobretlen = ooblen;
1598 +               ooblen = 0;
1599 +       }
1600 +
1601 +       // data sequential (burst) write
1602 +       if (datalen && ooblen == 0) {
1603 +               // ranfc can not support write_data_burst, since hw-ecc and fifo constraints..
1604 +       }
1605 +
1606 +       // page write
1607 +       while(datalen || ooblen) {
1608 +               int len;
1609 +               int ret;
1610 +               int offs;
1611 +               int ecc_en = 0;
1612 +
1613 +               ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1614 +                      __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1615 +
1616 +               page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
1617 +
1618 +               /* select chip, and check if it is write protected */
1619 +               if (nfc_enable_chip(ra, addr, 0))
1620 +                       return -EIO;
1621 +
1622 +               // oob write
1623 +               if (ops->mode == MTD_OPS_AUTO_OOB) {
1624 +                       //fixme, this path is not yet varified
1625 +                       nfc_read_oob(ra, page, 0, ra->buffers + pagesize, oobsize, FLAG_NONE);
1626 +               }
1627 +               if (oob && ooblen > 0) {
1628 +                       len = nand_write_oob_buf(ra, ra->buffers + pagesize, oob, ooblen, ops->mode, ops->ooboffs);
1629 +                       if (len < 0)
1630 +                               return -EINVAL;
1631 +
1632 +                       oob += len;
1633 +                       ops->oobretlen += len;
1634 +                       ooblen -= len;
1635 +               }
1636 +
1637 +               // data write
1638 +               offs = addr & pagemask;
1639 +               len = min_t(size_t, datalen, pagesize - offs);
1640 +               if (data && len > 0) {
1641 +                       memcpy(ra->buffers + offs, data, len);  // we can not sure ops->buf wether is DMA-able.
1642 +
1643 +                       data += len;
1644 +                       datalen -= len;
1645 +                       ops->retlen += len;
1646 +
1647 +                       ecc_en = FLAG_ECC_EN;
1648 +               }
1649 +               ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA | FLAG_VERIFY |
1650 +                                    ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0 : ecc_en ));
1651 +               if (ret) {
1652 +                       nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1653 +                       return ret;
1654 +               }
1655 +
1656 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
1657 +
1658 +               addr = (page+1) << ra->page_shift;
1659 +
1660 +       }
1661 +       return 0;
1662 +}
1663 +
1664 +/**
1665 + * nand_do_read_ops - [Internal] Read data with ECC
1666 + *
1667 + * @mtd:       MTD device structure
1668 + * @from:      offset to read from
1669 + * @ops:       oob ops structure
1670 + *
1671 + * Internal function. Called with chip held.
1672 + */
1673 +static int nand_do_read_ops(struct ra_nand_chip *ra, loff_t from,
1674 +                           struct mtd_oob_ops *ops)
1675 +{
1676 +       int page;
1677 +       uint32_t datalen = ops->len;
1678 +       uint32_t ooblen = ops->ooblen;
1679 +       uint8_t *oob = ops->oobbuf;
1680 +       uint8_t *data = ops->datbuf;
1681 +       int pagesize = (1<<ra->page_shift);
1682 +       int pagemask = (pagesize -1);
1683 +       loff_t addr = from;
1684 +       //int i = 0; //for ra_dbg only
1685 +
1686 +       ra_dbg("%s: addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1687 +              __func__, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1688 +
1689 +       ops->retlen = 0;
1690 +       ops->oobretlen = 0;
1691 +       if (data == 0)
1692 +               datalen = 0;
1693 +
1694 +
1695 +       while(datalen || ooblen) {
1696 +               int len;
1697 +               int ret;
1698 +               int offs;
1699 +
1700 +               ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
1701 +                      __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
1702 +               /* select chip */
1703 +               if (nfc_enable_chip(ra, addr, 1) < 0)
1704 +                       return -EIO;
1705 +
1706 +               page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift);
1707 +
1708 +               ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
1709 +                                   ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
1710 +               //FIXME, something strange here, some page needs 2 more tries to guarantee read success.
1711 +               if (ret) {
1712 +                       printk("read again:\n");
1713 +                       ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
1714 +                                           ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
1715 +
1716 +                       if (ret) {
1717 +                               printk("read again fail \n");
1718 +                               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
1719 +                               if ((ret != -EUCLEAN) && (ret != -EBADMSG)) {
1720 +                                       return ret;
1721 +                               }
1722 +                               else {
1723 +                                       /* ecc verification fail, but data need to be returned. */
1724 +                               }
1725 +                       }
1726 +                       else {
1727 +                               printk(" read agian susccess \n");
1728 +                       }
1729 +               }
1730 +
1731 +               // oob read
1732 +               if (oob && ooblen > 0) {
1733 +                       len = nand_read_oob_buf(ra, oob, ooblen, ops->mode, ops->ooboffs);
1734 +                       if (len < 0) {
1735 +                               printk("nand_read_oob_buf: fail return %x \n", len);
1736 +                               return -EINVAL;
1737 +                       }
1738 +
1739 +                       oob += len;
1740 +                       ops->oobretlen += len;
1741 +                       ooblen -= len;
1742 +               }
1743 +
1744 +               // data read
1745 +               offs = addr & pagemask;
1746 +               len = min_t(size_t, datalen, pagesize - offs);
1747 +               if (data && len > 0) {
1748 +                       memcpy(data, ra->buffers + offs, len);  // we can not sure ops->buf wether is DMA-able.
1749 +
1750 +                       data += len;
1751 +                       datalen -= len;
1752 +                       ops->retlen += len;
1753 +                       if (ret)
1754 +                               return ret;
1755 +               }
1756 +
1757 +
1758 +               nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
1759 +               // address go further to next page, instead of increasing of length of write. This avoids some special cases wrong.
1760 +               addr = (page+1) << ra->page_shift;
1761 +       }
1762 +       return 0;
1763 +}
1764 +
1765 +static int
1766 +ramtd_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
1767 +{
1768 +       struct ra_nand_chip *ra = (struct ra_nand_chip *)mtd->priv;
1769 +       int ret;
1770 +
1771 +       ra_dbg("%s: start:%x, len:%x \n", __func__,
1772 +               (unsigned int)instr->addr, (unsigned int)instr->len);
1773 +
1774 +       nand_get_device(ra, FL_ERASING);
1775 +       ret = _nand_erase_nand((struct ra_nand_chip *)mtd->priv, instr);
1776 +       nand_release_device(ra);
1777 +
1778 +       return ret;
1779 +}
1780 +
1781 +static int
1782 +ramtd_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
1783 +               size_t *retlen, const uint8_t *buf)
1784 +{
1785 +       struct ra_nand_chip *ra = mtd->priv;
1786 +       struct mtd_oob_ops ops;
1787 +       int ret;
1788 +
1789 +       ra_dbg("%s: to 0x%x len=0x%x\n", __func__, to, len);
1790 +
1791 +       if ((to + len) > mtd->size)
1792 +               return -EINVAL;
1793 +
1794 +       if (!len)
1795 +               return 0;
1796 +
1797 +       nand_get_device(ra, FL_WRITING);
1798 +
1799 +       memset(&ops, 0, sizeof(ops));
1800 +       ops.len = len;
1801 +       ops.datbuf = (uint8_t *)buf;
1802 +       ops.oobbuf = NULL;
1803 +       ops.mode =  MTD_OPS_AUTO_OOB;
1804 +
1805 +       ret = nand_do_write_ops(ra, to, &ops);
1806 +
1807 +       *retlen = ops.retlen;
1808 +
1809 +       nand_release_device(ra);
1810 +
1811 +       return ret;
1812 +}
1813 +
1814 +static int
1815 +ramtd_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1816 +               size_t *retlen, uint8_t *buf)
1817 +{
1818 +
1819 +       struct ra_nand_chip *ra = mtd->priv;
1820 +       int ret;
1821 +       struct mtd_oob_ops ops;
1822 +
1823 +       ra_dbg("%s: mtd:%p from:%x, len:%x, buf:%p \n", __func__, mtd, (unsigned int)from, len, buf);
1824 +
1825 +       /* Do not allow reads past end of device */
1826 +       if ((from + len) > mtd->size)
1827 +               return -EINVAL;
1828 +       if (!len)
1829 +               return 0;
1830 +
1831 +       nand_get_device(ra, FL_READING);
1832 +
1833 +       memset(&ops, 0, sizeof(ops));
1834 +       ops.len = len;
1835 +       ops.datbuf = buf;
1836 +       ops.oobbuf = NULL;
1837 +       ops.mode = MTD_OPS_AUTO_OOB;
1838 +
1839 +       ret = nand_do_read_ops(ra, from, &ops);
1840 +
1841 +       *retlen = ops.retlen;
1842 +
1843 +       nand_release_device(ra);
1844 +
1845 +       return ret;
1846 +
1847 +}
1848 +
1849 +static int
1850 +ramtd_nand_readoob(struct mtd_info *mtd, loff_t from,
1851 +                       struct mtd_oob_ops *ops)
1852 +{
1853 +       struct ra_nand_chip *ra = mtd->priv;
1854 +       int ret;
1855 +
1856 +       ra_dbg("%s: \n", __func__);
1857 +
1858 +       nand_get_device(ra, FL_READING);
1859 +
1860 +       ret = nand_do_read_ops(ra, from, ops);
1861 +
1862 +       nand_release_device(ra);
1863 +
1864 +       return ret;
1865 +}
1866 +
1867 +static int
1868 +ramtd_nand_writeoob(struct mtd_info *mtd, loff_t to,
1869 +                       struct mtd_oob_ops *ops)
1870 +{
1871 +       struct ra_nand_chip *ra = mtd->priv;
1872 +       int ret;
1873 +
1874 +       nand_get_device(ra, FL_READING);
1875 +       ret = nand_do_write_ops(ra, to, ops);
1876 +       nand_release_device(ra);
1877 +
1878 +       return ret;
1879 +}
1880 +
1881 +static int
1882 +ramtd_nand_block_isbad(struct mtd_info *mtd, loff_t offs)
1883 +{
1884 +       if (offs > mtd->size)
1885 +               return -EINVAL;
1886 +
1887 +       return nand_block_checkbad((struct ra_nand_chip *)mtd->priv, offs);
1888 +}
1889 +
1890 +static int
1891 +ramtd_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1892 +{
1893 +       struct ra_nand_chip *ra = mtd->priv;
1894 +       int ret;
1895 +
1896 +       ra_dbg("%s: \n", __func__);
1897 +       nand_get_device(ra, FL_WRITING);
1898 +       ret = nand_block_markbad(ra, ofs);
1899 +       nand_release_device(ra);
1900 +
1901 +       return ret;
1902 +}
1903 +
1904 +// 1-bit error detection
1905 +static int one_bit_correction(char *ecc1, char *ecc2, int *bytes, int *bits)
1906 +{
1907 +       // check if ecc and expected are all valid
1908 +       char *p, nibble, crumb;
1909 +       int i, xor, iecc1 = 0, iecc2 = 0;
1910 +
1911 +       printk("correction : %x %x %x\n", ecc1[0], ecc1[1], ecc1[2]);
1912 +       printk("correction : %x %x %x\n", ecc2[0], ecc2[1], ecc2[2]);
1913 +
1914 +       p = (char *)ecc1;
1915 +       for (i = 0; i < CONFIG_ECC_BYTES; i++)
1916 +       {
1917 +               nibble = *(p+i) & 0xf;
1918 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1919 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1920 +                       return -1;
1921 +               nibble = ((*(p+i)) >> 4) & 0xf;
1922 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1923 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1924 +                       return -1;
1925 +       }
1926 +
1927 +       p = (char *)ecc2;
1928 +       for (i = 0; i < CONFIG_ECC_BYTES; i++)
1929 +       {
1930 +               nibble = *(p+i) & 0xf;
1931 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1932 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1933 +                       return -1;
1934 +               nibble = ((*(p+i)) >> 4) & 0xf;
1935 +               if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
1936 +                       (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
1937 +                       return -1;
1938 +       }
1939 +
1940 +       memcpy(&iecc1, ecc1, 3);
1941 +       memcpy(&iecc2, ecc2, 3);
1942 +
1943 +       xor = iecc1 ^ iecc2;
1944 +       printk("xor = %x (%x %x)\n", xor, iecc1, iecc2);
1945 +
1946 +       *bytes = 0;
1947 +       for (i = 0; i < 9; i++)
1948 +       {
1949 +               crumb = (xor >> (2*i)) & 0x3;
1950 +               if ((crumb == 0x0) || (crumb == 0x3))
1951 +                       return -1;
1952 +               if (crumb == 0x2)
1953 +                       *bytes += (1 << i);
1954 +       }
1955 +
1956 +       *bits = 0;
1957 +       for (i = 0; i < 3; i++)
1958 +       {
1959 +               crumb = (xor >> (18 + 2*i)) & 0x3;
1960 +               if ((crumb == 0x0) || (crumb == 0x3))
1961 +                       return -1;
1962 +               if (crumb == 0x2)
1963 +                       *bits += (1 << i);
1964 +       }
1965 +
1966 +       return 0;
1967 +}
1968 +
1969 +
1970 +
1971 +/************************************************************
1972 + * the init/exit section.
1973 + */
1974 +
1975 +static struct nand_ecclayout ra_oob_layout = {
1976 +       .eccbytes = CONFIG_ECC_BYTES,
1977 +       .eccpos = {5, 6, 7},
1978 +       .oobfree = {
1979 +                {.offset = 0, .length = 4},
1980 +                {.offset = 8, .length = 8},
1981 +                {.offset = 0, .length = 0}
1982 +        },
1983 +#define RA_CHIP_OOB_AVAIL (4+8)
1984 +       .oobavail = RA_CHIP_OOB_AVAIL,
1985 +       // 5th byte is bad-block flag.
1986 +};
1987 +
1988 +static int
1989 +mtk_nand_probe(struct platform_device *pdev)
1990 +{
1991 +        struct mtd_part_parser_data ppdata;
1992 +       struct ra_nand_chip *ra;
1993 +       int alloc_size, bbt_size, buffers_size, reg, err;
1994 +       unsigned char chip_mode = 12;
1995 +
1996 +/*     if(ra_check_flash_type()!=BOOT_FROM_NAND) {
1997 +               return 0;
1998 +       }*/
1999 +
2000 +       //FIXME: config 512 or 2048-byte page according to HWCONF
2001 +#if defined (CONFIG_RALINK_RT6855A)
2002 +       reg = ra_inl(RALINK_SYSCTL_BASE+0x8c);
2003 +       chip_mode = ((reg>>28) & 0x3)|(((reg>>22) & 0x3)<<2);
2004 +       if (chip_mode == 1) {
2005 +               printk("! nand 2048\n");
2006 +               ra_or(NFC_CONF1, 1);
2007 +               is_nand_page_2048 = 1;
2008 +               nand_addrlen = 5;
2009 +       }
2010 +       else {
2011 +               printk("! nand 512\n");
2012 +               ra_and(NFC_CONF1, ~1);
2013 +               is_nand_page_2048 = 0;
2014 +               nand_addrlen = 4;
2015 +       }
2016 +#elif (defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855))
2017 +       ra_outl(RALINK_SYSCTL_BASE+0x60, ra_inl(RALINK_SYSCTL_BASE+0x60) & ~(0x3<<18));
2018 +       reg = ra_inl(RALINK_SYSCTL_BASE+0x10);
2019 +       chip_mode = (reg & 0x0F);
2020 +       if((chip_mode==1)||(chip_mode==11)) {
2021 +               ra_or(NFC_CONF1, 1);
2022 +               is_nand_page_2048 = 1;
2023 +               nand_addrlen = ((chip_mode!=11) ? 4 : 5);
2024 +               printk("!!! nand page size = 2048, addr len=%d\n", nand_addrlen);
2025 +       }
2026 +       else {
2027 +               ra_and(NFC_CONF1, ~1);
2028 +               is_nand_page_2048 = 0;
2029 +               nand_addrlen = ((chip_mode!=10) ? 3 : 4);
2030 +               printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
2031 +       }
2032 +#else
2033 +       is_nand_page_2048 = 0;
2034 +       nand_addrlen = 3;
2035 +       printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
2036 +#endif
2037 +
2038 +#if defined (CONFIG_RALINK_RT6855A) || defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855)
2039 +       //config ECC location
2040 +    ra_and(NFC_CONF1, 0xfff000ff);
2041 +       ra_or(NFC_CONF1, ((CONFIG_ECC_OFFSET + 2) << 16) +
2042 +                                               ((CONFIG_ECC_OFFSET + 1) << 12) +
2043 +                                               (CONFIG_ECC_OFFSET << 8));
2044 +#endif
2045 +
2046 +#define ALIGNE_16(a) (((unsigned long)(a)+15) & ~15)
2047 +       buffers_size = ALIGNE_16((1<<CONFIG_PAGE_SIZE_BIT) + (1<<CONFIG_OOBSIZE_PER_PAGE_BIT)); //ra->buffers
2048 +       bbt_size = BBTTAG_BITS * (1<<(CONFIG_CHIP_SIZE_BIT - (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))) / 8; //ra->bbt
2049 +       bbt_size = ALIGNE_16(bbt_size);
2050 +
2051 +       alloc_size = buffers_size + bbt_size;
2052 +       alloc_size += buffers_size; //for ra->readback_buffers
2053 +       alloc_size += sizeof(*ra);
2054 +       alloc_size += sizeof(*ranfc_mtd);
2055 +
2056 +       //make sure gpio-0 is input
2057 +       ra_outl(RALINK_PIO_BASE+0x24, ra_inl(RALINK_PIO_BASE+0x24) & ~0x01);
2058 +
2059 +       ra = (struct ra_nand_chip *)kzalloc(alloc_size, GFP_KERNEL | GFP_DMA);
2060 +       if (!ra) {
2061 +               printk("%s: mem alloc fail \n", __func__);
2062 +               return -ENOMEM;
2063 +       }
2064 +       memset(ra, 0, alloc_size);
2065 +
2066 +       //dynamic
2067 +       ra->buffers = (char *)((char *)ra + sizeof(*ra));
2068 +       ra->readback_buffers = ra->buffers + buffers_size;
2069 +       ra->bbt = ra->readback_buffers + buffers_size;
2070 +       ranfc_mtd = (struct mtd_info *)(ra->bbt + bbt_size);
2071 +
2072 +       //static
2073 +       ra->numchips            = CONFIG_NUMCHIPS;
2074 +       ra->chip_shift          = CONFIG_CHIP_SIZE_BIT;
2075 +       ra->page_shift          = CONFIG_PAGE_SIZE_BIT;
2076 +       ra->oob_shift           = CONFIG_OOBSIZE_PER_PAGE_BIT;
2077 +       ra->erase_shift         = (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT);
2078 +       ra->badblockpos         = CONFIG_BAD_BLOCK_POS;
2079 +       ra_oob_layout.eccpos[0] = CONFIG_ECC_OFFSET;
2080 +       ra_oob_layout.eccpos[1] = CONFIG_ECC_OFFSET + 1;
2081 +       ra_oob_layout.eccpos[2] = CONFIG_ECC_OFFSET + 2;
2082 +       ra->oob                 = &ra_oob_layout;
2083 +       ra->buffers_page        = -1;
2084 +
2085 +#if defined (WORKAROUND_RX_BUF_OV)
2086 +       if (ranfc_verify) {
2087 +               ra->sandbox_page = nand_bbt_find_sandbox(ra);
2088 +       }
2089 +#endif
2090 +       ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x01); //set wp to high
2091 +       nfc_all_reset();
2092 +
2093 +       ranfc_mtd->type         = MTD_NANDFLASH;
2094 +       ranfc_mtd->flags        = MTD_CAP_NANDFLASH;
2095 +       ranfc_mtd->size         = CONFIG_NUMCHIPS * CFG_CHIPSIZE;
2096 +       ranfc_mtd->erasesize    = CFG_BLOCKSIZE;
2097 +       ranfc_mtd->writesize    = CFG_PAGESIZE;
2098 +       ranfc_mtd->oobsize      = CFG_PAGE_OOBSIZE;
2099 +       ranfc_mtd->oobavail     = RA_CHIP_OOB_AVAIL;
2100 +       ranfc_mtd->name         = "ra_nfc";
2101 +       //ranfc_mtd->index
2102 +       ranfc_mtd->ecclayout    = &ra_oob_layout;
2103 +       //ranfc_mtd->numberaseregions
2104 +       //ranfc_mtd->eraseregions
2105 +       //ranfc_mtd->bansize
2106 +       ranfc_mtd->_erase       = ramtd_nand_erase;
2107 +       //ranfc_mtd->point
2108 +       //ranfc_mtd->unpoint
2109 +       ranfc_mtd->_read                = ramtd_nand_read;
2110 +       ranfc_mtd->_write       = ramtd_nand_write;
2111 +       ranfc_mtd->_read_oob    = ramtd_nand_readoob;
2112 +       ranfc_mtd->_write_oob   = ramtd_nand_writeoob;
2113 +       //ranfc_mtd->get_fact_prot_info; ranfc_mtd->read_fact_prot_reg;
2114 +       //ranfc_mtd->get_user_prot_info; ranfc_mtd->read_user_prot_reg;
2115 +       //ranfc_mtd->write_user_prot_reg; ranfc_mtd->lock_user_prot_reg;
2116 +       //ranfc_mtd->writev; ranfc_mtd->sync; ranfc_mtd->lock; ranfc_mtd->unlock; ranfc_mtd->suspend; ranfc_mtd->resume;
2117 +       ranfc_mtd->_block_isbad         = ramtd_nand_block_isbad;
2118 +       ranfc_mtd->_block_markbad       = ramtd_nand_block_markbad;
2119 +       //ranfc_mtd->reboot_notifier
2120 +       //ranfc_mtd->ecc_stats;
2121 +       // subpage_sht;
2122 +
2123 +       //ranfc_mtd->get_device; ranfc_mtd->put_device
2124 +       ranfc_mtd->priv = ra;
2125 +
2126 +       ranfc_mtd->owner = THIS_MODULE;
2127 +       ra->controller = &ra->hwcontrol;
2128 +       mutex_init(ra->controller);
2129 +
2130 +       printk("%s: alloc %x, at %p , btt(%p, %x), ranfc_mtd:%p\n",
2131 +              __func__ , alloc_size, ra, ra->bbt, bbt_size, ranfc_mtd);
2132 +
2133 +       ppdata.of_node = pdev->dev.of_node;
2134 +       err = mtd_device_parse_register(ranfc_mtd, mtk_probe_types,
2135 +                       &ppdata, NULL, 0);
2136 +
2137 +       return err;
2138 +}
2139 +
2140 +static int
2141 +mtk_nand_remove(struct platform_device *pdev)
2142 +{
2143 +       struct ra_nand_chip *ra;
2144 +
2145 +       if (ranfc_mtd) {
2146 +               ra = (struct ra_nand_chip  *)ranfc_mtd->priv;
2147 +
2148 +               /* Deregister partitions */
2149 +               //del_mtd_partitions(ranfc_mtd);
2150 +               kfree(ra);
2151 +       }
2152 +       return 0;
2153 +}
2154 +
2155 +static const struct of_device_id mtk_nand_match[] = {
2156 +       { .compatible = "mtk,mt7620-nand" },
2157 +       {},
2158 +};
2159 +MODULE_DEVICE_TABLE(of, mtk_nand_match);
2160 +
2161 +static struct platform_driver mtk_nand_driver = {
2162 +       .probe = mtk_nand_probe,
2163 +       .remove = mtk_nand_remove,
2164 +       .driver = {
2165 +               .name = "mt7620_nand",
2166 +               .owner = THIS_MODULE,
2167 +               .of_match_table = mtk_nand_match,
2168 +       },
2169 +};
2170 +
2171 +module_platform_driver(mtk_nand_driver);
2172 +
2173 +
2174 +MODULE_LICENSE("GPL");
2175 --- /dev/null
2176 +++ b/drivers/mtd/maps/ralink_nand.h
2177 @@ -0,0 +1,232 @@
2178 +#ifndef RT2880_NAND_H
2179 +#define RT2880_NAND_H
2180 +
2181 +#include <linux/mtd/mtd.h>
2182 +
2183 +//#include "gdma.h"
2184 +
2185 +#define RALINK_SYSCTL_BASE             0xB0000000
2186 +#define RALINK_PIO_BASE                        0xB0000600
2187 +#define RALINK_NAND_CTRL_BASE          0xB0000810
2188 +#define CONFIG_RALINK_MT7620
2189 +
2190 +#define SKIP_BAD_BLOCK
2191 +//#define RANDOM_GEN_BAD_BLOCK
2192 +
2193 +#define ra_inl(addr)  (*(volatile unsigned int *)(addr))
2194 +#define ra_outl(addr, value)  (*(volatile unsigned int *)(addr) = (value))
2195 +#define ra_aor(addr, a_mask, o_value)  ra_outl(addr, (ra_inl(addr) & (a_mask)) | (o_value))
2196 +#define ra_and(addr, a_mask)  ra_aor(addr, a_mask, 0)
2197 +#define ra_or(addr, o_value)  ra_aor(addr, -1, o_value)
2198 +
2199 +
2200 +#define CONFIG_NUMCHIPS 1
2201 +#define CONFIG_NOT_SUPPORT_WP //rt3052 has no WP signal for chip.
2202 +//#define CONFIG_NOT_SUPPORT_RB
2203 +
2204 +extern int is_nand_page_2048;
2205 +extern const unsigned int nand_size_map[2][3];
2206 +
2207 +//chip
2208 +// chip geometry: SAMSUNG small size 32MB.
2209 +#define CONFIG_CHIP_SIZE_BIT (nand_size_map[is_nand_page_2048][nand_addrlen-3]) //! (1<<NAND_SIZE_BYTE) MB
2210 +//#define CONFIG_CHIP_SIZE_BIT (is_nand_page_2048? 29 : 25)    //! (1<<NAND_SIZE_BYTE) MB
2211 +#define CONFIG_PAGE_SIZE_BIT (is_nand_page_2048? 11 : 9)       //! (1<<PAGE_SIZE) MB
2212 +//#define CONFIG_SUBPAGE_BIT 1         //! these bits will be compensate by command cycle
2213 +#define CONFIG_NUMPAGE_PER_BLOCK_BIT (is_nand_page_2048? 6 : 5)        //! order of number of pages a block.
2214 +#define CONFIG_OOBSIZE_PER_PAGE_BIT (is_nand_page_2048? 6 : 4) //! byte number of oob a page.
2215 +#define CONFIG_BAD_BLOCK_POS (is_nand_page_2048? 0 : 4)     //! offset of byte to denote bad block.
2216 +#define CONFIG_ECC_BYTES 3      //! ecc has 3 bytes
2217 +#define CONFIG_ECC_OFFSET (is_nand_page_2048? 6 : 5)        //! ecc starts from offset 5.
2218 +
2219 +//this section should not be modified.
2220 +//#define CFG_COLUMN_ADDR_MASK ((1 << (CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT)) - 1)
2221 +//#define CFG_COLUMN_ADDR_CYCLE (((CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT) + 7)/8)
2222 +//#define CFG_ROW_ADDR_CYCLE ((CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT + 7)/8)
2223 +//#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
2224 +
2225 +#define CFG_COLUMN_ADDR_CYCLE   (is_nand_page_2048? 2 : 1)
2226 +#define CFG_ROW_ADDR_CYCLE      (nand_addrlen - CFG_COLUMN_ADDR_CYCLE)
2227 +#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
2228 +
2229 +#define CFG_CHIPSIZE    (1 << ((CONFIG_CHIP_SIZE_BIT>=32)? 31 : CONFIG_CHIP_SIZE_BIT))
2230 +//#define CFG_CHIPSIZE         (1 << CONFIG_CHIP_SIZE_BIT)
2231 +#define CFG_PAGESIZE   (1 << CONFIG_PAGE_SIZE_BIT)
2232 +#define CFG_BLOCKSIZE  (CFG_PAGESIZE << CONFIG_NUMPAGE_PER_BLOCK_BIT)
2233 +#define CFG_NUMPAGE    (1 << (CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT))
2234 +#define CFG_NUMBLOCK   (CFG_NUMPAGE >> CONFIG_NUMPAGE_PER_BLOCK_BIT)
2235 +#define CFG_BLOCK_OOBSIZE      (1 << (CONFIG_OOBSIZE_PER_PAGE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))
2236 +#define CFG_PAGE_OOBSIZE       (1 << CONFIG_OOBSIZE_PER_PAGE_BIT)
2237 +
2238 +#define NAND_BLOCK_ALIGN(addr) ((addr) & (CFG_BLOCKSIZE-1))
2239 +#define NAND_PAGE_ALIGN(addr) ((addr) & (CFG_PAGESIZE-1))
2240 +
2241 +
2242 +#define NFC_BASE       RALINK_NAND_CTRL_BASE
2243 +#define NFC_CTRL       (NFC_BASE + 0x0)
2244 +#define NFC_CONF       (NFC_BASE + 0x4)
2245 +#define NFC_CMD1       (NFC_BASE + 0x8)
2246 +#define NFC_CMD2       (NFC_BASE + 0xc)
2247 +#define NFC_CMD3       (NFC_BASE + 0x10)
2248 +#define NFC_ADDR       (NFC_BASE + 0x14)
2249 +#define NFC_DATA       (NFC_BASE + 0x18)
2250 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
2251 +       defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
2252 +#define NFC_ECC                (NFC_BASE + 0x30)
2253 +#else
2254 +#define NFC_ECC                (NFC_BASE + 0x1c)
2255 +#endif
2256 +#define NFC_STATUS     (NFC_BASE + 0x20)
2257 +#define NFC_INT_EN     (NFC_BASE + 0x24)
2258 +#define NFC_INT_ST     (NFC_BASE + 0x28)
2259 +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
2260 +       defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
2261 +#define NFC_CONF1      (NFC_BASE + 0x2c)
2262 +#define NFC_ECC_P1     (NFC_BASE + 0x30)
2263 +#define NFC_ECC_P2     (NFC_BASE + 0x34)
2264 +#define NFC_ECC_P3     (NFC_BASE + 0x38)
2265 +#define NFC_ECC_P4     (NFC_BASE + 0x3c)
2266 +#define NFC_ECC_ERR1   (NFC_BASE + 0x40)
2267 +#define NFC_ECC_ERR2   (NFC_BASE + 0x44)
2268 +#define NFC_ECC_ERR3   (NFC_BASE + 0x48)
2269 +#define NFC_ECC_ERR4   (NFC_BASE + 0x4c)
2270 +#define NFC_ADDR2      (NFC_BASE + 0x50)
2271 +#endif
2272 +
2273 +enum _int_stat {
2274 +       INT_ST_ND_DONE  = 1<<0,
2275 +       INT_ST_TX_BUF_RDY       = 1<<1,
2276 +       INT_ST_RX_BUF_RDY       = 1<<2,
2277 +       INT_ST_ECC_ERR          = 1<<3,
2278 +       INT_ST_TX_TRAS_ERR      = 1<<4,
2279 +       INT_ST_RX_TRAS_ERR      = 1<<5,
2280 +       INT_ST_TX_KICK_ERR      = 1<<6,
2281 +       INT_ST_RX_KICK_ERR      = 1<<7
2282 +};
2283 +
2284 +
2285 +//#define WORKAROUND_RX_BUF_OV 1
2286 +
2287 +
2288 +/*************************************************************
2289 + * stolen from nand.h
2290 + *************************************************************/
2291 +
2292 +/*
2293 + * Standard NAND flash commands
2294 + */
2295 +#define NAND_CMD_READ0         0
2296 +#define NAND_CMD_READ1         1
2297 +#define NAND_CMD_RNDOUT                5
2298 +#define NAND_CMD_PAGEPROG      0x10
2299 +#define NAND_CMD_READOOB       0x50
2300 +#define NAND_CMD_ERASE1                0x60
2301 +#define NAND_CMD_STATUS                0x70
2302 +#define NAND_CMD_STATUS_MULTI  0x71
2303 +#define NAND_CMD_SEQIN         0x80
2304 +#define NAND_CMD_RNDIN         0x85
2305 +#define NAND_CMD_READID                0x90
2306 +#define NAND_CMD_ERASE2                0xd0
2307 +#define NAND_CMD_RESET         0xff
2308 +
2309 +/* Extended commands for large page devices */
2310 +#define NAND_CMD_READSTART     0x30
2311 +#define NAND_CMD_RNDOUTSTART   0xE0
2312 +#define NAND_CMD_CACHEDPROG    0x15
2313 +
2314 +/* Extended commands for AG-AND device */
2315 +/*
2316 + * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
2317 + *       there is no way to distinguish that from NAND_CMD_READ0
2318 + *       until the remaining sequence of commands has been completed
2319 + *       so add a high order bit and mask it off in the command.
2320 + */
2321 +#define NAND_CMD_DEPLETE1      0x100
2322 +#define NAND_CMD_DEPLETE2      0x38
2323 +#define NAND_CMD_STATUS_MULTI  0x71
2324 +#define NAND_CMD_STATUS_ERROR  0x72
2325 +/* multi-bank error status (banks 0-3) */
2326 +#define NAND_CMD_STATUS_ERROR0 0x73
2327 +#define NAND_CMD_STATUS_ERROR1 0x74
2328 +#define NAND_CMD_STATUS_ERROR2 0x75
2329 +#define NAND_CMD_STATUS_ERROR3 0x76
2330 +#define NAND_CMD_STATUS_RESET  0x7f
2331 +#define NAND_CMD_STATUS_CLEAR  0xff
2332 +
2333 +#define NAND_CMD_NONE          -1
2334 +
2335 +/* Status bits */
2336 +#define NAND_STATUS_FAIL       0x01
2337 +#define NAND_STATUS_FAIL_N1    0x02
2338 +#define NAND_STATUS_TRUE_READY 0x20
2339 +#define NAND_STATUS_READY      0x40
2340 +#define NAND_STATUS_WP         0x80
2341 +
2342 +typedef enum {
2343 +       FL_READY,
2344 +       FL_READING,
2345 +       FL_WRITING,
2346 +       FL_ERASING,
2347 +       FL_SYNCING,
2348 +       FL_CACHEDPRG,
2349 +       FL_PM_SUSPENDED,
2350 +} nand_state_t;
2351 +
2352 +/*************************************************************/
2353 +
2354 +
2355 +
2356 +typedef enum _ra_flags {
2357 +       FLAG_NONE       = 0,
2358 +       FLAG_ECC_EN     = (1<<0),
2359 +       FLAG_USE_GDMA   = (1<<1),
2360 +       FLAG_VERIFY     = (1<<2),
2361 +} RA_FLAGS;
2362 +
2363 +
2364 +#define BBTTAG_BITS            2
2365 +#define BBTTAG_BITS_MASK       ((1<<BBTTAG_BITS) -1)
2366 +enum BBT_TAG {
2367 +       BBT_TAG_UNKNOWN = 0, //2'b01
2368 +       BBT_TAG_GOOD    = 3, //2'b11
2369 +       BBT_TAG_BAD     = 2, //2'b10
2370 +       BBT_TAG_RES     = 1, //2'b01
2371 +};
2372 +
2373 +struct ra_nand_chip {
2374 +       int     numchips;
2375 +       int     chip_shift;
2376 +       int     page_shift;
2377 +       int     erase_shift;
2378 +       int     oob_shift;
2379 +       int     badblockpos;
2380 +#if !defined (__UBOOT__)
2381 +       struct mutex hwcontrol;
2382 +       struct mutex *controller;
2383 +#endif
2384 +       struct nand_ecclayout   *oob;
2385 +       int     state;
2386 +       unsigned int    buffers_page;
2387 +       char    *buffers; //[CFG_PAGESIZE + CFG_PAGE_OOBSIZE];
2388 +       char    *readback_buffers;
2389 +       unsigned char   *bbt;
2390 +#if defined (WORKAROUND_RX_BUF_OV)
2391 +       unsigned int     sandbox_page;  // steal a page (block) for read ECC verification
2392 +#endif
2393 +
2394 +};
2395 +
2396 +
2397 +
2398 +//fixme, gdma api
2399 +int nand_dma_sync(void);
2400 +void release_dma_buf(void);
2401 +int set_gdma_ch(unsigned long dst,
2402 +               unsigned long src, unsigned int len, int burst_size,
2403 +               int soft_mode, int src_req_type, int dst_req_type,
2404 +               int src_burst_mode, int dst_burst_mode);
2405 +
2406 +
2407 +
2408 +
2409 +#endif