target/linux/ramips/patches-3.10/0203-MIPS-Fix-accessing-to-per-cpu-data-when-flushing-the.patch

   1 From 871d1be8c3ce46b8ef395b56cd0e37cede10e76a Mon Sep 17 00:00:00 2001
   2 From: Ralf Baechle <ralf@linux-mips.org>
   3 Date: Tue, 17 Sep 2013 12:44:31 +0200
   4 Subject: [PATCH 203/215] MIPS: Fix accessing to per-cpu data when flushing
   5  the cache
   6
   7 This fixes the following issue
   8
   9 BUG: using smp_processor_id() in preemptible [00000000] code: kjournald/1761
  10 caller is blast_dcache32+0x30/0x254
  11 Call Trace:
  12 [<8047f02c>] dump_stack+0x8/0x34
  13 [<802e7e40>] debug_smp_processor_id+0xe0/0xf0
  14 [<80114d94>] blast_dcache32+0x30/0x254
  15 [<80118484>] r4k_dma_cache_wback_inv+0x200/0x288
  16 [<80110ff0>] mips_dma_map_sg+0x108/0x180
  17 [<80355098>] ide_dma_prepare+0xf0/0x1b8
  18 [<8034eaa4>] do_rw_taskfile+0x1e8/0x33c
  19 [<8035951c>] ide_do_rw_disk+0x298/0x3e4
  20 [<8034a3c4>] do_ide_request+0x2e0/0x704
  21 [<802bb0dc>] __blk_run_queue+0x44/0x64
  22 [<802be000>] queue_unplugged.isra.36+0x1c/0x54
  23 [<802beb94>] blk_flush_plug_list+0x18c/0x24c
  24 [<802bec6c>] blk_finish_plug+0x18/0x48
  25 [<8026554c>] journal_commit_transaction+0x3b8/0x151c
  26 [<80269648>] kjournald+0xec/0x238
  27 [<8014ac00>] kthread+0xb8/0xc0
  28 [<8010268c>] ret_from_kernel_thread+0x14/0x1c
  29
  30 Caches in most systems are identical - but not always, so we can't avoid
  31 the use of smp_call_function() by just looking at the boot CPU's data,
  32 have to fiddle with preemption instead.
  33
  34 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  35 Cc: Markos Chandras <markos.chandras@imgtec.com>
  36 Cc: linux-mips@linux-mips.org
  37 Patchwork: https://patchwork.linux-mips.org/patch/5835
  38 (cherry picked from commit ff522058bd717506b2fa066fa564657f2b86477e)
  39 ---
  40  arch/mips/mm/c-r4k.c |    5 +++++
  41  1 file changed, 5 insertions(+)
  42
  43 --- a/arch/mips/mm/c-r4k.c
  44 +++ b/arch/mips/mm/c-r4k.c
  45 @@ -12,6 +12,7 @@
  46  #include <linux/highmem.h>
  47  #include <linux/kernel.h>
  48  #include <linux/linkage.h>
  49 +#include <linux/preempt.h>
  50  #include <linux/sched.h>
  51  #include <linux/smp.h>
  52  #include <linux/mm.h>
  53 @@ -601,6 +602,7 @@ static void r4k_dma_cache_wback_inv(unsi
  54         /* Catch bad driver code */
  55         BUG_ON(size == 0);
  56
  57 +       preempt_disable();
  58         if (cpu_has_inclusive_pcaches) {
  59                 if (size >= scache_size)
  60                         r4k_blast_scache();
  61 @@ -621,6 +623,7 @@ static void r4k_dma_cache_wback_inv(unsi
  62                 R4600_HIT_CACHEOP_WAR_IMPL;
  63                 blast_dcache_range(addr, addr + size);
  64         }
  65 +       preempt_enable();
  66
  67         bc_wback_inv(addr, size);
  68         __sync();
  69 @@ -631,6 +634,7 @@ static void r4k_dma_cache_inv(unsigned l
  70         /* Catch bad driver code */
  71         BUG_ON(size == 0);
  72
  73 +       preempt_disable();
  74         if (cpu_has_inclusive_pcaches) {
  75                 if (size >= scache_size)
  76                         r4k_blast_scache();
  77 @@ -655,6 +659,7 @@ static void r4k_dma_cache_inv(unsigned l
  78                 R4600_HIT_CACHEOP_WAR_IMPL;
  79                 blast_inv_dcache_range(addr, addr + size);
  80         }
  81 +       preempt_enable();
  82
  83         bc_inv(addr, size);
  84         __sync();