ca81bb60ff9c0f16ea033af4417dbf17b88ed8c1
[openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,rt3352-soc";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips24KEc";
9                 };
10         };
11
12         chosen {
13                 bootargs = "console=ttyS0,57600";
14         };
15
16         cpuintc: cpuintc@0 {
17                 #address-cells = <0>;
18                 #interrupt-cells = <1>;
19                 interrupt-controller;
20                 compatible = "mti,cpu-interrupt-controller";
21         };
22
23         palmbus@10000000 {
24                 compatible = "palmbus";
25                 reg = <0x10000000 0x200000>;
26                 ranges = <0x0 0x10000000 0x1FFFFF>;
27
28                 #address-cells = <1>;
29                 #size-cells = <1>;
30
31                 sysc@0 {
32                         compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
33                         reg = <0x0 0x100>;
34                 };
35
36                 timer@100 {
37                         compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
38                         reg = <0x100 0x20>;
39
40                         interrupt-parent = <&intc>;
41                         interrupts = <1>;
42                 };
43
44                 watchdog@120 {
45                         compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
46                         reg = <0x120 0x10>;
47
48                         resets = <&rstctrl 8>;
49                         reset-names = "wdt";
50
51                         interrupt-parent = <&intc>;
52                         interrupts = <1>;
53                 };
54
55                 intc: intc@200 {
56                         compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
57                         reg = <0x200 0x100>;
58
59                         interrupt-controller;
60                         #interrupt-cells = <1>;
61
62                         interrupt-parent = <&cpuintc>;
63                         interrupts = <2>;
64                 };
65
66                 memc@300 {
67                         compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
68                         reg = <0x300 0x100>;
69
70                         resets = <&rstctrl 20>;
71                         reset-names = "mc";
72
73                         interrupt-parent = <&intc>;
74                         interrupts = <3>;
75                 };
76
77                 uart@500 {
78                         compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
79                         reg = <0x500 0x100>;
80
81                         resets = <&rstctrl 12>;
82                         reset-names = "uart";
83
84                         interrupt-parent = <&intc>;
85                         interrupts = <5>;
86
87                         reg-shift = <2>;
88
89                         status = "disabled";
90                 };
91
92                 gpio0: gpio@600 {
93                         compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
94                         reg = <0x600 0x34>;
95
96                         gpio-controller;
97                         #gpio-cells = <2>;
98
99                         ralink,gpio-base = <0>;
100                         ralink,num-gpios = <24>;
101                         ralink,register-map = [ 00 04 08 0c
102                                                 20 24 28 2c
103                                                 30 34 ];
104                         resets = <&rstctrl 13>;
105                         reset-names = "pio";
106
107                         interrupt-parent = <&intc>;
108                         interrupts = <6>;
109                 };
110
111                 gpio1: gpio@638 {
112                         compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
113                         reg = <0x638 0x24>;
114
115                         gpio-controller;
116                         #gpio-cells = <2>;
117
118                         ralink,gpio-base = <24>;
119                         ralink,num-gpios = <16>;
120                         ralink,register-map = [ 00 04 08 0c
121                                                 10 14 18 1c
122                                                 20 24 ];
123
124                         status = "disabled";
125                 };
126
127                 gpio2: gpio@660 {
128                         compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
129                         reg = <0x660 0x24>;
130
131                         gpio-controller;
132                         #gpio-cells = <2>;
133
134                         ralink,gpio-base = <40>;
135                         ralink,num-gpios = <12>;
136                         ralink,register-map = [ 00 04 08 0c
137                                                 10 14 18 1c
138                                                 20 24 ];
139
140                         status = "disabled";
141                 };
142
143                 spi@b00 {
144                         compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
145                         reg = <0xb00 0x100>;
146                         #address-cells = <1>;
147                         #size-cells = <1>;
148
149                         resets = <&rstctrl 18>;
150                         reset-names = "spi";
151
152                         pinctrl-names = "default";
153                         pinctrl-0 = <&spi_pins>;
154
155                         status = "disabled";
156                 };
157
158                 uartlite@c00 {
159                         compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
160                         reg = <0xc00 0x100>;
161
162                         resets = <&rstctrl 19>;
163                         reset-names = "uartl";
164
165                         interrupt-parent = <&intc>;
166                         interrupts = <12>;
167
168                         reg-shift = <2>;
169
170                         pinctrl-names = "default";
171                         pinctrl-0 = <&uartlite_pins>;
172                 };
173         };
174
175         pinctrl {
176                 compatible = "ralink,rt2880-pinmux";
177
178                 pinctrl-names = "default";
179                 pinctrl-0 = <&state_default>;
180
181                 state_default: pinctrl0 {
182                 };
183
184                 spi_pins: spi {
185                         spi {
186                                 ralink,group = "spi";
187                                 ralink,function = "spi";
188                         };
189                 };
190                 uartlite_pins: uartlite {
191                         uart {
192                                 ralink,group = "uartlite";
193                                 ralink,function = "uartlite";
194                         };
195                 };
196         };
197
198         rstctrl: rstctrl {
199                 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
200                 #reset-cells = <1>;
201         };
202
203         ethernet@10100000 {
204                 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
205                 reg = <0x10100000 10000>;
206
207                 interrupt-parent = <&cpuintc>;
208                 interrupts = <5>;
209         };
210
211         esw@10110000 {
212                 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
213                 reg = <0x10110000 8000>;
214
215                 interrupt-parent = <&intc>;
216                 interrupts = <17>;
217         };
218
219         wmac@10180000 {
220                 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
221                 reg = <0x10180000 40000>;
222
223                 interrupt-parent = <&cpuintc>;
224                 interrupts = <6>;
225
226                 ralink,eeprom = "soc_wmac.eeprom";
227         };
228
229         ehci@101c0000 {
230                 compatible = "ralink,rt3352-ehci", "ehci-platform";
231                 reg = <0x101c0000 0x1000>;
232
233                 interrupt-parent = <&intc>;
234                 interrupts = <18>;
235
236                 status = "disabled";
237         };
238
239         ohci@101c1000 {
240                 compatible = "ralink,rt3352-ohci", "ohci-platform";
241                 reg = <0x101c1000 0x1000>;
242
243                 interrupt-parent = <&intc>;
244                 interrupts = <18>;
245
246                 status = "disabled";
247         };
248 };