target/linux/ramips/dts/rt2880.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,rt2880-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         palmbus@10000000 {
  24                 compatible = "palmbus";
  25                 reg = <0x10000000 0x200000>;
  26                 ranges = <0x0 0x10000000 0x1FFFFF>;
  27
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30
  31                 sysc@300000 {
  32                         compatible = "ralink,rt2880-sysc";
  33                         reg = <0x300000 0x100>;
  34                 };
  35
  36                 timer@300100 {
  37                         compatible = "ralink,rt2880-timer";
  38                         reg = <0x300100 0x20>;
  39
  40                         interrupt-parent = <&intc>;
  41                         interrupts = <1>;
  42                 };
  43
  44                 watchdog@300120 {
  45                         compatible = "ralink,rt2880-wdt";
  46                         reg = <0x300120 0x10>;
  47                 };
  48
  49                 intc: intc@300200 {
  50                         compatible = "ralink,rt2880-intc";
  51                         reg = <0x300200 0x100>;
  52
  53                         interrupt-controller;
  54                         #interrupt-cells = <1>;
  55
  56                         interrupt-parent = <&cpuintc>;
  57                         interrupts = <2>;
  58                 };
  59
  60                 memc@300300 {
  61                         compatible = "ralink,rt2880-memc";
  62                         reg = <0x300300 0x100>;
  63                 };
  64
  65                 gpio0: gpio@300600 {
  66                         compatible = "ralink,rt2880-gpio";
  67                         reg = <0x300600 0x34>;
  68
  69                         gpio-controller;
  70                         #gpio-cells = <2>;
  71
  72                         ralink,num-gpios = <24>;
  73                         ralink,register-map = [ 00 04 08 0c
  74                                                 20 24 28 2c
  75                                                 30 34 ];
  76                 };
  77
  78                 gpio1: gpio@300638 {
  79                         compatible = "ralink,rt2880-gpio";
  80                         reg = <0x300638 0x24>;
  81
  82                         gpio-controller;
  83                         #gpio-cells = <2>;
  84
  85                         ralink,num-gpios = <16>;
  86                         ralink,register-map = [ 00 04 08 0c
  87                                                 10 14 18 1c
  88                                                 20 24 ];
  89                 };
  90
  91                 gpio2: gpio@300660 {
  92                         compatible = "ralink,rt2880-gpio";
  93                         reg = <0x300660 0x24>;
  94
  95                         gpio-controller;
  96                         #gpio-cells = <2>;
  97
  98                         ralink,num-gpios = <32>;
  99                         ralink,register-map = [ 00 04 08 0c
 100                                                 10 14 18 1c
 101                                                 20 24 ];
 102                 };
 103
 104                 uartlite@300c00 {
 105                         compatible = "ralink,rt2880-uart", "ns16550a";
 106                         reg = <0x300c00 0x100>;
 107
 108                         interrupt-parent = <&intc>;
 109                         interrupts = <12>;
 110
 111                         reg-shift = <2>;
 112                 };
 113         };
 114 };