target/linux/ramips/dts/mt7620a.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7620a-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         aliases {
  24                 spi0 = &spi0;
  25                 spi1 = &spi1;
  26                 serial0 = &uartlite;
  27         };
  28
  29         palmbus@10000000 {
  30                 compatible = "palmbus";
  31                 reg = <0x10000000 0x200000>;
  32                 ranges = <0x0 0x10000000 0x1FFFFF>;
  33
  34                 #address-cells = <1>;
  35                 #size-cells = <1>;
  36
  37                 sysc@0 {
  38                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
  39                         reg = <0x0 0x100>;
  40                 };
  41
  42                 timer@100 {
  43                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  44                         reg = <0x100 0x20>;
  45
  46                         interrupt-parent = <&intc>;
  47                         interrupts = <1>;
  48                 };
  49
  50                 watchdog@120 {
  51                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  52                         reg = <0x120 0x10>;
  53
  54                         resets = <&rstctrl 8>;
  55                         reset-names = "wdt";
  56
  57                         interrupt-parent = <&intc>;
  58                         interrupts = <1>;
  59                 };
  60
  61                 intc: intc@200 {
  62                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  63                         reg = <0x200 0x100>;
  64
  65                         resets = <&rstctrl 19>;
  66                         reset-names = "intc";
  67
  68                         interrupt-controller;
  69                         #interrupt-cells = <1>;
  70
  71                         interrupt-parent = <&cpuintc>;
  72                         interrupts = <2>;
  73                 };
  74
  75                 memc@300 {
  76                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  77                         reg = <0x300 0x100>;
  78
  79                         resets = <&rstctrl 20>;
  80                         reset-names = "mc";
  81
  82                         interrupt-parent = <&intc>;
  83                         interrupts = <3>;
  84                 };
  85
  86                 uart@500 {
  87                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  88                         reg = <0x500 0x100>;
  89
  90                         resets = <&rstctrl 12>;
  91                         reset-names = "uart";
  92
  93                         interrupt-parent = <&intc>;
  94                         interrupts = <5>;
  95
  96                         reg-shift = <2>;
  97
  98                         status = "disabled";
  99                 };
 100
 101                 gpio0: gpio@600 {
 102                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 103                         reg = <0x600 0x34>;
 104
 105                         resets = <&rstctrl 13>;
 106                         reset-names = "pio";
 107
 108                         interrupt-parent = <&intc>;
 109                         interrupts = <6>;
 110
 111                         gpio-controller;
 112                         #gpio-cells = <2>;
 113
 114                         ralink,gpio-base = <0>;
 115                         ralink,num-gpios = <24>;
 116                         ralink,register-map = [ 00 04 08 0c
 117                                                 20 24 28 2c
 118                                                 30 34 ];
 119                 };
 120
 121                 gpio1: gpio@638 {
 122                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 123                         reg = <0x638 0x24>;
 124
 125                         interrupt-parent = <&intc>;
 126                         interrupts = <6>;
 127
 128                         gpio-controller;
 129                         #gpio-cells = <2>;
 130
 131                         ralink,gpio-base = <24>;
 132                         ralink,num-gpios = <16>;
 133                         ralink,register-map = [ 00 04 08 0c
 134                                                 10 14 18 1c
 135                                                 20 24 ];
 136
 137                         status = "disabled";
 138                 };
 139
 140                 gpio2: gpio@660 {
 141                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 142                         reg = <0x660 0x24>;
 143
 144                         interrupt-parent = <&intc>;
 145                         interrupts = <6>;
 146
 147                         gpio-controller;
 148                         #gpio-cells = <2>;
 149
 150                         ralink,gpio-base = <40>;
 151                         ralink,num-gpios = <32>;
 152                         ralink,register-map = [ 00 04 08 0c
 153                                                 10 14 18 1c
 154                                                 20 24 ];
 155
 156                         status = "disabled";
 157                 };
 158
 159                 gpio3: gpio@688 {
 160                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 161                         reg = <0x688 0x24>;
 162
 163                         interrupt-parent = <&intc>;
 164                         interrupts = <6>;
 165
 166                         gpio-controller;
 167                         #gpio-cells = <2>;
 168
 169                         ralink,gpio-base = <72>;
 170                         ralink,num-gpios = <1>;
 171                         ralink,register-map = [ 00 04 08 0c
 172                                                 10 14 18 1c
 173                                                 20 24 ];
 174
 175                         status = "disabled";
 176                 };
 177
 178                 i2c@900 {
 179                         compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
 180                         reg = <0x900 0x100>;
 181
 182                         resets = <&rstctrl 16>;
 183                         reset-names = "i2c";
 184
 185                         #address-cells = <1>;
 186                         #size-cells = <0>;
 187
 188                         status = "disabled";
 189
 190                         pinctrl-names = "default";
 191                         pinctrl-0 = <&i2c_pins>;
 192                 };
 193
 194                 i2s@a00 {
 195                         compatible = "ralink,mt7620a-i2s";
 196                         reg = <0xa00 0x100>;
 197
 198                         resets = <&rstctrl 17>;
 199                         reset-names = "i2s";
 200
 201                         interrupt-parent = <&intc>;
 202                         interrupts = <10>;
 203
 204                         dmas = <&gdma 4>,
 205                                 <&gdma 5>;
 206                         dma-names = "tx", "rx";
 207
 208                         status = "disabled";
 209                 };
 210
 211                 spi0: spi@b00 {
 212                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 213                         reg = <0xb00 0x40>;
 214
 215                         resets = <&rstctrl 18>;
 216                         reset-names = "spi";
 217
 218                         #address-cells = <1>;
 219                         #size-cells = <0>;
 220
 221                         status = "disabled";
 222
 223                         pinctrl-names = "default";
 224                         pinctrl-0 = <&spi_pins>;
 225                 };
 226
 227                 spi1: spi@b40 {
 228                         compatible = "ralink,rt2880-spi";
 229                         reg = <0xb40 0x60>;
 230
 231                         resets = <&rstctrl 18>;
 232                         reset-names = "spi";
 233
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236
 237                         status = "disabled";
 238
 239                         pinctrl-names = "default";
 240                         pinctrl-0 = <&spi_cs1>;
 241                 };
 242
 243                 uartlite: uartlite@c00 {
 244                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 245                         reg = <0xc00 0x100>;
 246
 247                         resets = <&rstctrl 19>;
 248                         reset-names = "uartl";
 249
 250                         interrupt-parent = <&intc>;
 251                         interrupts = <12>;
 252
 253                         reg-shift = <2>;
 254
 255                         pinctrl-names = "default";
 256                         pinctrl-0 = <&uartlite_pins>;
 257                 };
 258
 259                 systick@d00 {
 260                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 261                         reg = <0xd00 0x10>;
 262
 263                         resets = <&rstctrl 28>;
 264                         reset-names = "intc";
 265
 266                         interrupt-parent = <&cpuintc>;
 267                         interrupts = <7>;
 268                 };
 269
 270                 pcm@2000 {
 271                         compatible = "ralink,mt7620a-pcm";
 272                         reg = <0x2000 0x800>;
 273
 274                         resets = <&rstctrl 11>;
 275                         reset-names = "pcm";
 276
 277                         interrupt-parent = <&intc>;
 278                         interrupts = <4>;
 279
 280                         status = "disabled";
 281                 };
 282
 283                 gdma: gdma@2800 {
 284                         compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 285                         reg = <0x2800 0x800>;
 286
 287                         resets = <&rstctrl 14>;
 288                         reset-names = "dma";
 289
 290                         interrupt-parent = <&intc>;
 291                         interrupts = <7>;
 292
 293                         #dma-cells = <1>;
 294                         #dma-channels = <16>;
 295                         #dma-requests = <16>;
 296
 297                         status = "disabled";
 298                 };
 299         };
 300
 301         pinctrl {
 302                 compatible = "ralink,rt2880-pinmux";
 303                 pinctrl-names = "default";
 304                 pinctrl-0 = <&state_default>;
 305
 306                 state_default: pinctrl0 {
 307                 };
 308
 309                 pcm_i2s_pins: pcm_i2s {
 310                         pcm_i2s {
 311                                 ralink,group = "uartf";
 312                                 ralink,function = "pcm i2s";
 313                         };
 314                 };
 315
 316                 uartf_gpio_pins: uartf_gpio {
 317                         uartf_gpio {
 318                                 ralink,group = "uartf";
 319                                 ralink,function = "gpio uartf";
 320                         };
 321                 };
 322
 323                 spi_pins: spi {
 324                         spi {
 325                                 ralink,group = "spi";
 326                                 ralink,function = "spi";
 327                         };
 328                 };
 329
 330                 spi_cs1: spi1 {
 331                         spi1 {
 332                                 ralink,group = "spi_cs1";
 333                                 ralink,function = "spi_cs1";
 334                         };
 335                 };
 336
 337                 i2c_pins: i2c {
 338                         i2c {
 339                                 ralink,group = "i2c";
 340                                 ralink,function = "i2c";
 341                         };
 342                 };
 343
 344                 uartlite_pins: uartlite {
 345                         uart {
 346                                 ralink,group = "uartlite";
 347                                 ralink,function = "uartlite";
 348                         };
 349                 };
 350
 351                 mdio_pins: mdio {
 352                         mdio {
 353                                 ralink,group = "mdio";
 354                                 ralink,function = "mdio";
 355                         };
 356                 };
 357
 358                 ephy_pins: ephy {
 359                         ephy {
 360                                 ralink,group = "ephy";
 361                                 ralink,function = "ephy";
 362                         };
 363                 };
 364
 365                 wled_pins: wled {
 366                         wled {
 367                                 ralink,group = "wled";
 368                                 ralink,function = "wled";
 369                         };
 370                 };
 371
 372                 rgmii1_pins: rgmii1 {
 373                         rgmii1 {
 374                                 ralink,group = "rgmii1";
 375                                 ralink,function = "rgmii1";
 376                         };
 377                 };
 378
 379                 rgmii2_pins: rgmii2 {
 380                         rgmii2 {
 381                                 ralink,group = "rgmii2";
 382                                 ralink,function = "rgmii2";
 383                         };
 384                 };
 385
 386                 pcie_pins: pcie {
 387                         pcie {
 388                                 ralink,group = "pcie";
 389                                 ralink,function = "pcie rst";
 390                         };
 391                 };
 392         };
 393
 394         rstctrl: rstctrl {
 395                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 396                 #reset-cells = <1>;
 397         };
 398
 399         usbphy: usbphy {
 400                 compatible = "mediatek,mt7620-usbphy";
 401                 #phy-cells = <1>;
 402
 403                 resets = <&rstctrl 22 &rstctrl 25>;
 404                 reset-names = "host", "device";
 405         };
 406
 407         ethernet@10100000 {
 408                 compatible = "mediatek,mt7620-eth";
 409                 reg = <0x10100000 10000>;
 410
 411                 #address-cells = <1>;
 412                 #size-cells = <0>;
 413
 414                 interrupt-parent = <&cpuintc>;
 415                 interrupts = <5>;
 416
 417                 resets = <&rstctrl 21 &rstctrl 23>;
 418                 reset-names = "fe", "esw";
 419
 420                 mediatek,switch = <&gsw>;
 421
 422                 port@4 {
 423                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 424                         reg = <4>;
 425
 426                         status = "disabled";
 427                 };
 428
 429                 port@5 {
 430                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 431                         reg = <5>;
 432
 433                         status = "disabled";
 434                 };
 435
 436                 mdio-bus {
 437                         #address-cells = <1>;
 438                         #size-cells = <0>;
 439
 440                         status = "disabled";
 441                 };
 442         };
 443
 444         gsw: gsw@10110000 {
 445                 compatible = "mediatek,mt7620-gsw";
 446                 reg = <0x10110000 8000>;
 447
 448                 resets = <&rstctrl 23>;
 449                 reset-names = "esw";
 450
 451                 interrupt-parent = <&intc>;
 452                 interrupts = <17>;
 453         };
 454
 455         sdhci@10130000 {
 456                 compatible = "ralink,mt7620-sdhci";
 457                 reg = <0x10130000 4000>;
 458
 459                 interrupt-parent = <&intc>;
 460                 interrupts = <14>;
 461
 462                 status = "disabled";
 463         };
 464
 465         ehci@101c0000 {
 466                 compatible = "generic-ehci";
 467                 reg = <0x101c0000 0x1000>;
 468
 469                 interrupt-parent = <&intc>;
 470                 interrupts = <18>;
 471
 472                 phys = <&usbphy 1>;
 473                 phy-names = "usb";
 474
 475                 status = "disabled";
 476         };
 477
 478         ohci@101c1000 {
 479                 compatible = "generic-ohci";
 480                 reg = <0x101c1000 0x1000>;
 481
 482                 interrupt-parent = <&intc>;
 483                 interrupts = <18>;
 484
 485                 phys = <&usbphy 1>;
 486                 phy-names = "usb";
 487
 488                 status = "disabled";
 489         };
 490
 491         pcie@10140000 {
 492                 compatible = "mediatek,mt7620-pci";
 493                 reg = <0x10140000 0x100
 494                         0x10142000 0x100>;
 495
 496                 #address-cells = <3>;
 497                 #size-cells = <2>;
 498
 499                 resets = <&rstctrl 26>;
 500                 reset-names = "pcie0";
 501
 502                 interrupt-parent = <&cpuintc>;
 503                 interrupts = <4>;
 504
 505                 pinctrl-names = "default";
 506                 pinctrl-0 = <&pcie_pins>;
 507
 508                 device_type = "pci";
 509
 510                 bus-range = <0 255>;
 511                 ranges = <
 512                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 513                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 514                 >;
 515
 516                 status = "disabled";
 517
 518                 pcie-bridge {
 519                         reg = <0x0000 0 0 0 0>;
 520
 521                         #address-cells = <3>;
 522                         #size-cells = <2>;
 523
 524                         device_type = "pci";
 525                 };
 526         };
 527
 528         wmac@10180000 {
 529                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 530                 reg = <0x10180000 40000>;
 531
 532                 interrupt-parent = <&cpuintc>;
 533                 interrupts = <6>;
 534
 535                 ralink,eeprom = "soc_wmac.eeprom";
 536         };
 537 };