target/linux/mvebu/patches-3.10/0003-ARM-mvebu-Add-support-for-NOR-flash-device-on-Armada.patch

   1 From 74cd8c09ae416261d7595021fc8062836dc750a2 Mon Sep 17 00:00:00 2001
   2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
   3 Date: Fri, 17 May 2013 08:09:58 -0300
   4 Subject: [PATCH 003/203] ARM: mvebu: Add support for NOR flash device on
   5  Armada XP-DB board
   6
   7 The Armada XP Development Board (DB-78460-BP) has a NOR flash device
   8 connected to the Device Bus. This commit adds the device tree node
   9 to support this device.
  10
  11 This SoC supports a flexible and dynamic decoding window allocation
  12 scheme; but since this feature is still not implemented we need
  13 to specify the window base address in the device tree node itself.
  14
  15 This base address has been selected in a completely arbitrary fashion.
  16
  17 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
  18 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  19 Signed-off-by: Jason Cooper <jason@lakedaemon.net>
  20 ---
  21  arch/arm/boot/dts/armada-xp-db.dts | 32 ++++++++++++++++++++++++++++++++
  22  1 file changed, 32 insertions(+)
  23
  24 --- a/arch/arm/boot/dts/armada-xp-db.dts
  25 +++ b/arch/arm/boot/dts/armada-xp-db.dts
  26 @@ -30,6 +30,9 @@
  27         };
  28
  29         soc {
  30 +               ranges = <0          0 0xd0000000 0x100000      /* Internal registers 1MiB */
  31 +                         0xf0000000 0 0xf0000000 0x1000000>;   /* Device Bus, NOR 16MiB   */
  32 +
  33                 internal-regs {
  34                         serial@12000 {
  35                                 clock-frequency = <250000000>;
  36 @@ -156,6 +159,35 @@
  37                                         status = "okay";
  38                                 };
  39                         };
  40 +
  41 +                       devbus-bootcs@10400 {
  42 +                               status = "okay";
  43 +                               ranges = <0 0xf0000000 0x1000000>;
  44 +
  45 +                               /* Device Bus parameters are required */
  46 +
  47 +                               /* Read parameters */
  48 +                               devbus,bus-width    = <8>;
  49 +                               devbus,turn-off-ps  = <60000>;
  50 +                               devbus,badr-skew-ps = <0>;
  51 +                               devbus,acc-first-ps = <124000>;
  52 +                               devbus,acc-next-ps  = <248000>;
  53 +                               devbus,rd-setup-ps  = <0>;
  54 +                               devbus,rd-hold-ps   = <0>;
  55 +
  56 +                               /* Write parameters */
  57 +                               devbus,sync-enable = <0>;
  58 +                               devbus,wr-high-ps  = <60000>;
  59 +                               devbus,wr-low-ps   = <60000>;
  60 +                               devbus,ale-wr-ps   = <60000>;
  61 +
  62 +                               /* NOR 16 MiB */
  63 +                               nor@0 {
  64 +                                       compatible = "cfi-flash";
  65 +                                       reg = <0 0x1000000>;
  66 +                                       bank-width = <2>;
  67 +                               };
  68 +                       };
  69                 };
  70         };
  71  };