kernel: update kernel 4.4 to version 4.4.7
[openwrt.git] / target / linux / mediatek / patches-4.4 / 0047-regulator-mt6323-Add-support-for-MT6323-regulator.patch
1 From 031a2ff537366855e88bc95e5d42ea522b6c5ad8 Mon Sep 17 00:00:00 2001
2 From: Chen Zhong <chen.zhong@mediatek.com>
3 Date: Fri, 8 Jan 2016 04:17:37 +0100
4 Subject: [PATCH 47/81] regulator: mt6323: Add support for MT6323 regulator
5
6 The MT6323 is a regulator found on boards based on MediaTek MT7623 and
7 probably other SoCs. It is a so called pmic and connects as a slave to
8 SoC using SPI, wrapped inside the pmic-wrapper.
9
10 Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
11 Signed-off-by: John Crispin <blogic@openwrt.org>
12 ---
13  drivers/regulator/Kconfig                  |    9 +
14  drivers/regulator/Makefile                 |    1 +
15  drivers/regulator/mt6323-regulator.c       |  432 ++++++++++++++++++++++++++++
16  include/linux/regulator/mt6323-regulator.h |   52 ++++
17  4 files changed, 494 insertions(+)
18  create mode 100644 drivers/regulator/mt6323-regulator.c
19  create mode 100644 include/linux/regulator/mt6323-regulator.h
20
21 --- a/drivers/regulator/Kconfig
22 +++ b/drivers/regulator/Kconfig
23 @@ -453,6 +453,15 @@ config REGULATOR_MT6311
24           This driver supports the control of different power rails of device
25           through regulator interface.
26  
27 +config REGULATOR_MT6323
28 +       tristate "MediaTek MT6323 PMIC"
29 +       depends on MFD_MT6397
30 +       help
31 +         Say y here to select this option to enable the power regulator of
32 +         MediaTek MT6323 PMIC.
33 +         This driver supports the control of different power rails of device
34 +         through regulator interface.
35 +
36  config REGULATOR_MT6397
37         tristate "MediaTek MT6397 PMIC"
38         depends on MFD_MT6397
39 --- a/drivers/regulator/Makefile
40 +++ b/drivers/regulator/Makefile
41 @@ -60,6 +60,7 @@ obj-$(CONFIG_REGULATOR_MC13783) += mc137
42  obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
43  obj-$(CONFIG_REGULATOR_MC13XXX_CORE) +=  mc13xxx-regulator-core.o
44  obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
45 +obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
46  obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
47  obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o
48  obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
49 --- /dev/null
50 +++ b/drivers/regulator/mt6323-regulator.c
51 @@ -0,0 +1,432 @@
52 +/*
53 + * Copyright (c) 2016 MediaTek Inc.
54 + * Author: Chen Zhong <chen.zhong@mediatek.com>
55 + *
56 + * This program is free software; you can redistribute it and/or modify
57 + * it under the terms of the GNU General Public License version 2 as
58 + * published by the Free Software Foundation.
59 + */
60 +
61 +#include <linux/module.h>
62 +#include <linux/of.h>
63 +#include <linux/platform_device.h>
64 +#include <linux/regmap.h>
65 +#include <linux/mfd/mt6397/core.h>
66 +#include <linux/mfd/mt6323/registers.h>
67 +#include <linux/regulator/driver.h>
68 +#include <linux/regulator/machine.h>
69 +#include <linux/regulator/mt6323-regulator.h>
70 +#include <linux/regulator/of_regulator.h>
71 +
72 +#define MT6323_LDO_MODE_NORMAL 0
73 +#define MT6323_LDO_MODE_LP     1
74 +
75 +/*
76 + * MT6323 regulators' information
77 + *
78 + * @desc: standard fields of regulator description.
79 + * @qi: Mask for query enable signal status of regulators
80 + * @vselon_reg: Register sections for hardware control mode of bucks
81 + * @vselctrl_reg: Register for controlling the buck control mode.
82 + * @vselctrl_mask: Mask for query buck's voltage control mode.
83 + */
84 +struct mt6323_regulator_info {
85 +       struct regulator_desc desc;
86 +       u32 qi;
87 +       u32 vselon_reg;
88 +       u32 vselctrl_reg;
89 +       u32 vselctrl_mask;
90 +       u32 modeset_reg;
91 +       u32 modeset_mask;
92 +};
93 +
94 +#define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg,   \
95 +               vosel, vosel_mask, voselon, vosel_ctrl)                 \
96 +[MT6323_ID_##vreg] = {                                                 \
97 +       .desc = {                                                       \
98 +               .name = #vreg,                                          \
99 +               .of_match = of_match_ptr(match),                        \
100 +               .ops = &mt6323_volt_range_ops,                          \
101 +               .type = REGULATOR_VOLTAGE,                              \
102 +               .id = MT6323_ID_##vreg,                                 \
103 +               .owner = THIS_MODULE,                                   \
104 +               .n_voltages = (max - min)/step + 1,                     \
105 +               .linear_ranges = volt_ranges,                           \
106 +               .n_linear_ranges = ARRAY_SIZE(volt_ranges),             \
107 +               .vsel_reg = vosel,                                      \
108 +               .vsel_mask = vosel_mask,                                \
109 +               .enable_reg = enreg,                                    \
110 +               .enable_mask = BIT(0),                                  \
111 +       },                                                              \
112 +       .qi = BIT(13),                                                  \
113 +       .vselon_reg = voselon,                                          \
114 +       .vselctrl_reg = vosel_ctrl,                                     \
115 +       .vselctrl_mask = BIT(1),                                        \
116 +}
117 +
118 +#define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel,   \
119 +               vosel_mask, _modeset_reg, _modeset_mask)                \
120 +[MT6323_ID_##vreg] = {                                                 \
121 +       .desc = {                                                       \
122 +               .name = #vreg,                                          \
123 +               .of_match = of_match_ptr(match),                        \
124 +               .ops = &mt6323_volt_table_ops,                          \
125 +               .type = REGULATOR_VOLTAGE,                              \
126 +               .id = MT6323_ID_##vreg,                                 \
127 +               .owner = THIS_MODULE,                                   \
128 +               .n_voltages = ARRAY_SIZE(ldo_volt_table),               \
129 +               .volt_table = ldo_volt_table,                           \
130 +               .vsel_reg = vosel,                                      \
131 +               .vsel_mask = vosel_mask,                                \
132 +               .enable_reg = enreg,                                    \
133 +               .enable_mask = BIT(enbit),                              \
134 +       },                                                              \
135 +       .qi = BIT(15),                                                  \
136 +       .modeset_reg = _modeset_reg,                                    \
137 +       .modeset_mask = _modeset_mask,                                  \
138 +}
139 +
140 +#define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt,              \
141 +               _modeset_reg, _modeset_mask)                            \
142 +[MT6323_ID_##vreg] = {                                                 \
143 +       .desc = {                                                       \
144 +               .name = #vreg,                                          \
145 +               .of_match = of_match_ptr(match),                        \
146 +               .ops = &mt6323_volt_fixed_ops,                          \
147 +               .type = REGULATOR_VOLTAGE,                              \
148 +               .id = MT6323_ID_##vreg,                                 \
149 +               .owner = THIS_MODULE,                                   \
150 +               .n_voltages = 1,                                        \
151 +               .enable_reg = enreg,                                    \
152 +               .enable_mask = BIT(enbit),                              \
153 +               .min_uV = volt,                                         \
154 +       },                                                              \
155 +       .qi = BIT(15),                                                  \
156 +       .modeset_reg = _modeset_reg,                                    \
157 +       .modeset_mask = _modeset_mask,                                  \
158 +}
159 +
160 +static const struct regulator_linear_range buck_volt_range1[] = {
161 +       REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
162 +};
163 +
164 +static const struct regulator_linear_range buck_volt_range2[] = {
165 +       REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500),
166 +};
167 +
168 +static const struct regulator_linear_range buck_volt_range3[] = {
169 +       REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
170 +};
171 +
172 +static const u32 ldo_volt_table1[] = {
173 +       3300000, 3400000, 3500000, 3600000,
174 +};
175 +
176 +static const u32 ldo_volt_table2[] = {
177 +       1500000, 1800000, 2500000, 2800000,
178 +};
179 +
180 +static const u32 ldo_volt_table3[] = {
181 +       1800000, 3300000,
182 +};
183 +
184 +static const u32 ldo_volt_table4[] = {
185 +       3000000, 3300000,
186 +};
187 +
188 +static const u32 ldo_volt_table5[] = {
189 +       1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
190 +};
191 +
192 +static const u32 ldo_volt_table6[] = {
193 +       1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
194 +};
195 +
196 +static const u32 ldo_volt_table7[] = {
197 +       1200000, 1300000, 1500000, 1800000,
198 +};
199 +
200 +static const u32 ldo_volt_table8[] = {
201 +       1800000, 3000000,
202 +};
203 +
204 +static const u32 ldo_volt_table9[] = {
205 +       1200000, 1350000, 1500000, 1800000,
206 +};
207 +
208 +static const u32 ldo_volt_table10[] = {
209 +       1200000, 1300000, 1500000, 1800000,
210 +};
211 +
212 +static int mt6323_get_status(struct regulator_dev *rdev)
213 +{
214 +       int ret;
215 +       u32 regval;
216 +       struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
217 +
218 +       ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
219 +       if (ret != 0) {
220 +               dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
221 +               return ret;
222 +       }
223 +
224 +       return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
225 +}
226 +
227 +static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
228 +{
229 +       int ret, val = 0;
230 +       struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
231 +
232 +       if (!info->modeset_mask) {
233 +               dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n",
234 +                       info->desc.name);
235 +               return -EINVAL;
236 +       }
237 +
238 +       switch (mode) {
239 +       case REGULATOR_MODE_STANDBY:
240 +               val = MT6323_LDO_MODE_LP;
241 +               break;
242 +       case REGULATOR_MODE_NORMAL:
243 +               val = MT6323_LDO_MODE_NORMAL;
244 +               break;
245 +       default:
246 +               return -EINVAL;
247 +       }
248 +
249 +       val <<= ffs(info->modeset_mask) - 1;
250 +
251 +       ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
252 +                                 info->modeset_mask, val);
253 +
254 +       return ret;
255 +}
256 +
257 +static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev)
258 +{
259 +       unsigned int val;
260 +       unsigned int mode;
261 +       int ret;
262 +       struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
263 +
264 +       if (!info->modeset_mask) {
265 +               dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n",
266 +                       info->desc.name);
267 +               return -EINVAL;
268 +       }
269 +
270 +       ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
271 +       if (ret < 0)
272 +               return ret;
273 +
274 +       val &= info->modeset_mask;
275 +       val >>= ffs(info->modeset_mask) - 1;
276 +
277 +       if (val & 0x1)
278 +               mode = REGULATOR_MODE_STANDBY;
279 +       else
280 +               mode = REGULATOR_MODE_NORMAL;
281 +
282 +       return mode;
283 +}
284 +
285 +static struct regulator_ops mt6323_volt_range_ops = {
286 +       .list_voltage = regulator_list_voltage_linear_range,
287 +       .map_voltage = regulator_map_voltage_linear_range,
288 +       .set_voltage_sel = regulator_set_voltage_sel_regmap,
289 +       .get_voltage_sel = regulator_get_voltage_sel_regmap,
290 +       .set_voltage_time_sel = regulator_set_voltage_time_sel,
291 +       .enable = regulator_enable_regmap,
292 +       .disable = regulator_disable_regmap,
293 +       .is_enabled = regulator_is_enabled_regmap,
294 +       .get_status = mt6323_get_status,
295 +};
296 +
297 +static struct regulator_ops mt6323_volt_table_ops = {
298 +       .list_voltage = regulator_list_voltage_table,
299 +       .map_voltage = regulator_map_voltage_iterate,
300 +       .set_voltage_sel = regulator_set_voltage_sel_regmap,
301 +       .get_voltage_sel = regulator_get_voltage_sel_regmap,
302 +       .set_voltage_time_sel = regulator_set_voltage_time_sel,
303 +       .enable = regulator_enable_regmap,
304 +       .disable = regulator_disable_regmap,
305 +       .is_enabled = regulator_is_enabled_regmap,
306 +       .get_status = mt6323_get_status,
307 +       .set_mode = mt6323_ldo_set_mode,
308 +       .get_mode = mt6323_ldo_get_mode,
309 +};
310 +
311 +static struct regulator_ops mt6323_volt_fixed_ops = {
312 +       .list_voltage = regulator_list_voltage_linear,
313 +       .enable = regulator_enable_regmap,
314 +       .disable = regulator_disable_regmap,
315 +       .is_enabled = regulator_is_enabled_regmap,
316 +       .get_status = mt6323_get_status,
317 +       .set_mode = mt6323_ldo_set_mode,
318 +       .get_mode = mt6323_ldo_get_mode,
319 +};
320 +
321 +/* The array is indexed by id(MT6323_ID_XXX) */
322 +static struct mt6323_regulator_info mt6323_regulators[] = {
323 +       MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250,
324 +               buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f,
325 +               MT6323_VPROC_CON10, MT6323_VPROC_CON5),
326 +       MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500,
327 +               buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f,
328 +               MT6323_VSYS_CON10, MT6323_VSYS_CON5),
329 +       MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
330 +               buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9,
331 +               0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5),
332 +       MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000,
333 +               MT6323_ANALDO_CON1, 0x2),
334 +       MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000,
335 +               MT6323_ANALDO_CON20, 0x2),
336 +       MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1,
337 +               MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC,
338 +               MT6323_ANALDO_CON21, 0x2),
339 +       MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1,
340 +               MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC,
341 +               MT6323_ANALDO_CON21, 0x2),
342 +       MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000,
343 +               MT6323_ANALDO_CON2, 0x2),
344 +       MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2,
345 +               MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0),
346 +       MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000,
347 +               MT6323_DIGLDO_CON0, 0x2),
348 +       MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000,
349 +               MT6323_DIGLDO_CON2, 0x2),
350 +       MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3,
351 +               MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10,
352 +               MT6323_DIGLDO_CON3, 0x2),
353 +       MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4,
354 +               MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80,
355 +               MT6323_DIGLDO_CON5, 0x2),
356 +       MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4,
357 +               MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80,
358 +               MT6323_DIGLDO_CON6, 0x2),
359 +       MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5,
360 +               MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0,
361 +               MT6323_DIGLDO_CON7, 0x2),
362 +       MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6,
363 +               MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0,
364 +               MT6323_DIGLDO_CON8, 0x2),
365 +       MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7,
366 +               MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60,
367 +               MT6323_DIGLDO_CON9, 0x2),
368 +       MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000,
369 +               MT6323_DIGLDO_CON11, 0x2),
370 +       MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8,
371 +               MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20,
372 +               MT6323_DIGLDO_CON13, 0x2),
373 +       MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8,
374 +               MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20,
375 +               MT6323_DIGLDO_CON14, 0x2),
376 +       MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000,
377 +               -1, 0),
378 +       MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5,
379 +               MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0,
380 +               MT6323_DIGLDO_CON31, 0x2),
381 +       MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5,
382 +               MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0,
383 +               MT6323_DIGLDO_CON39, 0x2),
384 +       MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000,
385 +               MT6323_DIGLDO_CON45, 0x2),
386 +       MT6323_LDO("ldo_vm", VM, ldo_volt_table9,
387 +               MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30,
388 +               MT6323_DIGLDO_CON47, 0x2),
389 +       MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000,
390 +               MT6323_DIGLDO_CON49, 0x2),
391 +       MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10,
392 +               MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60,
393 +               MT6323_DIGLDO_CON51, 0x2),
394 +       MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000,
395 +               MT6323_DIGLDO_CON53, 0x2),
396 +};
397 +
398 +static int mt6323_set_buck_vosel_reg(struct platform_device *pdev)
399 +{
400 +       struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
401 +       int i;
402 +       u32 regval;
403 +
404 +       for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
405 +               if (mt6323_regulators[i].vselctrl_reg) {
406 +                       if (regmap_read(mt6323->regmap,
407 +                               mt6323_regulators[i].vselctrl_reg,
408 +                               &regval) < 0) {
409 +                               dev_err(&pdev->dev,
410 +                                       "Failed to read buck ctrl\n");
411 +                               return -EIO;
412 +                       }
413 +
414 +                       if (regval & mt6323_regulators[i].vselctrl_mask) {
415 +                               mt6323_regulators[i].desc.vsel_reg =
416 +                               mt6323_regulators[i].vselon_reg;
417 +                       }
418 +               }
419 +       }
420 +
421 +       return 0;
422 +}
423 +
424 +static int mt6323_regulator_probe(struct platform_device *pdev)
425 +{
426 +       struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
427 +       struct regulator_config config = {};
428 +       struct regulator_dev *rdev;
429 +       int i;
430 +       u32 reg_value;
431 +
432 +       /* Query buck controller to select activated voltage register part */
433 +       if (mt6323_set_buck_vosel_reg(pdev))
434 +               return -EIO;
435 +
436 +       /* Read PMIC chip revision to update constraints and voltage table */
437 +       if (regmap_read(mt6323->regmap, MT6323_CID, &reg_value) < 0) {
438 +               dev_err(&pdev->dev, "Failed to read Chip ID\n");
439 +               return -EIO;
440 +       }
441 +       dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
442 +
443 +       for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
444 +               config.dev = &pdev->dev;
445 +               config.driver_data = &mt6323_regulators[i];
446 +               config.regmap = mt6323->regmap;
447 +               rdev = devm_regulator_register(&pdev->dev,
448 +                               &mt6323_regulators[i].desc, &config);
449 +               if (IS_ERR(rdev)) {
450 +                       dev_err(&pdev->dev, "failed to register %s\n",
451 +                               mt6323_regulators[i].desc.name);
452 +                       return PTR_ERR(rdev);
453 +               }
454 +       }
455 +       return 0;
456 +}
457 +
458 +static const struct platform_device_id mt6323_platform_ids[] = {
459 +       {"mt6323-regulator", 0},
460 +       { /* sentinel */ },
461 +};
462 +MODULE_DEVICE_TABLE(platform, mt6323_platform_ids);
463 +
464 +static const struct of_device_id mt6323_of_match[] = {
465 +       { .compatible = "mediatek,mt6323-regulator", },
466 +       { /* sentinel */ },
467 +};
468 +MODULE_DEVICE_TABLE(of, mt6323_of_match);
469 +
470 +static struct platform_driver mt6323_regulator_driver = {
471 +       .driver = {
472 +               .name = "mt6323-regulator",
473 +               .of_match_table = of_match_ptr(mt6323_of_match),
474 +       },
475 +       .probe = mt6323_regulator_probe,
476 +       .id_table = mt6323_platform_ids,
477 +};
478 +
479 +module_platform_driver(mt6323_regulator_driver);
480 +
481 +MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
482 +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
483 +MODULE_LICENSE("GPL v2");
484 --- /dev/null
485 +++ b/include/linux/regulator/mt6323-regulator.h
486 @@ -0,0 +1,52 @@
487 +/*
488 + * Copyright (c) 2016 MediaTek Inc.
489 + * Author: Chen Zhong <chen.zhong@mediatek.com>
490 + *
491 + * This program is free software; you can redistribute it and/or modify
492 + * it under the terms of the GNU General Public License version 2 as
493 + * published by the Free Software Foundation.
494 + *
495 + * This program is distributed in the hope that it will be useful,
496 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
497 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
498 + * GNU General Public License for more details.
499 + */
500 +
501 +#ifndef __LINUX_REGULATOR_MT6323_H
502 +#define __LINUX_REGULATOR_MT6323_H
503 +
504 +enum {
505 +       MT6323_ID_VPROC = 0,
506 +       MT6323_ID_VSYS,
507 +       MT6323_ID_VPA,
508 +       MT6323_ID_VTCXO,
509 +       MT6323_ID_VCN28,
510 +       MT6323_ID_VCN33_BT,
511 +       MT6323_ID_VCN33_WIFI,
512 +       MT6323_ID_VA,
513 +       MT6323_ID_VCAMA,
514 +       MT6323_ID_VIO28 = 9,
515 +       MT6323_ID_VUSB,
516 +       MT6323_ID_VMC,
517 +       MT6323_ID_VMCH,
518 +       MT6323_ID_VEMC3V3,
519 +       MT6323_ID_VGP1,
520 +       MT6323_ID_VGP2,
521 +       MT6323_ID_VGP3,
522 +       MT6323_ID_VCN18,
523 +       MT6323_ID_VSIM1,
524 +       MT6323_ID_VSIM2,
525 +       MT6323_ID_VRTC,
526 +       MT6323_ID_VCAMAF,
527 +       MT6323_ID_VIBR,
528 +       MT6323_ID_VRF18,
529 +       MT6323_ID_VM,
530 +       MT6323_ID_VIO18,
531 +       MT6323_ID_VCAMD,
532 +       MT6323_ID_VCAMIO,
533 +       MT6323_ID_RG_MAX,
534 +};
535 +
536 +#define MT6323_MAX_REGULATOR   MT6323_ID_RG_MAX
537 +
538 +#endif /* __LINUX_REGULATOR_MT6323_H */