lantiq: Fixes to athxk EEPROM loading
[openwrt.git] / target / linux / lantiq / patches-3.7 / 0302-wifi-eep.patch
1 --- a/arch/mips/lantiq/xway/Makefile
2 +++ b/arch/mips/lantiq/xway/Makefile
3 @@ -1,3 +1,6 @@
4  obj-y := prom.o sysctrl.o clk.o reset.o dma.o timer.o dcdc.o
5  
6 +obj-y += eth_mac.o
7 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
8 +
9  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
10 --- /dev/null
11 +++ b/arch/mips/lantiq/xway/ath_eep.c
12 @@ -0,0 +1,195 @@
13 +/*
14 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
15 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
16 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
17 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
18 + *
19 + *  This program is free software; you can redistribute it and/or modify it
20 + *  under the terms of the GNU General Public License version 2 as published
21 + *  by the Free Software Foundation.
22 + */
23 +
24 +#include <linux/init.h>
25 +#include <linux/module.h>
26 +#include <linux/platform_device.h>
27 +#include <linux/etherdevice.h>
28 +#include <linux/ath5k_platform.h>
29 +#include <linux/ath9k_platform.h>
30 +#include <linux/pci.h>
31 +#include <pci-ath-fixup.h>
32 +
33 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
34 +struct ath5k_platform_data ath5k_pdata;
35 +struct ath9k_platform_data ath9k_pdata = {
36 +       .led_pin = -1,
37 +};
38 +static u8 athxk_eeprom_mac[6];
39 +
40 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
41 +{
42 +       dev->dev.platform_data = &ath9k_pdata;
43 +       return 0;
44 +}
45 +
46 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
47 +{
48 +       struct device_node *np = pdev->dev.of_node;
49 +       struct resource *eep_res, *mac_res;
50 +       void __iomem *eep, *mac;
51 +       int mac_offset;
52 +       u32 mac_inc = 0, pci_slot = 0;
53 +       int i;
54 +
55 +       eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
56 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
57 +
58 +       if (!eep_res) {
59 +               dev_err(&pdev->dev, "failed to load eeprom address\n");
60 +               return -ENODEV;
61 +       }
62 +       if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
63 +               dev_err(&pdev->dev, "eeprom has an invalid size\n");
64 +               return -EINVAL;
65 +       }
66 +
67 +       eep = ioremap(eep_res->start, resource_size(eep_res));
68 +       memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS << 1);
69 +
70 +       if (of_find_property(np, "ath,eep-swap", NULL))
71 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
72 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
73 +
74 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
75 +               ath9k_pdata.endian_check = true;
76 +
77 +               dev_info(&pdev->dev, "endian check enabled.\n");
78 +       }
79 +
80 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
81 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
82 +       } else if (mac_res) {
83 +               if (resource_size(mac_res) != 6) {
84 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
85 +                       return -EINVAL;
86 +               }
87 +               mac = ioremap(mac_res->start, resource_size(mac_res));
88 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
89 +       } else {
90 +               dev_warn(&pdev->dev, "using random mac\n");
91 +               random_ether_addr(athxk_eeprom_mac);
92 +       }
93 +
94 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
95 +               athxk_eeprom_mac[5] += mac_inc;
96 +
97 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
98 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
99 +
100 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
101 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
102 +
103 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
104 +       }
105 +
106 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
107 +
108 +       return 0;
109 +}
110 +
111 +static struct of_device_id ath9k_eeprom_ids[] = {
112 +       { .compatible = "ath9k,eeprom" },
113 +       { }
114 +};
115 +
116 +static struct platform_driver ath9k_eeprom_driver = {
117 +       .driver         = {
118 +               .name           = "ath9k,eeprom",
119 +               .owner  = THIS_MODULE,
120 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
121 +       },
122 +};
123 +
124 +static int __init of_ath9k_eeprom_init(void)
125 +{
126 +       return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
127 +}
128 +late_initcall(of_ath9k_eeprom_init);
129 +
130 +
131 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
132 +{
133 +       dev->dev.platform_data = &ath5k_pdata;
134 +       return 0;
135 +}
136 +
137 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
138 +{
139 +       struct device_node *np = pdev->dev.of_node;
140 +       struct resource *eep_res, *mac_res;
141 +       void __iomem *eep, *mac;
142 +       int mac_offset;
143 +       u32 mac_inc = 0;
144 +       int i;
145 +
146 +       eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
147 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
148 +
149 +       if (!eep_res) {
150 +               dev_err(&pdev->dev, "failed to load eeprom address\n");
151 +               return -ENODEV;
152 +       }
153 +       if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
154 +               dev_err(&pdev->dev, "eeprom has an invalid size\n");
155 +               return -EINVAL;
156 +       }
157 +
158 +       eep = ioremap(eep_res->start, resource_size(eep_res));
159 +       memcpy_fromio(ath5k_pdata.eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS << 1);
160 +
161 +       if (of_find_property(np, "ath,eep-swap", NULL))
162 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
163 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
164 +
165 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
166 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
167 +       } else if (mac_res) {
168 +               if (resource_size(mac_res) != 6) {
169 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
170 +                       return -EINVAL;
171 +               }
172 +               mac = ioremap(mac_res->start, resource_size(mac_res));
173 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
174 +       } else {
175 +               dev_warn(&pdev->dev, "using random mac\n");
176 +               random_ether_addr(athxk_eeprom_mac);
177 +       }
178 +
179 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
180 +               athxk_eeprom_mac[5] += mac_inc;
181 +
182 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
183 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
184 +
185 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
186 +
187 +       return 0;
188 +}
189 +
190 +static struct of_device_id ath5k_eeprom_ids[] = {
191 +       { .compatible = "ath5k,eeprom" },
192 +       { }
193 +};
194 +
195 +static struct platform_driver ath5k_eeprom_driver = {
196 +       .driver         = {
197 +               .name           = "ath5k,eeprom",
198 +               .owner  = THIS_MODULE,
199 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
200 +       },
201 +};
202 +
203 +static int __init of_ath5k_eeprom_init(void)
204 +{
205 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
206 +}
207 +late_initcall(of_ath5k_eeprom_init);
208 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
209 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
210 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
211  extern void ltq_pmu_enable(unsigned int module);
212  extern void ltq_pmu_disable(unsigned int module);
213  
214 +/* allow the ethernet driver to load a flash mapped mac addr */
215 +const u8* ltq_get_eth_mac(void);
216 +
217  #endif /* CONFIG_SOC_TYPE_XWAY */
218  #endif /* _LTQ_XWAY_H__ */
219 --- /dev/null
220 +++ b/arch/mips/lantiq/xway/eth_mac.c
221 @@ -0,0 +1,76 @@
222 +/*
223 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
224 + *
225 + *  This program is free software; you can redistribute it and/or modify it
226 + *  under the terms of the GNU General Public License version 2 as published
227 + *  by the Free Software Foundation.
228 + */
229 +
230 +#include <linux/init.h>
231 +#include <linux/module.h>
232 +#include <linux/of_platform.h>
233 +#include <linux/if_ether.h>
234 +
235 +static u8 eth_mac[6];
236 +static int eth_mac_set;
237 +
238 +const u8* ltq_get_eth_mac(void)
239 +{
240 +       return eth_mac;
241 +}
242 +
243 +static int __init setup_ethaddr(char *str)
244 +{
245 +       eth_mac_set = mac_pton(str, eth_mac);
246 +       return !eth_mac_set;
247 +}
248 +__setup("ethaddr=", setup_ethaddr);
249 +
250 +int __init of_eth_mac_probe(struct platform_device *pdev)
251 +{
252 +       struct device_node *np = pdev->dev.of_node;
253 +       struct resource *mac_res;
254 +       void __iomem *mac;
255 +       u32 mac_inc = 0;
256 +
257 +       if (eth_mac_set) {
258 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
259 +               return -EINVAL;
260 +       }
261 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
262 +
263 +       if (!mac_res) {
264 +               dev_err(&pdev->dev, "failed to load mac\n");
265 +               return -EINVAL;
266 +       }
267 +       if (resource_size(mac_res) != 6) {
268 +               dev_err(&pdev->dev, "mac has an invalid size\n");
269 +               return -EINVAL;
270 +       }
271 +       mac = ioremap(mac_res->start, resource_size(mac_res));
272 +       memcpy_fromio(eth_mac, mac, 6);
273 +
274 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
275 +               eth_mac[5] += mac_inc;
276 +
277 +       return 0;
278 +}
279 +
280 +static struct of_device_id eth_mac_ids[] = {
281 +       { .compatible = "lantiq,eth-mac" },
282 +       { /* sentinel */ }
283 +};
284 +
285 +static struct platform_driver eth_mac_driver = {
286 +       .driver         = {
287 +               .name           = "lantiq,eth-mac",
288 +               .owner  = THIS_MODULE,
289 +               .of_match_table = of_match_ptr(eth_mac_ids),
290 +       },
291 +};
292 +
293 +static int __init of_eth_mac_init(void)
294 +{
295 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
296 +}
297 +device_initcall(of_eth_mac_init);
298 --- a/drivers/net/ethernet/lantiq_etop.c
299 +++ b/drivers/net/ethernet/lantiq_etop.c
300 @@ -825,7 +825,8 @@ ltq_etop_init(struct net_device *dev)
301  
302         ltq_etop_change_mtu(dev, 1500);
303  
304 -       memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
305 +       if (priv->mac)
306 +               memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
307         if (!is_valid_ether_addr(mac.sa_data)) {
308                 pr_warn("etop: invalid MAC, using random\n");
309                 random_ether_addr(mac.sa_data);
310 @@ -949,7 +950,9 @@ ltq_etop_probe(struct platform_device *p
311         priv->tx_irq = irqres[0].start;
312         priv->rx_irq = irqres[1].start;
313         priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
314 -       priv->mac = of_get_mac_address(pdev->dev.of_node);
315 +       priv->mac = ltq_get_eth_mac();
316 +       if (!priv->mac)
317 +               priv->mac = of_get_mac_address(pdev->dev.of_node);
318  
319         priv->clk_ppe = clk_get(&pdev->dev, NULL);
320         if (IS_ERR(priv->clk_ppe))
321 --- /dev/null
322 +++ b/arch/mips/lantiq/xway/rt_eep.c
323 @@ -0,0 +1,60 @@
324 +/*
325 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
326 + *
327 + *  This program is free software; you can redistribute it and/or modify it
328 + *  under the terms of the GNU General Public License version 2 as published
329 + *  by the Free Software Foundation.
330 + */
331 +
332 +#include <linux/init.h>
333 +#include <linux/module.h>
334 +#include <linux/pci.h>
335 +#include <linux/platform_device.h>
336 +#include <linux/rt2x00_platform.h>
337 +
338 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
339 +static struct rt2x00_platform_data rt2x00_pdata;
340 +
341 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
342 +{
343 +       dev->dev.platform_data = &rt2x00_pdata;
344 +       return 0;
345 +}
346 +
347 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
348 +{
349 +       struct device_node *np = pdev->dev.of_node;
350 +       const char *eeprom;
351 +
352 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
353 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
354 +               return 0;
355 +       }
356 +
357 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
358 +//     rt2x00_pdata.mac_address = mac;
359 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
360 +
361 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
362 +
363 +       return 0;
364 +}
365 +
366 +static struct of_device_id ralink_eeprom_ids[] = {
367 +       { .compatible = "ralink,eeprom" },
368 +       { }
369 +};
370 +
371 +static struct platform_driver ralink_eeprom_driver = {
372 +       .driver         = {
373 +               .name           = "ralink,eeprom",
374 +               .owner  = THIS_MODULE,
375 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
376 +       },
377 +};
378 +
379 +static int __init of_ralink_eeprom_init(void)
380 +{
381 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
382 +}
383 +device_initcall(of_ralink_eeprom_init);
384 --- /dev/null
385 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
386 @@ -0,0 +1,6 @@
387 +#ifndef _PCI_ATH_FIXUP
388 +#define _PCI_ATH_FIXUP
389 +
390 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
391 +
392 +#endif /* _PCI_ATH_FIXUP */
393 --- /dev/null
394 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
395 @@ -0,0 +1,109 @@
396 +/*
397 + *  Atheros AP94 reference board PCI initialization
398 + *
399 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
400 + *
401 + *  This program is free software; you can redistribute it and/or modify it
402 + *  under the terms of the GNU General Public License version 2 as published
403 + *  by the Free Software Foundation.
404 + */
405 +
406 +#include <linux/pci.h>
407 +#include <linux/init.h>
408 +#include <linux/delay.h>
409 +#include <lantiq_soc.h>
410 +
411 +#define LTQ_PCI_MEM_BASE               0x18000000
412 +
413 +struct ath_fixup {
414 +       u16             *cal_data;
415 +       unsigned        slot;
416 +};
417 +
418 +static int ath_num_fixups;
419 +static struct ath_fixup ath_fixups[2];
420 +
421 +static void ath_pci_fixup(struct pci_dev *dev)
422 +{
423 +       void __iomem *mem;
424 +       u16 *cal_data = NULL;
425 +       u16 cmd;
426 +       u32 bar0;
427 +       u32 val;
428 +       unsigned i;
429 +
430 +       for (i = 0; i < ath_num_fixups; i++) {
431 +               if (ath_fixups[i].cal_data == NULL)
432 +                       continue;
433 +
434 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
435 +                       continue;
436 +
437 +               cal_data = ath_fixups[i].cal_data;
438 +               break;
439 +       }
440 +
441 +       if (cal_data == NULL)
442 +               return;
443 +
444 +       if (*cal_data != 0xa55a) {
445 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
446 +               return;
447 +       }
448 +
449 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
450 +
451 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
452 +       if (!mem) {
453 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
454 +               return;
455 +       }
456 +
457 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
458 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
459 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
460 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
461 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
462 +
463 +       /* set pointer to first reg address */
464 +       cal_data += 3;
465 +       while (*cal_data != 0xffff) {
466 +               u32 reg;
467 +               reg = *cal_data++;
468 +               val = *cal_data++;
469 +               val |= (*cal_data++) << 16;
470 +
471 +               ltq_w32(swab32(val), mem + reg);
472 +               udelay(100);
473 +       }
474 +
475 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
476 +       dev->vendor = val & 0xffff;
477 +       dev->device = (val >> 16) & 0xffff;
478 +
479 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
480 +       dev->revision = val & 0xff;
481 +       dev->class = val >> 8; /* upper 3 bytes */
482 +
483 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n", 
484 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
485 +
486 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
487 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
488 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
489 +
490 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
491 +
492 +       iounmap(mem);
493 +}
494 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
495 +
496 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
497 +{
498 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
499 +               return;
500 +
501 +       ath_fixups[ath_num_fixups].slot = slot;
502 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
503 +       ath_num_fixups++;
504 +}