firewall: update to git head
[openwrt.git] / target / linux / lantiq / patches-3.7 / 0112-MTD-lantiq-xway-fix-NAND-reset-timeout-handling.patch
1 From d8d9b9055d704d6f84ef6346d6826b8a9640f209 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 22 Oct 2012 10:25:39 +0200
4 Subject: [PATCH 112/123] MTD: lantiq: xway: fix NAND reset timeout handling
5
6 Fixes a possible deadlock in the code that resets the NAND flash.
7
8 http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html
9
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12  drivers/mtd/nand/xway_nand.c |   12 ++++++++++--
13  1 file changed, 10 insertions(+), 2 deletions(-)
14
15 --- a/drivers/mtd/nand/xway_nand.c
16 +++ b/drivers/mtd/nand/xway_nand.c
17 @@ -58,15 +58,23 @@ static void xway_reset_chip(struct nand_
18  {
19         unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
20         unsigned long flags;
21 +       unsigned long timeout;
22  
23         nandaddr &= ~NAND_WRITE_ADDR;
24         nandaddr |= NAND_WRITE_CMD;
25  
26         /* finish with a reset */
27 +       timeout = jiffies + msecs_to_jiffies(200);
28 +
29         spin_lock_irqsave(&ebu_lock, flags);
30 +
31         writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr);
32 -       while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
33 -               ;
34 +       do {
35 +               if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
36 +                       break;
37 +               cond_resched();
38 +       } while (!time_after_eq(jiffies, timeout));
39 +
40         spin_unlock_irqrestore(&ebu_lock, flags);
41  }
42