target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch

   1 --- /dev/null
   2 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
   3 @@ -0,0 +1,45 @@
   4 +/*
   5 + *  This program is free software; you can redistribute it and/or modify it
   6 + *  under the terms of the GNU General Public License version 2 as published
   7 + *  by the Free Software Foundation.
   8 + *
   9 + *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  10 + */
  11 +
  12 +#ifndef _LTQ_FALCON_H__
  13 +#define _LTQ_FALCON_H__
  14 +
  15 +#ifdef CONFIG_SOC_FALCON
  16 +
  17 +#include <lantiq.h>
  18 +
  19 +/* Chip IDs */
  20 +#define SOC_ID_FALCON          0x01B8
  21 +
  22 +/* SoC Types */
  23 +#define SOC_TYPE_FALCON                0x01
  24 +
  25 +/* ASC0/1 - serial port */
  26 +#define LTQ_ASC0_BASE_ADDR     0x1E100C00
  27 +#define LTQ_ASC1_BASE_ADDR     0x1E100B00
  28 +#define LTQ_ASC_SIZE           0x100
  29 +
  30 +#define LTQ_ASC_TIR(x)          (INT_NUM_IM3_IRL0 + (x * 8))
  31 +#define LTQ_ASC_RIR(x)          (INT_NUM_IM3_IRL0 + (x * 8) + 1)
  32 +#define LTQ_ASC_EIR(x)          (INT_NUM_IM3_IRL0 + (x * 8) + 2)
  33 +
  34 +/* ICU - interrupt control unit */
  35 +#define LTQ_ICU_BASE_ADDR      0x1F880200
  36 +#define LTQ_ICU_SIZE           0x100
  37 +
  38 +/* WDT */
  39 +#define LTQ_WDT_BASE_ADDR      0x1F8803F0
  40 +#define LTQ_WDT_SIZE           0x10
  41 +
  42 +extern int ltq_gpio_request(unsigned int pin, unsigned int alt0,
  43 +                          unsigned int alt1, unsigned int dir,
  44 +                          const char *name);
  45 +extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
  46 +
  47 +#endif /* CONFIG_SOC_FALCON */
  48 +#endif /* _LTQ_XWAY_H__ */