target/linux/lantiq/patches-3.0/0011-MIPS-lantiq-adds-falcon-I2C.patch

   1 From 6437f41dfdf9475178e22ab0dd886af033f90cc2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 29 Sep 2011 21:10:16 +0200
   4 Subject: [PATCH 11/24] MIPS: lantiq: adds falcon I2C
   5
   6 ---
   7  arch/mips/lantiq/falcon/devices.c |   21 +
   8  arch/mips/lantiq/falcon/devices.h |    1 +
   9  drivers/i2c/busses/Kconfig        |    4 +
  10  drivers/i2c/busses/Makefile       |    1 +
  11  drivers/i2c/busses/i2c-falcon.c   |  815 +++++++++++++++++++++++++++++++++++++
  12  5 files changed, 842 insertions(+), 0 deletions(-)
  13  create mode 100644 drivers/i2c/busses/i2c-falcon.c
  14
  15 diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c
  16 index 4f47b44..a998b6b 100644
  17 --- a/arch/mips/lantiq/falcon/devices.c
  18 +++ b/arch/mips/lantiq/falcon/devices.c
  19 @@ -126,3 +126,24 @@ falcon_register_gpio_extra(void)
  20         ltq_sysctl_activate(SYSCTL_SYS1,
  21                 ACTS_PADCTRL3 | ACTS_PADCTRL4 | ACTS_P3 | ACTS_P4);
  22  }
  23 +
  24 +/* i2c */
  25 +static struct resource falcon_i2c_resources[] = {
  26 +       MEM_RES("i2c", GPON_I2C_BASE,GPON_I2C_END),
  27 +       IRQ_RES("i2c_lb", FALCON_IRQ_I2C_LBREQ),
  28 +       IRQ_RES("i2c_b", FALCON_IRQ_I2C_BREQ),
  29 +       IRQ_RES("i2c_err", FALCON_IRQ_I2C_I2C_ERR),
  30 +       IRQ_RES("i2c_p", FALCON_IRQ_I2C_I2C_P),
  31 +};
  32 +
  33 +void __init falcon_register_i2c(void)
  34 +{
  35 +       platform_device_register_simple("i2c-falcon", 0,
  36 +       falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources));
  37 +       sys1_hw_activate(ACTS_I2C_ACT);
  38 +}
  39 +
  40 +void __init falcon_register_crypto(void)
  41 +{
  42 +       platform_device_register_simple("ltq_falcon_deu", 0, NULL, 0);
  43 +}
  44 diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h
  45 index 18be8b6..2fdcb08 100644
  46 --- a/arch/mips/lantiq/falcon/devices.h
  47 +++ b/arch/mips/lantiq/falcon/devices.h
  48 @@ -16,5 +16,6 @@
  49  extern void falcon_register_nand(void);
  50  extern void falcon_register_gpio(void);
  51  extern void falcon_register_gpio_extra(void);
  52 +extern void falcon_register_i2c(void);
  53
  54  #endif
  55 diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
  56 index 646068e..e6c3ab6 100644
  57 --- a/drivers/i2c/busses/Kconfig
  58 +++ b/drivers/i2c/busses/Kconfig
  59 @@ -284,6 +284,10 @@ config I2C_POWERMAC
  60
  61  comment "I2C system bus drivers (mostly embedded / system-on-chip)"
  62
  63 +config I2C_FALCON
  64 +       tristate "Falcon I2C interface"
  65 +#      depends on SOC_FALCON
  66 +
  67  config I2C_AT91
  68         tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
  69         depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
  70 diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
  71 index e6cf294..83e9250 100644
  72 --- a/drivers/i2c/busses/Makefile
  73 +++ b/drivers/i2c/busses/Makefile
  74 @@ -82,5 +82,6 @@ obj-$(CONFIG_I2C_SIBYTE)      += i2c-sibyte.o
  75  obj-$(CONFIG_I2C_STUB)         += i2c-stub.o
  76  obj-$(CONFIG_SCx200_ACB)       += scx200_acb.o
  77  obj-$(CONFIG_SCx200_I2C)       += scx200_i2c.o
  78 +obj-$(CONFIG_I2C_FALCON)       += i2c-falcon.o
  79
  80  ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
  81 diff --git a/drivers/i2c/busses/i2c-falcon.c b/drivers/i2c/busses/i2c-falcon.c
  82 new file mode 100644
  83 index 0000000..7bb1253
  84 --- /dev/null
  85 +++ b/drivers/i2c/busses/i2c-falcon.c
  86 @@ -0,0 +1,815 @@
  87 +/*
  88 + * Lantiq FALC(tm) ON - I2C bus adapter
  89 + *
  90 + * Parts based on i2c-designware.c and other i2c drivers from Linux 2.6.33
  91 + *
  92 + * This program is free software; you can redistribute it and/or modify
  93 + * it under the terms of the GNU General Public License as published by
  94 + * the Free Software Foundation; either version 2 of the License, or
  95 + * (at your option) any later version.
  96 + *
  97 + * This program is distributed in the hope that it will be useful,
  98 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  99 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 100 + * GNU General Public License for more details.
 101 + *
 102 + * You should have received a copy of the GNU General Public License
 103 + * along with this program; if not, write to the Free Software
 104 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 105 + */
 106 +
 107 +/* #define DEBUG */
 108 +
 109 +#include <linux/kernel.h>
 110 +#include <linux/module.h>
 111 +#include <linux/delay.h>
 112 +#include <linux/slab.h> /* for kzalloc, kfree */
 113 +#include <linux/i2c.h>
 114 +#include <linux/clk.h>
 115 +#include <linux/errno.h>
 116 +#include <linux/sched.h>
 117 +#include <linux/err.h>
 118 +#include <linux/interrupt.h>
 119 +#include <linux/platform_device.h>
 120 +#include <linux/io.h>
 121 +#include <linux/gpio.h>
 122 +
 123 +#include <falcon/lantiq_soc.h>
 124 +
 125 +/* CURRENT ISSUES:
 126 + * - no high speed support
 127 + * - supports only master mode
 128 + * - ten bit mode is not tested (no slave devices)
 129 + */
 130 +
 131 +/* mapping for access macros */
 132 +#define reg_r32(reg)           __raw_readl(reg)
 133 +#define reg_w32(val, reg)      __raw_writel(val, reg)
 134 +#define reg_w32_mask(clear, set, reg)  \
 135 +                               reg_w32((reg_r32(reg) & ~(clear)) | (set), reg)
 136 +#define reg_r32_table(reg, idx) reg_r32(&((uint32_t *)&reg)[idx])
 137 +#define reg_w32_table(val, reg, idx) reg_w32(val, &((uint32_t *)&reg)[idx])
 138 +#define i2c    (priv->membase)
 139 +#include <falcon/i2c_reg.h>
 140 +
 141 +#define DRV_NAME "i2c-falcon"
 142 +#define DRV_VERSION "1.01"
 143 +
 144 +#define FALCON_I2C_BUSY_TIMEOUT                20 /* ms */
 145 +
 146 +#ifdef DEBUG
 147 +#define FALCON_I2C_XFER_TIMEOUT                25*HZ
 148 +#else
 149 +#define FALCON_I2C_XFER_TIMEOUT                HZ
 150 +#endif
 151 +#if defined(DEBUG) && 0
 152 +#define PRINTK(arg...) printk(arg)
 153 +#else
 154 +#define PRINTK(arg...) do {} while (0)
 155 +#endif
 156 +
 157 +#define FALCON_I2C_IMSC_DEFAULT_MASK   (I2C_IMSC_I2C_P_INT_EN | \
 158 +                                        I2C_IMSC_I2C_ERR_INT_EN)
 159 +
 160 +#define FALCON_I2C_ARB_LOST    (1 << 0)
 161 +#define FALCON_I2C_NACK                (1 << 1)
 162 +#define FALCON_I2C_RX_UFL      (1 << 2)
 163 +#define FALCON_I2C_RX_OFL      (1 << 3)
 164 +#define FALCON_I2C_TX_UFL      (1 << 4)
 165 +#define FALCON_I2C_TX_OFL      (1 << 5)
 166 +
 167 +struct falcon_i2c {
 168 +       struct mutex mutex;
 169 +
 170 +       enum {
 171 +               FALCON_I2C_MODE_100     = 1,
 172 +               FALCON_I2C_MODE_400     = 2,
 173 +               FALCON_I2C_MODE_3400    = 3
 174 +       } mode;                         /* current speed mode */
 175 +
 176 +       struct clk *clk;                /* clock input for i2c hardware block */
 177 +       struct gpon_reg_i2c __iomem *membase;   /* base of mapped registers */
 178 +       int irq_lb, irq_b, irq_err, irq_p;      /* last burst, burst, error,
 179 +                                                  protocol IRQs */
 180 +
 181 +       struct i2c_adapter adap;
 182 +       struct device *dev;
 183 +
 184 +       struct completion       cmd_complete;
 185 +
 186 +       /* message transfer data */
 187 +       /* current message */
 188 +       struct i2c_msg          *current_msg;
 189 +       /* number of messages to handle */
 190 +       int                     msgs_num;
 191 +       /* current buffer */
 192 +       u8                      *msg_buf;
 193 +       /* remaining length of current buffer */
 194 +       u32                     msg_buf_len;
 195 +       /* error status of the current transfer */
 196 +       int                     msg_err;
 197 +
 198 +       /* master status codes */
 199 +       enum {
 200 +               STATUS_IDLE,
 201 +               STATUS_ADDR,    /* address phase */
 202 +               STATUS_WRITE,
 203 +               STATUS_READ,
 204 +               STATUS_READ_END,
 205 +               STATUS_STOP
 206 +       } status;
 207 +};
 208 +
 209 +static irqreturn_t falcon_i2c_isr(int irq, void *dev_id);
 210 +
 211 +static inline void enable_burst_irq(struct falcon_i2c *priv)
 212 +{
 213 +       i2c_w32_mask(0, I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, imsc);
 214 +}
 215 +static inline void disable_burst_irq(struct falcon_i2c *priv)
 216 +{
 217 +       i2c_w32_mask(I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, 0, imsc);
 218 +}
 219 +
 220 +static void prepare_msg_send_addr(struct falcon_i2c *priv)
 221 +{
 222 +       struct i2c_msg *msg = priv->current_msg;
 223 +       int rd = !!(msg->flags & I2C_M_RD);     /* extends to 0 or 1 */
 224 +       u16 addr = msg->addr;
 225 +
 226 +       /* new i2c_msg */
 227 +       priv->msg_buf = msg->buf;
 228 +       priv->msg_buf_len = msg->len;
 229 +       if (rd)
 230 +               priv->status = STATUS_READ;
 231 +       else
 232 +               priv->status = STATUS_WRITE;
 233 +
 234 +       /* send slave address */
 235 +       if (msg->flags & I2C_M_TEN) {
 236 +               i2c_w32(0xf0 | ((addr & 0x300) >> 7) | rd, txd);
 237 +               i2c_w32(addr & 0xff, txd);
 238 +       } else
 239 +               i2c_w32((addr & 0x7f) << 1 | rd, txd);
 240 +}
 241 +
 242 +static void set_tx_len(struct falcon_i2c *priv)
 243 +{
 244 +       struct i2c_msg *msg = priv->current_msg;
 245 +       int len = (msg->flags & I2C_M_TEN) ? 2 : 1;
 246 +
 247 +       PRINTK("set_tx_len %cX\n", (msg->flags & I2C_M_RD)?'R':'T');
 248 +
 249 +       priv->status = STATUS_ADDR;
 250 +
 251 +       if (!(msg->flags & I2C_M_RD)) {
 252 +               len += msg->len;
 253 +       } else {
 254 +               /* set maximum received packet size (before rx int!) */
 255 +               i2c_w32(msg->len, mrps_ctrl);
 256 +       }
 257 +       i2c_w32(len, tps_ctrl);
 258 +       enable_burst_irq(priv);
 259 +}
 260 +
 261 +static int falcon_i2c_hw_init(struct i2c_adapter *adap)
 262 +{
 263 +       struct falcon_i2c *priv = i2c_get_adapdata(adap);
 264 +
 265 +       /* disable bus */
 266 +       i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl);
 267 +
 268 +#ifndef DEBUG
 269 +       /* set normal operation clock divider */
 270 +       i2c_w32(1 << I2C_CLC_RMC_OFFSET, clc);
 271 +#else
 272 +       /* for debugging a higher divider value! */
 273 +       i2c_w32(0xF0 << I2C_CLC_RMC_OFFSET, clc);
 274 +#endif
 275 +
 276 +       /* set frequency */
 277 +       if (priv->mode == FALCON_I2C_MODE_100) {
 278 +               dev_dbg(priv->dev, "set standard mode (100 kHz)\n");
 279 +               i2c_w32(0, fdiv_high_cfg);
 280 +               i2c_w32((1 << I2C_FDIV_CFG_INC_OFFSET) |
 281 +                       (499 << I2C_FDIV_CFG_DEC_OFFSET),
 282 +                       fdiv_cfg);
 283 +       } else if (priv->mode == FALCON_I2C_MODE_400) {
 284 +               dev_dbg(priv->dev, "set fast mode (400 kHz)\n");
 285 +               i2c_w32(0, fdiv_high_cfg);
 286 +               i2c_w32((1 << I2C_FDIV_CFG_INC_OFFSET) |
 287 +                       (124 << I2C_FDIV_CFG_DEC_OFFSET),
 288 +                       fdiv_cfg);
 289 +       } else if (priv->mode == FALCON_I2C_MODE_3400) {
 290 +               dev_dbg(priv->dev, "set high mode (3.4 MHz)\n");
 291 +               i2c_w32(0, fdiv_cfg);
 292 +               /* TODO recalculate value for 100MHz input */
 293 +               i2c_w32((41 << I2C_FDIV_HIGH_CFG_INC_OFFSET) |
 294 +                       (152 << I2C_FDIV_HIGH_CFG_DEC_OFFSET),
 295 +                       fdiv_high_cfg);
 296 +       } else {
 297 +               dev_warn(priv->dev, "unknown mode\n");
 298 +               return -ENODEV;
 299 +       }
 300 +
 301 +       /* configure fifo */
 302 +       i2c_w32(I2C_FIFO_CFG_TXFC | /* tx fifo as flow controller */
 303 +               I2C_FIFO_CFG_RXFC | /* rx fifo as flow controller */
 304 +               I2C_FIFO_CFG_TXFA_TXFA2 | /* tx fifo 4-byte aligned */
 305 +               I2C_FIFO_CFG_RXFA_RXFA2 | /* rx fifo 4-byte aligned */
 306 +               I2C_FIFO_CFG_TXBS_TXBS0 | /* tx fifo burst size is 1 word */
 307 +               I2C_FIFO_CFG_RXBS_RXBS0,  /* rx fifo burst size is 1 word */
 308 +               fifo_cfg);
 309 +
 310 +       /* configure address */
 311 +       i2c_w32(I2C_ADDR_CFG_SOPE_EN |  /* generate stop when no more data in the
 312 +                                          fifo */
 313 +               I2C_ADDR_CFG_SONA_EN |  /* generate stop when NA received */
 314 +               I2C_ADDR_CFG_MnS_EN |   /* we are master device */
 315 +               0,                      /* our slave address (not used!) */
 316 +               addr_cfg);
 317 +
 318 +       /* enable bus */
 319 +       i2c_w32_mask(0, I2C_RUN_CTRL_RUN_EN, run_ctrl);
 320 +
 321 +       return 0;
 322 +}
 323 +
 324 +static int falcon_i2c_wait_bus_not_busy(struct falcon_i2c *priv)
 325 +{
 326 +       int timeout = FALCON_I2C_BUSY_TIMEOUT;
 327 +
 328 +       while ((i2c_r32(bus_stat) & I2C_BUS_STAT_BS_MASK)
 329 +                                != I2C_BUS_STAT_BS_FREE) {
 330 +               if (timeout <= 0) {
 331 +                       dev_warn(priv->dev, "timeout waiting for bus ready\n");
 332 +                       return -ETIMEDOUT;
 333 +               }
 334 +               timeout--;
 335 +               mdelay(1);
 336 +       }
 337 +
 338 +       return 0;
 339 +}
 340 +
 341 +static void falcon_i2c_tx(struct falcon_i2c *priv, int last)
 342 +{
 343 +       if (priv->msg_buf_len && priv->msg_buf) {
 344 +               i2c_w32(*priv->msg_buf, txd);
 345 +
 346 +               if (--priv->msg_buf_len)
 347 +                       priv->msg_buf++;
 348 +               else
 349 +                       priv->msg_buf = NULL;
 350 +       } else
 351 +               last = 1;
 352 +
 353 +       if (last) {
 354 +               disable_burst_irq(priv);
 355 +       }
 356 +}
 357 +
 358 +static void falcon_i2c_rx(struct falcon_i2c *priv, int last)
 359 +{
 360 +       u32 fifo_stat,timeout;
 361 +       if (priv->msg_buf_len && priv->msg_buf) {
 362 +               timeout = 5000000;
 363 +               do {
 364 +                       fifo_stat = i2c_r32(ffs_stat);
 365 +               } while (!fifo_stat && --timeout);
 366 +               if (!timeout) {
 367 +                       last = 1;
 368 +                       PRINTK("\nrx timeout\n");
 369 +                       goto err;
 370 +               }
 371 +               while (fifo_stat) {
 372 +                       *priv->msg_buf = i2c_r32(rxd);
 373 +                       if (--priv->msg_buf_len)
 374 +                               priv->msg_buf++;
 375 +                       else {
 376 +                               priv->msg_buf = NULL;
 377 +                               last = 1;
 378 +                               break;
 379 +                       }
 380 +                       #if 0
 381 +                       fifo_stat = i2c_r32(ffs_stat);
 382 +                       #else
 383 +                       /* do not read more than burst size, otherwise no "last
 384 +                       burst" is generated and the transaction is blocked! */
 385 +                       fifo_stat = 0;
 386 +                       #endif
 387 +               }
 388 +       } else {
 389 +               last = 1;
 390 +       }
 391 +err:
 392 +       if (last) {
 393 +               disable_burst_irq(priv);
 394 +
 395 +               if (priv->status == STATUS_READ_END) {
 396 +                       /* do the STATUS_STOP and complete() here, as sometimes
 397 +                          the tx_end is already seen before this is finished */
 398 +                       priv->status = STATUS_STOP;
 399 +                       complete(&priv->cmd_complete);
 400 +               } else {
 401 +                       i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl);
 402 +                       priv->status = STATUS_READ_END;
 403 +               }
 404 +       }
 405 +}
 406 +
 407 +static void falcon_i2c_xfer_init(struct falcon_i2c *priv)
 408 +{
 409 +       /* enable interrupts */
 410 +       i2c_w32(FALCON_I2C_IMSC_DEFAULT_MASK, imsc);
 411 +
 412 +       /* trigger transfer of first msg */
 413 +       set_tx_len(priv);
 414 +}
 415 +
 416 +static void dump_msgs(struct i2c_msg msgs[], int num, int rx)
 417 +{
 418 +#if defined(DEBUG)
 419 +       int i, j;
 420 +       printk("Messages %d %s\n", num, rx ? "out" : "in");
 421 +       for (i = 0; i < num; i++) {
 422 +               printk("%2d %cX Msg(%d) addr=0x%X: ", i,
 423 +                       (msgs[i].flags & I2C_M_RD)?'R':'T',
 424 +                       msgs[i].len, msgs[i].addr);
 425 +               if (!(msgs[i].flags & I2C_M_RD) || rx) {
 426 +                       for (j = 0; j < msgs[i].len; j++)
 427 +                               printk("%02X ", msgs[i].buf[j]);
 428 +               }
 429 +               printk("\n");
 430 +       }
 431 +#endif
 432 +}
 433 +
 434 +static void falcon_i2c_release_bus(struct falcon_i2c *priv)
 435 +{
 436 +       if ((i2c_r32(bus_stat) & I2C_BUS_STAT_BS_MASK) == I2C_BUS_STAT_BS_BM)
 437 +               i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl);
 438 +}
 439 +
 440 +static int falcon_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
 441 +                          int num)
 442 +{
 443 +       struct falcon_i2c *priv = i2c_get_adapdata(adap);
 444 +       int ret;
 445 +
 446 +       dev_dbg(priv->dev, "xfer %u messages\n", num);
 447 +       dump_msgs(msgs, num, 0);
 448 +
 449 +       mutex_lock(&priv->mutex);
 450 +
 451 +       INIT_COMPLETION(priv->cmd_complete);
 452 +       priv->current_msg = msgs;
 453 +       priv->msgs_num = num;
 454 +       priv->msg_err = 0;
 455 +       priv->status = STATUS_IDLE;
 456 +
 457 +       /* wait for the bus to become ready */
 458 +       ret = falcon_i2c_wait_bus_not_busy(priv);
 459 +       if (ret)
 460 +               goto done;
 461 +
 462 +       while (priv->msgs_num) {
 463 +               /* start the transfers */
 464 +               falcon_i2c_xfer_init(priv);
 465 +
 466 +               /* wait for transfers to complete */
 467 +               ret = wait_for_completion_interruptible_timeout(
 468 +                       &priv->cmd_complete, FALCON_I2C_XFER_TIMEOUT);
 469 +               if (ret == 0) {
 470 +                       dev_err(priv->dev, "controller timed out\n");
 471 +                       falcon_i2c_hw_init(adap);
 472 +                       ret = -ETIMEDOUT;
 473 +                       goto done;
 474 +               } else if (ret < 0)
 475 +                       goto done;
 476 +
 477 +               if (priv->msg_err) {
 478 +                       if (priv->msg_err & FALCON_I2C_NACK)
 479 +                               ret = -ENXIO;
 480 +                       else
 481 +                               ret = -EREMOTEIO;
 482 +                       goto done;
 483 +               }
 484 +               if (--priv->msgs_num) {
 485 +                       priv->current_msg++;
 486 +               }
 487 +       }
 488 +       /* no error? */
 489 +       ret = num;
 490 +
 491 +done:
 492 +       falcon_i2c_release_bus(priv);
 493 +
 494 +       mutex_unlock(&priv->mutex);
 495 +
 496 +       if (ret>=0)
 497 +               dump_msgs(msgs, num, 1);
 498 +
 499 +       PRINTK("XFER ret %d\n", ret);
 500 +       return ret;
 501 +}
 502 +
 503 +static irqreturn_t falcon_i2c_isr_burst(int irq, void *dev_id)
 504 +{
 505 +       struct falcon_i2c *priv = dev_id;
 506 +       struct i2c_msg *msg = priv->current_msg;
 507 +       int last = (irq == priv->irq_lb);
 508 +
 509 +       if (last)
 510 +               PRINTK("LB ");
 511 +       else
 512 +               PRINTK("B ");
 513 +
 514 +       if (msg->flags & I2C_M_RD) {
 515 +               switch (priv->status) {
 516 +               case STATUS_ADDR:
 517 +                       PRINTK("X");
 518 +                       prepare_msg_send_addr(priv);
 519 +                       disable_burst_irq(priv);
 520 +                       break;
 521 +               case STATUS_READ:
 522 +               case STATUS_READ_END:
 523 +                       PRINTK("R");
 524 +                       falcon_i2c_rx(priv, last);
 525 +                       break;
 526 +               default:
 527 +                       disable_burst_irq(priv);
 528 +                       printk("Status R %d\n", priv->status);
 529 +                       break;
 530 +               }
 531 +       } else {
 532 +               switch (priv->status) {
 533 +               case STATUS_ADDR:
 534 +                       PRINTK("x");
 535 +                       prepare_msg_send_addr(priv);
 536 +                       break;
 537 +               case STATUS_WRITE:
 538 +                       PRINTK("w");
 539 +                       falcon_i2c_tx(priv, last);
 540 +                       break;
 541 +               default:
 542 +                       disable_burst_irq(priv);
 543 +                       printk("Status W %d\n", priv->status);
 544 +                       break;
 545 +               }
 546 +       }
 547 +
 548 +       i2c_w32(I2C_ICR_BREQ_INT_CLR | I2C_ICR_LBREQ_INT_CLR, icr);
 549 +       return IRQ_HANDLED;
 550 +}
 551 +
 552 +static void falcon_i2c_isr_prot(struct falcon_i2c *priv)
 553 +{
 554 +       u32 i_pro = i2c_r32(p_irqss);
 555 +
 556 +       PRINTK("i2c-p");
 557 +
 558 +       /* not acknowledge */
 559 +       if (i_pro & I2C_P_IRQSS_NACK) {
 560 +               priv->msg_err |= FALCON_I2C_NACK;
 561 +               PRINTK(" nack");
 562 +       }
 563 +
 564 +       /* arbitration lost */
 565 +       if (i_pro & I2C_P_IRQSS_AL) {
 566 +               priv->msg_err |= FALCON_I2C_ARB_LOST;
 567 +               PRINTK(" arb-lost");
 568 +       }
 569 +       /* tx -> rx switch */
 570 +       if (i_pro & I2C_P_IRQSS_RX)
 571 +               PRINTK(" rx");
 572 +
 573 +       /* tx end */
 574 +       if (i_pro & I2C_P_IRQSS_TX_END)
 575 +               PRINTK(" txend");
 576 +       PRINTK("\n");
 577 +
 578 +       if (!priv->msg_err) {
 579 +               /* tx -> rx switch */
 580 +               if (i_pro & I2C_P_IRQSS_RX) {
 581 +                       priv->status = STATUS_READ;
 582 +                       enable_burst_irq(priv);
 583 +               }
 584 +               if (i_pro & I2C_P_IRQSS_TX_END) {
 585 +                       if (priv->status == STATUS_READ)
 586 +                               priv->status = STATUS_READ_END;
 587 +                       else {
 588 +                               disable_burst_irq(priv);
 589 +                               priv->status = STATUS_STOP;
 590 +                       }
 591 +               }
 592 +       }
 593 +
 594 +       i2c_w32(i_pro, p_irqsc);
 595 +}
 596 +
 597 +static irqreturn_t falcon_i2c_isr(int irq, void *dev_id)
 598 +{
 599 +       u32 i_raw, i_err=0;
 600 +       struct falcon_i2c *priv = dev_id;
 601 +
 602 +       i_raw = i2c_r32(mis);
 603 +       PRINTK("i_raw 0x%08X\n", i_raw);
 604 +
 605 +       /* error interrupt */
 606 +       if (i_raw & I2C_RIS_I2C_ERR_INT_INTOCC) {
 607 +               i_err = i2c_r32(err_irqss);
 608 +               PRINTK("i_err 0x%08X bus_stat 0x%04X\n",
 609 +                       i_err, i2c_r32(bus_stat));
 610 +
 611 +               /* tx fifo overflow (8) */
 612 +               if (i_err & I2C_ERR_IRQSS_TXF_OFL)
 613 +                       priv->msg_err |= FALCON_I2C_TX_OFL;
 614 +
 615 +               /* tx fifo underflow (4) */
 616 +               if (i_err & I2C_ERR_IRQSS_TXF_UFL)
 617 +                       priv->msg_err |= FALCON_I2C_TX_UFL;
 618 +
 619 +               /* rx fifo overflow (2) */
 620 +               if (i_err & I2C_ERR_IRQSS_RXF_OFL)
 621 +                       priv->msg_err |= FALCON_I2C_RX_OFL;
 622 +
 623 +               /* rx fifo underflow (1) */
 624 +               if (i_err & I2C_ERR_IRQSS_RXF_UFL)
 625 +                       priv->msg_err |= FALCON_I2C_RX_UFL;
 626 +
 627 +               i2c_w32(i_err, err_irqsc);
 628 +       }
 629 +
 630 +       /* protocol interrupt */
 631 +       if (i_raw & I2C_RIS_I2C_P_INT_INTOCC)
 632 +               falcon_i2c_isr_prot(priv);
 633 +
 634 +       if ((priv->msg_err) || (priv->status == STATUS_STOP))
 635 +               complete(&priv->cmd_complete);
 636 +
 637 +       return IRQ_HANDLED;
 638 +}
 639 +
 640 +static u32 falcon_i2c_functionality(struct i2c_adapter *adap)
 641 +{
 642 +       return  I2C_FUNC_I2C |
 643 +               I2C_FUNC_10BIT_ADDR |
 644 +               I2C_FUNC_SMBUS_EMUL;
 645 +}
 646 +
 647 +static struct i2c_algorithm falcon_i2c_algorithm = {
 648 +       .master_xfer    = falcon_i2c_xfer,
 649 +       .functionality  = falcon_i2c_functionality,
 650 +};
 651 +
 652 +static int __devinit falcon_i2c_probe(struct platform_device *pdev)
 653 +{
 654 +       int ret = 0;
 655 +       struct falcon_i2c *priv;
 656 +       struct i2c_adapter *adap;
 657 +       struct resource *mmres, *ioarea,
 658 +                       *irqres_lb, *irqres_b, *irqres_err, *irqres_p;
 659 +       struct clk *clk;
 660 +
 661 +       dev_dbg(&pdev->dev, "probing\n");
 662 +
 663 +       mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 664 +       irqres_lb = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 665 +                                                "i2c_lb");
 666 +       irqres_b = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "i2c_b");
 667 +       irqres_err = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 668 +                                                 "i2c_err");
 669 +       irqres_p = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "i2c_p");
 670 +
 671 +       if (!mmres || !irqres_lb || !irqres_b || !irqres_err || !irqres_p) {
 672 +               dev_err(&pdev->dev, "no resources\n");
 673 +               return -ENODEV;
 674 +       }
 675 +
 676 +       clk = clk_get(&pdev->dev, "fpi");
 677 +       if (IS_ERR(clk)) {
 678 +               dev_err(&pdev->dev, "failed to get fpi clk\n");
 679 +               return -ENOENT;
 680 +       }
 681 +
 682 +       if (clk_get_rate(clk) != 100000000) {
 683 +               dev_err(&pdev->dev, "input clock is not 100MHz\n");
 684 +               return -ENOENT;
 685 +       }
 686 +
 687 +       /* allocate private data */
 688 +       priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 689 +       if (!priv) {
 690 +               dev_err(&pdev->dev, "can't allocate private data\n");
 691 +               return -ENOMEM;
 692 +       }
 693 +
 694 +       adap = &priv->adap;
 695 +       i2c_set_adapdata(adap, priv);
 696 +       adap->owner = THIS_MODULE;
 697 +       adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 698 +       strlcpy(adap->name, DRV_NAME "-adapter", sizeof(adap->name));
 699 +       adap->algo = &falcon_i2c_algorithm;
 700 +
 701 +       priv->mode = FALCON_I2C_MODE_100;
 702 +       priv->clk = clk;
 703 +       priv->dev = &pdev->dev;
 704 +
 705 +       init_completion(&priv->cmd_complete);
 706 +       mutex_init(&priv->mutex);
 707 +
 708 +       ret = ltq_gpio_request(107, 0, 0, 0, DRV_NAME":sda");
 709 +       if (ret) {
 710 +               dev_err(&pdev->dev, "I2C gpio 107 (sda) not available\n");
 711 +               ret = -ENXIO;
 712 +               goto err_free_priv;
 713 +       }
 714 +       ret = ltq_gpio_request(108, 0, 0, 0, DRV_NAME":scl");
 715 +       if (ret) {
 716 +               gpio_free(107);
 717 +               dev_err(&pdev->dev, "I2C gpio 108 (scl) not available\n");
 718 +               ret = -ENXIO;
 719 +               goto err_free_priv;
 720 +       }
 721 +
 722 +       ioarea = request_mem_region(mmres->start, resource_size(mmres),
 723 +                                        pdev->name);
 724 +
 725 +       if (ioarea == NULL) {
 726 +               dev_err(&pdev->dev, "I2C region already claimed\n");
 727 +               ret = -ENXIO;
 728 +               goto err_free_gpio;
 729 +       }
 730 +
 731 +       /* map memory */
 732 +       priv->membase = ioremap_nocache(mmres->start & ~KSEG1,
 733 +               resource_size(mmres));
 734 +       if (priv->membase == NULL) {
 735 +               ret = -ENOMEM;
 736 +               goto err_release_region;
 737 +       }
 738 +
 739 +       priv->irq_lb = irqres_lb->start;
 740 +       ret = request_irq(priv->irq_lb, falcon_i2c_isr_burst, IRQF_DISABLED,
 741 +                         irqres_lb->name, priv);
 742 +       if (ret) {
 743 +               dev_err(&pdev->dev, "can't get last burst IRQ %d\n", irqres_lb->start);
 744 +               ret = -ENODEV;
 745 +               goto err_unmap_mem;
 746 +       }
 747 +
 748 +       priv->irq_b = irqres_b->start;
 749 +       ret = request_irq(priv->irq_b, falcon_i2c_isr_burst, IRQF_DISABLED,
 750 +                         irqres_b->name, priv);
 751 +       if (ret) {
 752 +               dev_err(&pdev->dev, "can't get burst IRQ %d\n", irqres_b->start);
 753 +               ret = -ENODEV;
 754 +               goto err_free_lb_irq;
 755 +       }
 756 +
 757 +       priv->irq_err = irqres_err->start;
 758 +       ret = request_irq(priv->irq_err, falcon_i2c_isr, IRQF_DISABLED,
 759 +                         irqres_err->name, priv);
 760 +       if (ret) {
 761 +               dev_err(&pdev->dev, "can't get error IRQ %d\n", irqres_err->start);
 762 +               ret = -ENODEV;
 763 +               goto err_free_b_irq;
 764 +       }
 765 +
 766 +       priv->irq_p = irqres_p->start;
 767 +       ret = request_irq(priv->irq_p, falcon_i2c_isr, IRQF_DISABLED,
 768 +                         irqres_p->name, priv);
 769 +       if (ret) {
 770 +               dev_err(&pdev->dev, "can't get protocol IRQ %d\n", irqres_p->start);
 771 +               ret = -ENODEV;
 772 +               goto err_free_err_irq;
 773 +       }
 774 +
 775 +       dev_dbg(&pdev->dev, "mapped io-space to %p\n", priv->membase);
 776 +       dev_dbg(&pdev->dev, "use IRQs %d, %d, %d, %d\n", irqres_lb->start,
 777 +           irqres_b->start, irqres_err->start, irqres_p->start);
 778 +
 779 +       /* add our adapter to the i2c stack */
 780 +       ret = i2c_add_numbered_adapter(adap);
 781 +       if (ret) {
 782 +               dev_err(&pdev->dev, "can't register I2C adapter\n");
 783 +               goto err_free_p_irq;
 784 +       }
 785 +
 786 +       platform_set_drvdata(pdev, priv);
 787 +       i2c_set_adapdata(adap, priv);
 788 +
 789 +       /* print module version information */
 790 +       dev_dbg(&pdev->dev, "module id=%u revision=%u\n",
 791 +               (i2c_r32(id) & I2C_ID_ID_MASK) >> I2C_ID_ID_OFFSET,
 792 +               (i2c_r32(id) & I2C_ID_REV_MASK) >> I2C_ID_REV_OFFSET);
 793 +
 794 +       /* initialize HW */
 795 +       ret = falcon_i2c_hw_init(adap);
 796 +       if (ret) {
 797 +               dev_err(&pdev->dev, "can't configure adapter\n");
 798 +               goto err_remove_adapter;
 799 +       }
 800 +
 801 +       dev_info(&pdev->dev, "version %s\n", DRV_VERSION);
 802 +
 803 +       return 0;
 804 +
 805 +err_remove_adapter:
 806 +       i2c_del_adapter(adap);
 807 +       platform_set_drvdata(pdev, NULL);
 808 +
 809 +err_free_p_irq:
 810 +       free_irq(priv->irq_p, priv);
 811 +
 812 +err_free_err_irq:
 813 +       free_irq(priv->irq_err, priv);
 814 +
 815 +err_free_b_irq:
 816 +       free_irq(priv->irq_b, priv);
 817 +
 818 +err_free_lb_irq:
 819 +       free_irq(priv->irq_lb, priv);
 820 +
 821 +err_unmap_mem:
 822 +       iounmap(priv->membase);
 823 +
 824 +err_release_region:
 825 +       release_mem_region(mmres->start, resource_size(mmres));
 826 +
 827 +err_free_gpio:
 828 +       gpio_free(108);
 829 +       gpio_free(107);
 830 +
 831 +err_free_priv:
 832 +       kfree(priv);
 833 +
 834 +       return ret;
 835 +}
 836 +
 837 +static int __devexit falcon_i2c_remove(struct platform_device *pdev)
 838 +{
 839 +       struct falcon_i2c *priv = platform_get_drvdata(pdev);
 840 +       struct resource *mmres;
 841 +
 842 +       /* disable bus */
 843 +       i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl);
 844 +
 845 +       /* remove driver */
 846 +       platform_set_drvdata(pdev, NULL);
 847 +       i2c_del_adapter(&priv->adap);
 848 +
 849 +       free_irq(priv->irq_lb, priv);
 850 +       free_irq(priv->irq_b, priv);
 851 +       free_irq(priv->irq_err, priv);
 852 +       free_irq(priv->irq_p, priv);
 853 +
 854 +       iounmap(priv->membase);
 855 +
 856 +       gpio_free(108);
 857 +       gpio_free(107);
 858 +
 859 +       kfree(priv);
 860 +
 861 +       mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 862 +       release_mem_region(mmres->start, resource_size(mmres));
 863 +
 864 +       dev_dbg(&pdev->dev, "removed\n");
 865 +
 866 +       return 0;
 867 +}
 868 +
 869 +static struct platform_driver falcon_i2c_driver = {
 870 +       .probe  = falcon_i2c_probe,
 871 +       .remove = __devexit_p(falcon_i2c_remove),
 872 +       .driver = {
 873 +               .name   = DRV_NAME,
 874 +               .owner  = THIS_MODULE,
 875 +       },
 876 +};
 877 +
 878 +static int __init falcon_i2c_init(void)
 879 +{
 880 +       int ret;
 881 +
 882 +       ret = platform_driver_register(&falcon_i2c_driver);
 883 +
 884 +       if (ret)
 885 +               pr_debug(DRV_NAME ": can't register platform driver\n");
 886 +
 887 +       return ret;
 888 +}
 889 +
 890 +static void __exit falcon_i2c_exit(void)
 891 +{
 892 +       platform_driver_unregister(&falcon_i2c_driver);
 893 +}
 894 +
 895 +module_init(falcon_i2c_init);
 896 +module_exit(falcon_i2c_exit);
 897 +
 898 +MODULE_DESCRIPTION("Lantiq FALC(tm) ON - I2C bus adapter");
 899 +MODULE_ALIAS("platform:" DRV_NAME);
 900 +MODULE_LICENSE("GPL");
 901 +MODULE_VERSION(DRV_VERSION);
 902 --
 903 1.7.5.4
 904