target/linux/lantiq/files-3.3/drivers/usb/ifxhcd/ifxusb_cif_h.c

   1 /*****************************************************************************
   2  **   FILE NAME       : ifxusb_cif_h.c
   3  **   PROJECT         : IFX USB sub-system V3
   4  **   MODULES         : IFX USB sub-system Host and Device driver
   5  **   SRC VERSION     : 1.0
   6  **   DATE            : 1/Jan/2009
   7  **   AUTHOR          : Chen, Howard
   8  **   DESCRIPTION     : The Core Interface provides basic services for accessing and
   9  **                     managing the IFX USB hardware. These services are used by the
  10  **                     Host Controller Driver only.
  11  *****************************************************************************/
  12
  13 /*!
  14  \file ifxusb_cif_h.c
  15  \ingroup IFXUSB_DRIVER_V3
  16  \brief This file contains the interface to the IFX USB Core.
  17 */
  18 #include <linux/version.h>
  19 #include "ifxusb_version.h"
  20
  21 #include <asm/byteorder.h>
  22 #include <asm/unaligned.h>
  23
  24 #ifdef __DEBUG__
  25         #include <linux/jiffies.h>
  26 #endif
  27 #include <linux/platform_device.h>
  28 #include <linux/kernel.h>
  29 #include <linux/ioport.h>
  30 #if defined(__UEIP__)
  31 //      #include <asm/ifx/ifx_board.h>
  32 #endif
  33
  34 //#include <asm/ifx/ifx_gpio.h>
  35 #if defined(__UEIP__)
  36 //      #include <asm/ifx/ifx_led.h>
  37 #endif
  38
  39 #include "ifxusb_plat.h"
  40 #include "ifxusb_regs.h"
  41 #include "ifxusb_cif.h"
  42
  43 #include "ifxhcd.h"
  44
  45 #if !defined(__UEIP__)
  46         #undef __USING_LED_AS_GPIO__
  47 #endif
  48
  49
  50 /*!
  51  \brief This function enables the Host mode interrupts.
  52  \param _core_if        Pointer of core_if structure
  53  */
  54 void ifxusb_host_enable_interrupts(ifxusb_core_if_t *_core_if)
  55 {
  56         gint_data_t intr_mask ={ .d32 = 0};
  57         ifxusb_core_global_regs_t *global_regs = _core_if->core_global_regs;
  58
  59         IFX_DEBUGPL(DBG_CIL, "%s()\n", __func__);
  60
  61         /* Clear any pending OTG Interrupts */
  62         ifxusb_wreg( &global_regs->gotgint, 0xFFFFFFFF);
  63
  64         /* Clear any pending interrupts */
  65         ifxusb_wreg( &global_regs->gintsts, 0xFFFFFFFF);
  66
  67         /* Enable the interrupts in the GINTMSK.*/
  68
  69         /* Common interrupts */
  70         intr_mask.b.modemismatch = 1;
  71         intr_mask.b.conidstschng = 1;
  72         intr_mask.b.wkupintr = 1;
  73         intr_mask.b.disconnect = 1;
  74         intr_mask.b.usbsuspend = 1;
  75
  76         /* Host interrupts */
  77         intr_mask.b.sofintr = 1;
  78         intr_mask.b.portintr = 1;
  79         intr_mask.b.hcintr = 1;
  80
  81         ifxusb_mreg( &global_regs->gintmsk, intr_mask.d32, intr_mask.d32);
  82         IFX_DEBUGPL(DBG_CIL, "%s() gintmsk=%0x\n", __func__, ifxusb_rreg( &global_regs->gintmsk));
  83 }
  84
  85 /*!
  86  \brief This function disables the Host mode interrupts.
  87  \param _core_if        Pointer of core_if structure
  88  */
  89 void ifxusb_host_disable_interrupts(ifxusb_core_if_t *_core_if)
  90 {
  91         ifxusb_core_global_regs_t *global_regs = _core_if->core_global_regs;
  92
  93         IFX_DEBUGPL(DBG_CILV, "%s()\n", __func__);
  94
  95         #if 1
  96                 ifxusb_wreg( &global_regs->gintmsk, 0);
  97         #else
  98                 /* Common interrupts */
  99                 {
 100                         gint_data_t intr_mask ={.d32 = 0};
 101                         intr_mask.b.modemismatch = 1;
 102                         intr_mask.b.rxstsqlvl = 1;
 103                         intr_mask.b.conidstschng = 1;
 104                         intr_mask.b.wkupintr = 1;
 105                         intr_mask.b.disconnect = 1;
 106                         intr_mask.b.usbsuspend = 1;
 107
 108                         /* Host interrupts */
 109                         intr_mask.b.sofintr = 1;
 110                         intr_mask.b.portintr = 1;
 111                         intr_mask.b.hcintr = 1;
 112                         intr_mask.b.ptxfempty = 1;
 113                         intr_mask.b.nptxfempty = 1;
 114                         ifxusb_mreg(&global_regs->gintmsk, intr_mask.d32, 0);
 115                 }
 116         #endif
 117 }
 118
 119 /*!
 120  \brief This function initializes the IFXUSB controller registers for  Host mode.
 121         This function flushes the Tx and Rx FIFOs and it flushes any entries in the
 122         request queues.
 123  \param _core_if        Pointer of core_if structure
 124  \param _params         parameters to be set
 125  */
 126 void ifxusb_host_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t  *_params)
 127 {
 128         ifxusb_core_global_regs_t *global_regs =  _core_if->core_global_regs;
 129
 130         gusbcfg_data_t usbcfg   ={.d32 = 0};
 131         gahbcfg_data_t ahbcfg   ={.d32 = 0};
 132         gotgctl_data_t gotgctl  ={.d32 = 0};
 133
 134         int i;
 135
 136         IFX_DEBUGPL(DBG_CILV, "%s(%p)\n",__func__,_core_if);
 137
 138         /* Copy Params */
 139
 140         _core_if->params.dma_burst_size      =  _params->dma_burst_size;
 141         _core_if->params.speed               =  _params->speed;
 142         _core_if->params.max_transfer_size   =  _params->max_transfer_size;
 143         _core_if->params.max_packet_count    =  _params->max_packet_count;
 144         _core_if->params.phy_utmi_width      =  _params->phy_utmi_width;
 145         _core_if->params.turn_around_time_hs =  _params->turn_around_time_hs;
 146         _core_if->params.turn_around_time_fs =  _params->turn_around_time_fs;
 147         _core_if->params.timeout_cal_hs      =  _params->timeout_cal_hs;
 148         _core_if->params.timeout_cal_fs      =  _params->timeout_cal_fs;
 149
 150         /* Reset the Controller */
 151         do
 152         {
 153                 while(ifxusb_core_soft_reset( _core_if ))
 154                         ifxusb_hard_reset(_core_if);
 155         } while (ifxusb_is_device_mode(_core_if));
 156
 157         usbcfg.d32 = ifxusb_rreg(&global_regs->gusbcfg);
 158 //      usbcfg.b.ulpi_ext_vbus_drv = 1;
 159         usbcfg.b.term_sel_dl_pulse = 0;
 160         ifxusb_wreg (&global_regs->gusbcfg, usbcfg.d32);
 161
 162         /* This programming sequence needs to happen in FS mode before any other
 163          * programming occurs */
 164         /* High speed PHY. */
 165         if (!_core_if->phy_init_done)
 166         {
 167                 _core_if->phy_init_done = 1;
 168                 /* HS PHY parameters.  These parameters are preserved
 169                  * during soft reset so only program the first time.  Do
 170                  * a soft reset immediately after setting phyif.  */
 171                 usbcfg.b.ulpi_utmi_sel = 0; //UTMI+
 172                 usbcfg.b.phyif = ( _core_if->params.phy_utmi_width == 16)?1:0;
 173                 ifxusb_wreg( &global_regs->gusbcfg, usbcfg.d32);
 174                 /* Reset after setting the PHY parameters */
 175                 ifxusb_core_soft_reset( _core_if );
 176         }
 177
 178         usbcfg.d32 = ifxusb_rreg(&global_regs->gusbcfg);
 179 //      usbcfg.b.ulpi_fsls = 0;
 180 //      usbcfg.b.ulpi_clk_sus_m = 0;
 181         ifxusb_wreg(&global_regs->gusbcfg, usbcfg.d32);
 182
 183         /* Program the GAHBCFG Register.*/
 184         switch (_core_if->params.dma_burst_size)
 185         {
 186                 case 0 :
 187                         ahbcfg.b.hburstlen = IFXUSB_GAHBCFG_INT_DMA_BURST_SINGLE;
 188                         break;
 189                 case 1 :
 190                         ahbcfg.b.hburstlen = IFXUSB_GAHBCFG_INT_DMA_BURST_INCR;
 191                         break;
 192                 case 4 :
 193                         ahbcfg.b.hburstlen = IFXUSB_GAHBCFG_INT_DMA_BURST_INCR4;
 194                         break;
 195                 case 8 :
 196                         ahbcfg.b.hburstlen = IFXUSB_GAHBCFG_INT_DMA_BURST_INCR8;
 197                         break;
 198                 case 16:
 199                         ahbcfg.b.hburstlen = IFXUSB_GAHBCFG_INT_DMA_BURST_INCR16;
 200                         break;
 201         }
 202         ahbcfg.b.dmaenable = 1;
 203         ifxusb_wreg(&global_regs->gahbcfg, ahbcfg.d32);
 204
 205         /* Program the GUSBCFG register. */
 206         usbcfg.d32 = ifxusb_rreg( &global_regs->gusbcfg );
 207         usbcfg.b.hnpcap = 0;
 208         usbcfg.b.srpcap = 0;
 209         ifxusb_wreg( &global_regs->gusbcfg, usbcfg.d32);
 210
 211         /* Restart the Phy Clock */
 212         ifxusb_wreg(_core_if->pcgcctl, 0);
 213
 214         /* Initialize Host Configuration Register */
 215         {
 216                 hcfg_data_t     hcfg;
 217                 hcfg.d32 = ifxusb_rreg(&_core_if->host_global_regs->hcfg);
 218                 hcfg.b.fslspclksel = IFXUSB_HCFG_30_60_MHZ;
 219                 if (_params->speed == IFXUSB_PARAM_SPEED_FULL)
 220                         hcfg.b.fslssupp = 1;
 221                 ifxusb_wreg(&_core_if->host_global_regs->hcfg, hcfg.d32);
 222         }
 223
 224         _core_if->params.host_channels=(_core_if->hwcfg2.b.num_host_chan + 1);
 225
 226         if(_params->host_channels>0 && _params->host_channels < _core_if->params.host_channels)
 227                 _core_if->params.host_channels = _params->host_channels;
 228
 229         /* Configure data FIFO sizes */
 230         _core_if->params.data_fifo_size     = _core_if->hwcfg3.b.dfifo_depth;
 231         _core_if->params.rx_fifo_size       = ifxusb_rreg(&global_regs->grxfsiz);
 232         _core_if->params.nperio_tx_fifo_size= ifxusb_rreg(&global_regs->gnptxfsiz) >> 16;
 233         _core_if->params.perio_tx_fifo_size = ifxusb_rreg(&global_regs->hptxfsiz) >> 16;
 234         IFX_DEBUGPL(DBG_CIL, "Initial: FIFO Size=0x%06X\n"   , _core_if->params.data_fifo_size);
 235         IFX_DEBUGPL(DBG_CIL, "           Rx FIFO Size=0x%06X\n", _core_if->params.rx_fifo_size);
 236         IFX_DEBUGPL(DBG_CIL, "         NPTx FIFO Size=0x%06X\n", _core_if->params.nperio_tx_fifo_size);
 237         IFX_DEBUGPL(DBG_CIL, "          PTx FIFO Size=0x%06X\n", _core_if->params.perio_tx_fifo_size);
 238
 239         {
 240                 fifosize_data_t txfifosize;
 241                 if(_params->data_fifo_size >=0 && _params->data_fifo_size < _core_if->params.data_fifo_size)
 242                         _core_if->params.data_fifo_size = _params->data_fifo_size;
 243
 244                 if( _params->rx_fifo_size >= 0 && _params->rx_fifo_size < _core_if->params.rx_fifo_size)
 245                         _core_if->params.rx_fifo_size = _params->rx_fifo_size;
 246                 if( _params->nperio_tx_fifo_size >=0 && _params->nperio_tx_fifo_size < _core_if->params.nperio_tx_fifo_size)
 247                         _core_if->params.nperio_tx_fifo_size = _params->nperio_tx_fifo_size;
 248                 if( _params->perio_tx_fifo_size >=0 && _params->perio_tx_fifo_size < _core_if->params.perio_tx_fifo_size)
 249                         _core_if->params.perio_tx_fifo_size = _params->perio_tx_fifo_size;
 250
 251                 if(_core_if->params.data_fifo_size < _core_if->params.rx_fifo_size)
 252                         _core_if->params.rx_fifo_size = _core_if->params.data_fifo_size;
 253                 ifxusb_wreg( &global_regs->grxfsiz, _core_if->params.rx_fifo_size);
 254                 txfifosize.b.startaddr = _core_if->params.rx_fifo_size;
 255
 256                 if(txfifosize.b.startaddr + _core_if->params.nperio_tx_fifo_size > _core_if->params.data_fifo_size)
 257                         _core_if->params.nperio_tx_fifo_size = _core_if->params.data_fifo_size - txfifosize.b.startaddr;
 258                 txfifosize.b.depth=_core_if->params.nperio_tx_fifo_size;
 259                 ifxusb_wreg( &global_regs->gnptxfsiz, txfifosize.d32);
 260                 txfifosize.b.startaddr += _core_if->params.nperio_tx_fifo_size;
 261
 262                 if(txfifosize.b.startaddr + _core_if->params.perio_tx_fifo_size > _core_if->params.data_fifo_size)
 263                         _core_if->params.perio_tx_fifo_size = _core_if->params.data_fifo_size - txfifosize.b.startaddr;
 264                 txfifosize.b.depth=_core_if->params.perio_tx_fifo_size;
 265                 ifxusb_wreg( &global_regs->hptxfsiz, txfifosize.d32);
 266                 txfifosize.b.startaddr += _core_if->params.perio_tx_fifo_size;
 267         }
 268
 269         #ifdef __DEBUG__
 270         {
 271                 fifosize_data_t fifosize;
 272                 IFX_DEBUGPL(DBG_CIL, "Result : FIFO Size=0x%06X\n"   , _core_if->params.data_fifo_size);
 273
 274                 fifosize.d32=ifxusb_rreg(&global_regs->grxfsiz);
 275                 IFX_DEBUGPL(DBG_CIL, "         Rx FIFO =0x%06X 0x%06X\n", fifosize.b.startaddr,fifosize.b.depth);
 276                 fifosize.d32=ifxusb_rreg(&global_regs->gnptxfsiz);
 277                 IFX_DEBUGPL(DBG_CIL, "         NPTx FIFO =0x%06X 0x%06X\n", fifosize.b.startaddr,fifosize.b.depth);
 278                 fifosize.d32=ifxusb_rreg(&global_regs->hptxfsiz);
 279                 IFX_DEBUGPL(DBG_CIL, "          PTx FIFO =0x%06X 0x%06X\n", fifosize.b.startaddr,fifosize.b.depth);
 280         }
 281         #endif
 282
 283         /* Clear Host Set HNP Enable in the OTG Control Register */
 284         gotgctl.b.hstsethnpen = 1;
 285         ifxusb_mreg( &global_regs->gotgctl, gotgctl.d32, 0);
 286
 287         /* Flush the FIFOs */
 288         ifxusb_flush_tx_fifo(_core_if, 0x10);  /* all Tx FIFOs */
 289         ifxusb_flush_rx_fifo(_core_if);
 290
 291         for (i = 0; i < _core_if->hwcfg2.b.num_host_chan + 1; i++)
 292         {
 293                 hcchar_data_t    hcchar;
 294                 hcchar.d32 = ifxusb_rreg(&_core_if->hc_regs[i]->hcchar);
 295                 hcchar.b.chen  = 0;
 296                 hcchar.b.chdis = 1;
 297                 hcchar.b.epdir = 0;
 298                 ifxusb_wreg(&_core_if->hc_regs[i]->hcchar, hcchar.d32);
 299         }
 300         /* Halt all channels to put them into a known state. */
 301         for (i = 0; i < _core_if->hwcfg2.b.num_host_chan + 1; i++)
 302         {
 303                 hcchar_data_t    hcchar;
 304                 int count = 0;
 305
 306                 hcchar.d32 = ifxusb_rreg(&_core_if->hc_regs[i]->hcchar);
 307                 hcchar.b.chen  = 1;
 308                 hcchar.b.chdis = 1;
 309                 hcchar.b.epdir = 0;
 310                 ifxusb_wreg(&_core_if->hc_regs[i]->hcchar, hcchar.d32);
 311
 312                 IFX_DEBUGPL(DBG_HCDV, "%s: Halt channel %d\n", __func__, i);
 313                 do{
 314                         hcchar.d32 = ifxusb_rreg(&_core_if->hc_regs[i]->hcchar);
 315                         if (++count > 1000)
 316                         {
 317                                 IFX_ERROR("%s: Unable to clear halt on channel %d\n", __func__, i);
 318                                 break;
 319                         }
 320                 } while (hcchar.b.chen);
 321         }
 322 }
 323
 324 //////////////////////////////////////////////////////////////////////////////////////////////////////////////////
 325
 326 #if defined(__UEIP__)
 327         #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 328                 int ifxusb_vbus_status =-1;
 329         #endif
 330
 331         #if defined(IFX_GPIO_USB_VBUS1) || defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 332                 int ifxusb_vbus1_status =-1;
 333         #endif
 334
 335         #if defined(IFX_GPIO_USB_VBUS2) || defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 336                 int ifxusb_vbus2_status =-1;
 337         #endif
 338
 339         #if defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 340                 static void *g_usb_vbus_trigger  = NULL;
 341         #endif
 342         #if defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 343                 static void *g_usb_vbus1_trigger = NULL;
 344         #endif
 345         #if defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 346                 static void *g_usb_vbus2_trigger = NULL;
 347         #endif
 348
 349         #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 350                 int ifxusb_vbus_gpio_inited=0;
 351         #endif
 352
 353 #else //defined(__UEIP__)
 354         int ifxusb_vbus_gpio_inited=0;
 355 #endif
 356
 357 //////////////////////////////////////////////////////////////////////////////////////////////////////////////////
 358
 359 void ifxusb_vbus_init(ifxusb_core_if_t *_core_if)
 360 {
 361         #if defined(__UEIP__)
 362                 #if defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 363                         if ( !g_usb_vbus_trigger )
 364                         {
 365                                 ifx_led_trigger_register("USB_VBUS", &g_usb_vbus_trigger);
 366                                 if ( g_usb_vbus_trigger != NULL )
 367                                 {
 368                                         struct ifx_led_trigger_attrib attrib = {0};
 369                                         attrib.delay_on     = 0;
 370                                         attrib.delay_off    = 0;
 371                                         attrib.timeout      = 0;
 372                                         attrib.def_value    = 0;
 373                                         attrib.flags        = IFX_LED_TRIGGER_ATTRIB_DELAY_ON | IFX_LED_TRIGGER_ATTRIB_DELAY_OFF | IFX_LED_TRIGGER_ATTRIB_TIMEOUT | IFX_LED_TRIGGER_ATTRIB_DEF_VALUE;
 374                                         IFX_DEBUGP("Reg USB power!!\n");
 375                                         ifx_led_trigger_set_attrib(g_usb_vbus_trigger, &attrib);
 376                                         ifxusb_vbus_status =0;
 377                                 }
 378                         }
 379                 #endif
 380                 #if defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 381                         if(_core_if->core_no==0 && !g_usb_vbus1_trigger )
 382                         {
 383                                 ifx_led_trigger_register("USB_VBUS1", &g_usb_vbus1_trigger);
 384                                 if ( g_usb_vbus1_trigger != NULL )
 385                                 {
 386                                         struct ifx_led_trigger_attrib attrib = {0};
 387                                         attrib.delay_on     = 0;
 388                                         attrib.delay_off    = 0;
 389                                         attrib.timeout      = 0;
 390                                         attrib.def_value    = 0;
 391                                         attrib.flags        = IFX_LED_TRIGGER_ATTRIB_DELAY_ON | IFX_LED_TRIGGER_ATTRIB_DELAY_OFF | IFX_LED_TRIGGER_ATTRIB_TIMEOUT | IFX_LED_TRIGGER_ATTRIB_DEF_VALUE;
 392                                         IFX_DEBUGP("Reg USB1 power!!\n");
 393                                         ifx_led_trigger_set_attrib(g_usb_vbus1_trigger, &attrib);
 394                                         ifxusb_vbus1_status =0;
 395                                 }
 396                         }
 397                 #endif
 398                 #if defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 399                         if(_core_if->core_no==1 && !g_usb_vbus2_trigger )
 400                         {
 401                                 ifx_led_trigger_register("USB_VBUS2", &g_usb_vbus2_trigger);
 402                                 if ( g_usb_vbus2_trigger != NULL )
 403                                 {
 404                                         struct ifx_led_trigger_attrib attrib = {0};
 405                                         attrib.delay_on     = 0;
 406                                         attrib.delay_off    = 0;
 407                                         attrib.timeout      = 0;
 408                                         attrib.def_value    = 0;
 409                                         attrib.flags        = IFX_LED_TRIGGER_ATTRIB_DELAY_ON | IFX_LED_TRIGGER_ATTRIB_DELAY_OFF | IFX_LED_TRIGGER_ATTRIB_TIMEOUT | IFX_LED_TRIGGER_ATTRIB_DEF_VALUE;
 410                                         IFX_DEBUGP("Reg USB2 power!!\n");
 411                                         ifx_led_trigger_set_attrib(g_usb_vbus2_trigger, &attrib);
 412                                         ifxusb_vbus2_status =0;
 413                                 }
 414                         }
 415                 #endif
 416
 417                 #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 418                         /* == 20100712 AVM/WK use gpio_inited as bitmask == */
 419                         if(ifxusb_vbus_gpio_inited == 0)
 420                         {
 421                                 if(!ifx_gpio_register(IFX_GPIO_MODULE_USB))
 422                                 {
 423                                         IFX_DEBUGP("Register USB VBus through GPIO OK!!\n");
 424                                         #ifdef IFX_GPIO_USB_VBUS
 425                                                 ifxusb_vbus_status =0;
 426                                         #endif //IFX_GPIO_USB_VBUS
 427                                         #ifdef IFX_GPIO_USB_VBUS1
 428                                                 ifxusb_vbus1_status=0;
 429                                         #endif //IFX_GPIO_USB_VBUS1
 430                                         #ifdef IFX_GPIO_USB_VBUS2
 431                                                 ifxusb_vbus2_status=0;
 432                                         #endif //IFX_GPIO_USB_VBUS2
 433                                         ifxusb_vbus_gpio_inited|= (1<<_core_if->core_no);
 434                                 }
 435                                 else
 436                                         IFX_PRINT("Register USB VBus Failed!!\n");
 437                         } else {
 438                                 ifxusb_vbus_gpio_inited|= (1<<_core_if->core_no);
 439                         }
 440                 #endif //defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 441         #endif //defined(__UEIP__)
 442 }
 443
 444 void ifxusb_vbus_free(ifxusb_core_if_t *_core_if)
 445 {
 446         #if defined(__UEIP__)
 447                 #if defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 448                         if ( g_usb_vbus_trigger )
 449                         {
 450                             ifx_led_trigger_deregister(g_usb_vbus_trigger);
 451                             g_usb_vbus_trigger = NULL;
 452                             ifxusb_vbus_status =-1;
 453                         }
 454                 #endif
 455                 #if defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 456                         if(_core_if->core_no==0 && g_usb_vbus1_trigger )
 457                         {
 458                             ifx_led_trigger_deregister(g_usb_vbus1_trigger);
 459                             g_usb_vbus1_trigger = NULL;
 460                             ifxusb_vbus1_status =-1;
 461                         }
 462                 #endif
 463                 #if defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 464                         if(_core_if->core_no==1 && g_usb_vbus2_trigger )
 465                         {
 466                             ifx_led_trigger_deregister(g_usb_vbus2_trigger);
 467                             g_usb_vbus2_trigger = NULL;
 468                             ifxusb_vbus2_status =-1;
 469                         }
 470                 #endif
 471
 472                 #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 473                         /* == 20100712 AVM/WK use gpio_inited as bitmask == */
 474                         if((ifxusb_vbus_gpio_inited & (1<<_core_if->core_no)) == ifxusb_vbus_gpio_inited)
 475                         {
 476                                 ifx_gpio_deregister(IFX_GPIO_MODULE_USB);
 477                                 #ifdef IFX_GPIO_USB_VBUS
 478                                         ifxusb_vbus_status =-1;
 479                                 #endif //IFX_GPIO_USB_VBUS
 480                                 #ifdef IFX_GPIO_USB_VBUS1
 481                                         ifxusb_vbus1_status=-1;
 482                                 #endif //IFX_GPIO_USB_VBUS1
 483                                 #ifdef IFX_GPIO_USB_VBUS2
 484                                         ifxusb_vbus2_status=-1;
 485                                 #endif //IFX_GPIO_USB_VBUS2
 486                         }
 487                         ifxusb_vbus_gpio_inited &= ~(1<<_core_if->core_no);
 488                 #endif //defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 489         #endif //defined(__UEIP__)
 490 }
 491
 492
 493 /*!
 494    \brief Turn on the USB 5V VBus Power
 495    \param _core_if        Pointer of core_if structure
 496  */
 497 void ifxusb_vbus_on(ifxusb_core_if_t *_core_if)
 498 {
 499         IFX_DEBUGP("SENDING VBus POWER UP\n");
 500         #if defined(__UEIP__)
 501                 #if defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 502                         if ( g_usb_vbus_trigger && ifxusb_vbus_status==0)
 503                         {
 504                                 ifx_led_trigger_activate(g_usb_vbus_trigger);
 505                                 IFX_DEBUGP("Enable USB power!!\n");
 506                                 ifxusb_vbus_status=1;
 507                         }
 508                 #endif
 509                 #if defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 510                         if(_core_if->core_no==0 && g_usb_vbus1_trigger && ifxusb_vbus1_status==0)
 511                         {
 512                                 ifx_led_trigger_activate(g_usb_vbus1_trigger);
 513                                 IFX_DEBUGP("Enable USB1 power!!\n");
 514                                 ifxusb_vbus1_status=1;
 515                         }
 516                 #endif
 517                 #if defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 518                         if(_core_if->core_no==1 && g_usb_vbus2_trigger && ifxusb_vbus2_status==0)
 519                         {
 520                                 ifx_led_trigger_activate(g_usb_vbus2_trigger);
 521                                 IFX_DEBUGP("Enable USB2 power!!\n");
 522                                 ifxusb_vbus2_status=1;
 523                         }
 524                 #endif
 525
 526                 #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 527                         if(ifxusb_vbus_gpio_inited)
 528                         {
 529                                 #if defined(IFX_GPIO_USB_VBUS)
 530                                         if(ifxusb_vbus_status==0)
 531                                         {
 532                                                 ifx_gpio_output_set(IFX_GPIO_USB_VBUS,IFX_GPIO_MODULE_USB);
 533                                                 ifxusb_vbus_status=1;
 534                                         }
 535                                 #endif
 536                                 #if defined(IFX_GPIO_USB_VBUS1)
 537                                         if(_core_if->core_no==0 && ifxusb_vbus1_status==0)
 538                                         {
 539                                                 ifx_gpio_output_set(IFX_GPIO_USB_VBUS1,IFX_GPIO_MODULE_USB);
 540                                                 ifxusb_vbus1_status=1;
 541                                         }
 542                                 #endif
 543                                 #if defined(IFX_GPIO_USB_VBUS2)
 544                                         if(_core_if->core_no==1 && ifxusb_vbus2_status==0)
 545                                         {
 546                                                 ifx_gpio_output_set(IFX_GPIO_USB_VBUS2,IFX_GPIO_MODULE_USB);
 547                                                 ifxusb_vbus2_status=1;
 548                                         }
 549                                 #endif
 550                         }
 551                 #endif //defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 552         #else
 553                 #if defined(__IS_TWINPASS__) || defined(__IS_DANUBE__)
 554                         ifxusb_vbus_status=1;
 555                         //usb_set_vbus_on();
 556                 #endif //defined(__IS_TWINPASS__) || defined(__IS_DANUBE__)
 557                 #if defined(__IS_AMAZON_SE__)
 558                         set_bit (4, (volatile unsigned long *)AMAZON_SE_GPIO_P0_OUT);
 559                         ifxusb_vbus_status=1;
 560                 #endif //defined(__IS_AMAZON_SE__)
 561                 #if defined(__IS_AR9__)
 562                         if(_core_if->core_no==0)
 563                         {
 564                                 if (bsp_port_reserve_pin(1, 13, PORT_MODULE_USB) != 0)
 565                                 {
 566                                         IFX_PRINT("Can't enable USB1 5.5V power!!\n");
 567                                         return;
 568                                 }
 569                                 bsp_port_clear_altsel0(1, 13, PORT_MODULE_USB);
 570                                 bsp_port_clear_altsel1(1, 13, PORT_MODULE_USB);
 571                                 bsp_port_set_dir_out(1, 13, PORT_MODULE_USB);
 572                                 bsp_port_set_pudsel(1, 13, PORT_MODULE_USB);
 573                                 bsp_port_set_puden(1, 13, PORT_MODULE_USB);
 574                                 bsp_port_set_output(1, 13, PORT_MODULE_USB);
 575                                 IFX_DEBUGP("Enable USB1 power!!\n");
 576                                 ifxusb_vbus1_status=1;
 577                         }
 578                         else
 579                         {
 580                                 if (bsp_port_reserve_pin(3, 4, PORT_MODULE_USB) != 0)
 581                                 {
 582                                         IFX_PRINT("Can't enable USB2 5.5V power!!\n");
 583                                         return;
 584                                 }
 585                                 bsp_port_clear_altsel0(3, 4, PORT_MODULE_USB);
 586                                 bsp_port_clear_altsel1(3, 4, PORT_MODULE_USB);
 587                                 bsp_port_set_dir_out(3, 4, PORT_MODULE_USB);
 588                                 bsp_port_set_pudsel(3, 4, PORT_MODULE_USB);
 589                                 bsp_port_set_puden(3, 4, PORT_MODULE_USB);
 590                                 bsp_port_set_output(3, 4, PORT_MODULE_USB);
 591                                 IFX_DEBUGP("Enable USB2 power!!\n");
 592                                 ifxusb_vbus2_status=1;
 593                         }
 594                 #endif //defined(__IS_AR9__)
 595                 #if defined(__IS_VR9__)
 596                         if(_core_if->core_no==0)
 597                         {
 598                                 ifxusb_vbus1_status=1;
 599                         }
 600                         else
 601                         {
 602                                 ifxusb_vbus2_status=1;
 603                         }
 604                 #endif //defined(__IS_VR9__)
 605         #endif //defined(__UEIP__)
 606 }
 607
 608
 609 /*!
 610    \brief Turn off the USB 5V VBus Power
 611    \param _core_if        Pointer of core_if structure
 612  */
 613 void ifxusb_vbus_off(ifxusb_core_if_t *_core_if)
 614 {
 615         IFX_DEBUGP("SENDING VBus POWER OFF\n");
 616
 617         #if defined(__UEIP__)
 618                 #if defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 619                         if ( g_usb_vbus_trigger && ifxusb_vbus_status==1)
 620                         {
 621                                 ifx_led_trigger_deactivate(g_usb_vbus_trigger);
 622                                 IFX_DEBUGP("Disable USB power!!\n");
 623                                 ifxusb_vbus_status=0;
 624                         }
 625                 #endif
 626                 #if defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 627                         if(_core_if->core_no==0 && g_usb_vbus1_trigger && ifxusb_vbus1_status==1)
 628                         {
 629                                 ifx_led_trigger_deactivate(g_usb_vbus1_trigger);
 630                                 IFX_DEBUGP("Disable USB1 power!!\n");
 631                                 ifxusb_vbus1_status=0;
 632                         }
 633                 #endif
 634                 #if defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 635                         if(_core_if->core_no==1 && g_usb_vbus2_trigger && ifxusb_vbus2_status==1)
 636                         {
 637                                 ifx_led_trigger_deactivate(g_usb_vbus2_trigger);
 638                                 IFX_DEBUGP("Disable USB2 power!!\n");
 639                                 ifxusb_vbus2_status=0;
 640                         }
 641                 #endif
 642
 643                 #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 644                         if(ifxusb_vbus_gpio_inited)
 645                         {
 646                                 #if defined(IFX_GPIO_USB_VBUS)
 647                                         if(ifxusb_vbus_status==1)
 648                                         {
 649                                                 ifx_gpio_output_clear(IFX_GPIO_USB_VBUS,IFX_GPIO_MODULE_USB);
 650                                                 ifxusb_vbus_status=0;
 651                                         }
 652                                 #endif
 653                                 #if defined(IFX_GPIO_USB_VBUS1)
 654                                         if(_core_if->core_no==0 && ifxusb_vbus1_status==1)
 655                                         {
 656                                                 ifx_gpio_output_clear(IFX_GPIO_USB_VBUS1,IFX_GPIO_MODULE_USB);
 657                                                 ifxusb_vbus1_status=0;
 658                                         }
 659                                 #endif
 660                                 #if defined(IFX_GPIO_USB_VBUS2)
 661                                         if(_core_if->core_no==1 && ifxusb_vbus2_status==1)
 662                                         {
 663                                                 ifx_gpio_output_clear(IFX_GPIO_USB_VBUS2,IFX_GPIO_MODULE_USB);
 664                                                 ifxusb_vbus2_status=0;
 665                                         }
 666                                 #endif
 667                         }
 668                 #endif //defined(IFX_GPIO_USB_VBUS) || defined(IFX_GPIO_USB_VBUS1) || defined(IFX_GPIO_USB_VBUS2)
 669         #else
 670                 #if defined(__IS_TWINPASS__) || defined(__IS_DANUBE__)
 671                         ifxusb_vbus_status=0;
 672                         //usb_set_vbus_on();
 673                 #endif //defined(__IS_TWINPASS__) || defined(__IS_DANUBE__)
 674                 #if defined(__IS_AMAZON_SE__)
 675                         clear_bit (4, (volatile unsigned long *)AMAZON_SE_GPIO_P0_OUT);
 676                         ifxusb_vbus_status=0;
 677                 #endif //defined(__IS_AMAZON_SE__)
 678                 #if defined(__IS_AR9__)
 679                         if(_core_if->core_no==0)
 680                         {
 681                                 if (bsp_port_reserve_pin(1, 13, PORT_MODULE_USB) != 0) {
 682                                         IFX_PRINT("Can't Disable USB1 5.5V power!!\n");
 683                                         return;
 684                                 }
 685                                 bsp_port_clear_altsel0(1, 13, PORT_MODULE_USB);
 686                                 bsp_port_clear_altsel1(1, 13, PORT_MODULE_USB);
 687                                 bsp_port_set_dir_out(1, 13, PORT_MODULE_USB);
 688                                 bsp_port_set_pudsel(1, 13, PORT_MODULE_USB);
 689                                 bsp_port_set_puden(1, 13, PORT_MODULE_USB);
 690                                 bsp_port_clear_output(1, 13, PORT_MODULE_USB);
 691                                 IFX_DEBUGP("Disable USB1 power!!\n");
 692                                 ifxusb_vbus1_status=0;
 693                         }
 694                         else
 695                         {
 696                                 if (bsp_port_reserve_pin(3, 4, PORT_MODULE_USB) != 0) {
 697                                         IFX_PRINT("Can't Disable USB2 5.5V power!!\n");
 698                                         return;
 699                                 }
 700                                 bsp_port_clear_altsel0(3, 4, PORT_MODULE_USB);
 701                                 bsp_port_clear_altsel1(3, 4, PORT_MODULE_USB);
 702                                 bsp_port_set_dir_out(3, 4, PORT_MODULE_USB);
 703                                 bsp_port_set_pudsel(3, 4, PORT_MODULE_USB);
 704                                 bsp_port_set_puden(3, 4, PORT_MODULE_USB);
 705                                 bsp_port_clear_output(3, 4, PORT_MODULE_USB);
 706                                 IFX_DEBUGP("Disable USB2 power!!\n");
 707
 708                                 ifxusb_vbus2_status=0;
 709                         }
 710                 #endif //defined(__IS_AR9__)
 711                 #if defined(__IS_VR9__)
 712                         if(_core_if->core_no==0)
 713                         {
 714                                 ifxusb_vbus1_status=0;
 715                         }
 716                         else
 717                         {
 718                                 ifxusb_vbus2_status=0;
 719                         }
 720                 #endif //defined(__IS_VR9__)
 721         #endif //defined(__UEIP__)
 722 }
 723
 724
 725
 726 /*!
 727    \brief Read Current VBus status
 728    \param _core_if        Pointer of core_if structure
 729  */
 730 int ifxusb_vbus(ifxusb_core_if_t *_core_if)
 731 {
 732 #if defined(__UEIP__)
 733         #if defined(IFX_GPIO_USB_VBUS) || defined(IFX_LEDGPIO_USB_VBUS) || defined(IFX_LEDLED_USB_VBUS)
 734                 return (ifxusb_vbus_status);
 735         #endif
 736
 737         #if defined(IFX_GPIO_USB_VBUS1) || defined(IFX_LEDGPIO_USB_VBUS1) || defined(IFX_LEDLED_USB_VBUS1)
 738                 if(_core_if->core_no==0)
 739                         return (ifxusb_vbus1_status);
 740         #endif
 741
 742         #if defined(IFX_GPIO_USB_VBUS2) || defined(IFX_LEDGPIO_USB_VBUS2) || defined(IFX_LEDLED_USB_VBUS2)
 743                 if(_core_if->core_no==1)
 744                         return (ifxusb_vbus2_status);
 745         #endif
 746 #else //defined(__UEIP__)
 747 #endif
 748         return -1;
 749 }
 750
 751 #if defined(__UEIP__)
 752 #else
 753         #if defined(__IS_TWINPASS__)
 754                 #define ADSL_BASE 0x20000
 755                 #define CRI_BASE          0x31F00
 756                 #define CRI_CCR0          CRI_BASE + 0x00
 757                 #define CRI_CCR1          CRI_BASE + 0x01*4
 758                 #define CRI_CDC0          CRI_BASE + 0x02*4
 759                 #define CRI_CDC1          CRI_BASE + 0x03*4
 760                 #define CRI_RST           CRI_BASE + 0x04*4
 761                 #define CRI_MASK0         CRI_BASE + 0x05*4
 762                 #define CRI_MASK1         CRI_BASE + 0x06*4
 763                 #define CRI_MASK2         CRI_BASE + 0x07*4
 764                 #define CRI_STATUS0       CRI_BASE + 0x08*4
 765                 #define CRI_STATUS1       CRI_BASE + 0x09*4
 766                 #define CRI_STATUS2       CRI_BASE + 0x0A*4
 767                 #define CRI_AMASK0        CRI_BASE + 0x0B*4
 768                 #define CRI_AMASK1        CRI_BASE + 0x0C*4
 769                 #define CRI_UPDCTL        CRI_BASE + 0x0D*4
 770                 #define CRI_MADST         CRI_BASE + 0x0E*4
 771                 // 0x0f is missing
 772                 #define CRI_EVENT0        CRI_BASE + 0x10*4
 773                 #define CRI_EVENT1        CRI_BASE + 0x11*4
 774                 #define CRI_EVENT2        CRI_BASE + 0x12*4
 775
 776                 #define IRI_I_ENABLE    0x32000
 777                 #define STY_SMODE       0x3c004
 778                 #define AFE_TCR_0       0x3c0dc
 779                 #define AFE_ADDR_ADDR   0x3c0e8
 780                 #define AFE_RDATA_ADDR  0x3c0ec
 781                 #define AFE_WDATA_ADDR  0x3c0f0
 782                 #define AFE_CONFIG      0x3c0f4
 783                 #define AFE_SERIAL_CFG  0x3c0fc
 784
 785                 #define DFE_BASE_ADDR         0xBE116000
 786                 //#define DFE_BASE_ADDR         0x9E116000
 787
 788                 #define MEI_FR_ARCINT_C       (DFE_BASE_ADDR + 0x0000001C)
 789                 #define MEI_DBG_WADDR_C       (DFE_BASE_ADDR + 0x00000024)
 790                 #define MEI_DBG_RADDR_C       (DFE_BASE_ADDR + 0x00000028)
 791                 #define MEI_DBG_DATA_C        (DFE_BASE_ADDR + 0x0000002C)
 792                 #define MEI_DBG_DECO_C        (DFE_BASE_ADDR + 0x00000030)
 793                 #define MEI_DBG_MASTER_C      (DFE_BASE_ADDR + 0x0000003C)
 794
 795                 static void WriteARCmem(uint32_t addr, uint32_t data)
 796                 {
 797                         writel(1    ,(volatile uint32_t *)MEI_DBG_MASTER_C);
 798                         writel(1    ,(volatile uint32_t *)MEI_DBG_DECO_C  );
 799                         writel(addr ,(volatile uint32_t *)MEI_DBG_WADDR_C  );
 800                         writel(data ,(volatile uint32_t *)MEI_DBG_DATA_C  );
 801                         while( (ifxusb_rreg((volatile uint32_t *)MEI_FR_ARCINT_C) & 0x20) != 0x20 ){};
 802                         writel(0    ,(volatile uint32_t *)MEI_DBG_MASTER_C);
 803                         IFX_DEBUGP("WriteARCmem %08x %08x\n",addr,data);
 804                 };
 805
 806                 static uint32_t ReadARCmem(uint32_t addr)
 807                 {
 808                         u32 data;
 809                         writel(1    ,(volatile uint32_t *)MEI_DBG_MASTER_C);
 810                         writel(1    ,(volatile uint32_t *)MEI_DBG_DECO_C  );
 811                         writel(addr ,(volatile uint32_t *)MEI_DBG_RADDR_C  );
 812                         while( (ifxusb_rreg((volatile uint32_t *)MEI_FR_ARCINT_C) & 0x20) != 0x20 ){};
 813                         data = ifxusb_rreg((volatile uint32_t *)MEI_DBG_DATA_C  );
 814                         writel(0    ,(volatile uint32_t *)MEI_DBG_MASTER_C);
 815                         IFX_DEBUGP("ReadARCmem %08x %08x\n",addr,data);
 816                   return data;
 817                 };
 818
 819                 void ifxusb_enable_afe_oc(void)
 820                 {
 821                         /* Start the clock */
 822                         WriteARCmem(CRI_UPDCTL    ,0x00000008);
 823                         WriteARCmem(CRI_CCR0      ,0x00000014);
 824                         WriteARCmem(CRI_CCR1      ,0x00000500);
 825                         WriteARCmem(AFE_CONFIG    ,0x000001c8);
 826                         WriteARCmem(AFE_SERIAL_CFG,0x00000016); // (DANUBE_PCI_CFG_BASE+(1<<addrline))AFE serial interface clock & data latch edge
 827                         WriteARCmem(AFE_TCR_0     ,0x00000002);
 828                         //Take afe out of reset
 829                         WriteARCmem(AFE_CONFIG    ,0x000000c0);
 830                         WriteARCmem(IRI_I_ENABLE  ,0x00000101);
 831                         WriteARCmem(STY_SMODE     ,0x00001980);
 832
 833                         ReadARCmem(CRI_UPDCTL    );
 834                         ReadARCmem(CRI_CCR0      );
 835                         ReadARCmem(CRI_CCR1      );
 836                         ReadARCmem(AFE_CONFIG    );
 837                         ReadARCmem(AFE_SERIAL_CFG); // (DANUBE_PCI_CFG_BASE+(1<<addrline))AFE serial interface clock & data latch edge
 838                         ReadARCmem(AFE_TCR_0     );
 839                         ReadARCmem(AFE_CONFIG    );
 840                         ReadARCmem(IRI_I_ENABLE  );
 841                         ReadARCmem(STY_SMODE     );
 842                 }
 843         #endif  //defined(__IS_TWINPASS__)
 844 #endif //defined(__UEIP__)
 845
 846