lantiq: new image build process - fix kernel entry address
[openwrt.git] / target / linux / lantiq / dts / amazonse.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "lantiq,xway", "lantiq,ase";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips4Kc";
9                 };
10         };
11
12         biu@1F800000 {
13                 #address-cells = <1>;
14                 #size-cells = <1>;
15                 compatible = "lantiq,biu", "simple-bus";
16                 reg = <0x1F800000 0x800000>;
17                 ranges = <0x0 0x1F800000 0x7FFFFF>;
18
19                 icu0: icu@80200 {
20                         #interrupt-cells = <1>;
21                         interrupt-controller;
22                         compatible = "lantiq,icu";
23                         reg = <0x80200 0x28
24                                 0x80228 0x28
25                                 0x80250 0x28
26                                 0x80278 0x28
27                                 0x802a0 0x28>;
28                 };
29
30                 watchdog@803F0 {
31                         compatible = "lantiq,wdt";
32                         reg = <0x803F0 0x10>;
33                 };
34         };
35
36         sram@1F000000 {
37                 #address-cells = <1>;
38                 #size-cells = <1>;
39                 compatible = "lantiq,sram", "simple-bus";
40                 reg = <0x1F000000 0x800000>;
41                 ranges = <0x0 0x1F000000 0x7FFFFF>;
42
43                 eiu0: eiu@101000 {
44                         #interrupt-cells = <1>;
45                         compatible = "lantiq,eiu-xway";
46                         reg = <0x101000 0x1000>;
47                         interrupt-parent = <&icu0>;
48                         interrupts = <29 30 31>;
49                 };
50
51                 pmu0: pmu@102000 {
52                         compatible = "lantiq,pmu-xway";
53                         reg = <0x102000 0x1000>;
54                 };
55
56                 cgu0: cgu@103000 {
57                         compatible = "lantiq,cgu-xway";
58                         reg = <0x103000 0x1000>;
59                         #clock-cells = <1>;
60                 };
61
62                 rcu0: rcu@203000 {
63                         compatible = "lantiq,rcu-xway";
64                         reg = <0x203000 0x1000>;
65                 };
66         };
67
68         fpi@10000000 {
69                 #address-cells = <1>;
70                 #size-cells = <1>;
71                 compatible = "lantiq,fpi", "simple-bus";
72                 ranges = <0x0 0x10000000 0xEEFFFFF>;
73                 reg = <0x10000000 0xEF00000>;
74
75                 spi@E100800 {
76                         compatible = "lantiq,ase-spi";
77                         reg = <0xE100800 0x100>;
78                         interrupt-parent = <&icu0>;
79                         interrupts = <24 25 26>;
80                         interrupt-names = "spi_rx", "spi_tx", "spi_err",
81                                         "spi_frm";
82                         #address-cells = <1>;
83                         #size-cells = <1>;
84                 };
85
86                 gptu@E100A00 {
87                         compatible = "lantiq,gptu-xway";
88                         reg = <0xE100A00 0x100>;
89                         interrupt-parent = <&icu0>;
90                         interrupts = <97 98 99 100 101 102>;
91                         status = "disabled";
92                 };
93
94                 gpio: pinmux@E100B10 {
95                         compatible = "lantiq,ase-pinctrl";
96                         #gpio-cells = <2>;
97                         gpio-controller;
98                         reg = <0xE100B10 0xA0>;
99                 };
100
101                 serial@E100C00 {
102                         compatible = "lantiq,asc";
103                         reg = <0xE100C00 0x400>;
104                         interrupt-parent = <&icu0>;
105                         interrupts = <72 74 75>;
106                 };
107
108                 mei@E116000 {
109                         compatible = "lantiq,mei-xway";
110                         interrupt-parent = <&icu0>;
111                         interrupts = <63>;
112                 };
113
114                 ifxhcd@E101000 {
115                         compatible = "lantiq,ifxhcd-ase";
116                         reg = <0xE101000 0x1000
117                                 0xE120000 0x3f000>;
118                         interrupt-parent = <&icu0>;
119                         interrupts = <39>;
120                         status = "disabled";
121                 };
122
123                 dma0: dma@E104100 {
124                         compatible = "lantiq,dma-xway";
125                         reg = <0xE104100 0x800>;
126                 };
127
128                 ebu0: ebu@E105300 {
129                         compatible = "lantiq,ebu-xway";
130                         reg = <0xE105300 0x100>;
131                 };
132
133                 ppe@E234000 {
134                         compatible = "lantiq,ppe-ase";
135                         interrupt-parent = <&icu0>;
136                         interrupts = <85>;
137                 };
138
139                 etop@E180000 {
140                         compatible = "lantiq,etop-xway";
141                         reg = <0xE180000 0x40000>;
142                         interrupt-parent = <&icu0>;
143                         interrupts = <105 109>;
144                 };
145         };
146
147         adsl {
148                 compatible = "lantiq,adsl-ase";
149         };
150 };