lantiq: remove read-only flag on two partitions on BTHOMEHUBV3A
[openwrt.git] / target / linux / lantiq / dts / VGV7510KW22.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4         model = "VGV7510KW22 - o2 Box 6431";
5
6         chosen {
7                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
8
9                 leds {
10                         boot = &power_green;
11                         failsafe = &power_red;
12                         running = &power_green;
13
14                         dsl = &dsl;
15                         internet = &internet_green;
16                         wifi = &wifi;
17                 };
18         };
19
20         memory@0 {
21                 reg = <0x0 0x4000000>;
22         };
23
24         fpi@10000000 {
25                 localbus@0 {
26                         nor-boot@0 {
27                                 compatible = "lantiq,nor";
28                                 bank-width = <2>;
29                                 reg = <0 0x0 0x1000000>;
30                                 #address-cells = <1>;
31                                 #size-cells = <1>;
32
33                                 boardconfig: partition@fe0000 {
34                                         label = "board_config";
35                                         reg = <0xfe0000 0x20000>;
36                                         read-only;
37                                 };
38                         };
39                 };
40
41                 gpio: pinmux@E100B10 {
42                         pinctrl-names = "default";
43                         pinctrl-0 = <&state_default>;
44
45                         state_default: pinmux {
46                                 ip101a-rst {
47                                         lantiq,pins = "io46";
48                                         lantiq,output = <0>;
49                                         lantiq,pull = <1>;
50                                 };
51                                 gphy-leds {
52                                         lantiq,groups = "gphy0 led1",
53                                                         "gphy1 led0", "gphy1 led1";
54                                         lantiq,function = "gphy";
55                                         lantiq,open-drain = <0>;
56                                         lantiq,pull = <0>;
57                                         lantiq,output = <1>;
58                                 };
59                                 stp {
60                                         lantiq,groups = "stp";
61                                         lantiq,function = "stp";
62                                         lantiq,pull = <2>;
63                                         lantiq,open-drain = <0>;
64                                         lantiq,output = <1>;
65                                 };
66                                 mdio {
67                                         lantiq,groups = "mdio";
68                                         lantiq,function = "mdio";
69                                 };
70                                 pci-rst {
71                                         lantiq,pins = "io21";
72                                         lantiq,open-drain = <0>;
73                                         lantiq,pull = <0>;
74                                         lantiq,output = <1>;
75                                 };
76                                 spi {
77                                         lantiq,groups = "spi_di", "spi_do", "spi_clk";
78                                         lantiq,function = "spi";
79                                 };
80                         };
81                 };
82
83                 stp: stp@E100BB0 {
84                         compatible = "lantiq,gpio-stp-xway";
85                         reg = <0xE100BB0 0x40>;
86                         #gpio-cells = <2>;
87                         gpio-controller;
88
89                         lantiq,shadow = <0xff>;
90                         lantiq,groups = <0x1>;
91                         lantiq,dsl = <0x0>;
92                         lantiq,phy1 = <0x7>;
93                         lantiq,phy2 = <0x7>; /* enable gphy0 led2 = LAN2 LED */
94                 };
95
96                 ifxhcd@E101000 {
97                         status = "okay";
98                         gpios = <&gpio 47 0>;
99                 };
100
101                 pci@E105400 {
102                         status = "okay";
103                         lantiq,bus-clock = <33333333>;
104                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
105                         interrupt-map = <
106                                 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
107                                 >;
108                         gpio-reset = <&gpio 21 0>;
109                         req-mask = <0x1>;       /* GNT1 */
110                 };
111
112                 pcie@d900000 {
113                         status = "disabled";
114                 };
115         };
116
117         gphy-xrx200 {
118                 compatible = "lantiq,phy-xrx200";
119                 firmware1 = "lantiq/vr9_phy22f_a1x.bin";        /*VR9 1.1*/
120                 firmware2 = "lantiq/vr9_phy22f_a2x.bin";        /*VR9 1.2*/
121                 phys = [ 00 01 ];
122         };
123
124         ralink_eep {
125                 compatible = "ralink,eeprom";
126                 ralink,eeprom = "RT3062.eeprom";
127         };
128
129         gpio-keys-polled {
130                 compatible = "gpio-keys-polled";
131                 #address-cells = <1>;
132                 #size-cells = <0>;
133                 poll-interval = <100>;
134
135                 reset {
136                         label = "reset";
137                         gpios = <&gpio 6 1>;
138                         linux,code = <0x198>;
139                 };
140
141                 wps {
142                         label = "wps";
143                         gpios = <&gpio 9 1>;
144                         linux,code = <0x211>;
145                 };
146         };
147
148         gpio-leds {
149                 compatible = "gpio-leds";
150
151                 dsl: dsl {
152                         label = "vgv7510kw22:green:dsl";
153                         gpios = <&gpio 2 1>;
154                 };
155
156                 internet_red {
157                         label = "vgv7510kw22:red:internet";
158                         gpios = <&gpio 10 1>;
159                 };
160
161                 info_red {
162                         label = "vgv7510kw22:red:info";
163                         gpios = <&gpio 12 1>;
164                 };
165
166                 power_green: power {
167                         label = "vgv7510kw22:green:power";
168                         gpios = <&gpio 14 1>;
169                         default-state = "keep";
170                 };
171
172                 info_green {
173                         label = "vgv7510kw22:green:info";
174                         gpios = <&gpio 15 1>;
175                 };
176
177                 internet_green: internet_green {
178                         label = "vgv7510kw22:green:internet";
179                         gpios = <&gpio 19 1>;
180                 };
181
182                 wifi: wifi {
183                         label = "vgv7510kw22:green:wlan";
184                         gpios = <&gpio 20 1>;
185                 };
186
187                 power_red: power2 {
188                         label = "vgv7510kw22:red:power";
189                         gpios = <&gpio 28 1>;
190                 };
191
192                 phone {
193                         label = "vgv7510kw22:green:telefon";
194                         gpios = <&gpio 29 1>;
195                 };
196         };
197 };
198
199 &eth0 {
200         lan: interface@0 {
201                 compatible = "lantiq,xrx200-pdi";
202                 #address-cells = <1>;
203                 #size-cells = <0>;
204                 reg = <0>;
205                 mtd-mac-address = <&boardconfig 0x16>;
206                 lantiq,switch;
207
208                 ethernet@2 {
209                         compatible = "lantiq,xrx200-pdi-port";
210                         reg = <2>;
211                         phy-mode = "mii";
212                         phy-handle = <&phy11>;
213                 };
214                 ethernet@3 {
215                         compatible = "lantiq,xrx200-pdi-port";
216                         reg = <3>;
217                         phy-mode = "mii";
218                         phy-handle = <&phy12>;
219                 };
220                 ethernet@4 {
221                         compatible = "lantiq,xrx200-pdi-port";
222                         reg = <4>;
223                         phy-mode = "mii";
224                         phy-handle = <&phy13>;
225                 };
226                 ethernet@5 {
227                         compatible = "lantiq,xrx200-pdi-port";
228                         reg = <5>;
229                         phy-mode = "mii";
230                         phy-handle = <&phy14>;
231                 };
232         };
233
234         mdio@0 {
235                 #address-cells = <1>;
236                 #size-cells = <0>;
237                 compatible = "lantiq,xrx200-mdio";
238
239                 phy11: ethernet-phy@11 {
240                         reg = <0x11>;
241                         compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
242                 };
243                 phy12: ethernet-phy@12 {
244                         reg = <0x12>;
245                         compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
246                 };
247                 phy13: ethernet-phy@13 {
248                         reg = <0x13>;
249                         compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
250                 };
251                 phy14: ethernet-phy@14 {
252                         reg = <0x14>;
253                         compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
254                 };
255         };
256 };