target/linux/lantiq/dts/EASY80920.dtsi

   1 /include/ "vr9.dtsi"
   2
   3 / {
   4         chosen {
   5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
   6
   7                 leds {
   8                         boot = &power;
   9                         failsafe = &power;
  10                         running = &power;
  11
  12                         usb = &usb1;
  13                         usb2 = &usb2;
  14                 };
  15         };
  16
  17         memory@0 {
  18                 reg = <0x0 0x4000000>;
  19         };
  20
  21         fpi@10000000 {
  22                 #address-cells = <1>;
  23                 #size-cells = <1>;
  24                 compatible = "lantiq,fpi", "simple-bus";
  25                 ranges = <0x0 0x10000000 0xEEFFFFF>;
  26                 reg = <0x10000000 0xEF00000>;
  27
  28                 localbus@0 {
  29                         #address-cells = <2>;
  30                         #size-cells = <1>;
  31                         compatible = "lantiq,localbus", "simple-bus";
  32
  33                 };
  34
  35                 spi@E100800 {
  36                         compatible = "lantiq,spi-xway-broken";
  37                         reg = <0xE100800 0x100>;
  38                         interrupt-parent = <&icu0>;
  39                         interrupts = <22 23 24>;
  40                         #address-cells = <1>;
  41                         #size-cells = <1>;
  42
  43                         m25p80@0 {
  44                                 #address-cells = <1>;
  45                                 #size-cells = <1>;
  46                                 compatible = "jedec,spi-nor";
  47                                 reg = <0 0>;
  48                                 spi-max-frequency = <1000000>;
  49
  50                                 partition@0 {
  51                                         reg = <0x0 0x20000>;
  52                                         label = "SPI (RO) U-Boot Image";
  53                                         read-only;
  54                                 };
  55
  56                                 partition@20000 {
  57                                         reg = <0x20000 0x10000>;
  58                                         label = "ENV_MAC";
  59                                         read-only;
  60                                 };
  61
  62                                 partition@30000 {
  63                                         reg = <0x30000 0x10000>;
  64                                         label = "DPF";
  65                                         read-only;
  66                                 };
  67
  68                                 partition@40000 {
  69                                         reg = <0x40000 0x10000>;
  70                                         label = "NVRAM";
  71                                         read-only;
  72                                 };
  73
  74                                 partition@500000 {
  75                                         reg = <0x50000 0x003a0000>;
  76                                         label = "kernel";
  77                                 };
  78                         };
  79                 };
  80
  81                 gpio: pinmux@E100B10 {
  82                         compatible = "lantiq,pinctrl-xr9";
  83                         pinctrl-names = "default";
  84                         pinctrl-0 = <&state_default>;
  85
  86                         interrupt-parent = <&icu0>;
  87                         interrupts = <166 135 66 40 41 42 38>;
  88
  89                         #gpio-cells = <2>;
  90                         gpio-controller;
  91                         reg = <0xE100B10 0xA0>;
  92
  93                         state_default: pinmux {
  94                                 exin3 {
  95                                         lantiq,groups = "exin3";
  96                                         lantiq,function = "exin";
  97                                 };
  98                                 stp {
  99                                         lantiq,groups = "stp";
 100                                         lantiq,function = "stp";
 101                                 };
 102                                 spi {
 103                                         lantiq,groups = "spi", "spi_cs4";
 104                                         lantiq,function = "spi";
 105                                 };
 106                                 nand {
 107                                         lantiq,groups = "nand cle", "nand ale",
 108                                                         "nand rd", "nand rdy";
 109                                         lantiq,function = "ebu";
 110                                 };
 111                                 mdio {
 112                                         lantiq,groups = "mdio";
 113                                         lantiq,function = "mdio";
 114                                 };
 115                                 pci {
 116                                         lantiq,groups = "gnt1", "req1";
 117                                         lantiq,function = "pci";
 118                                 };
 119                                 conf_out {
 120                                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
 121                                                         "io4", "io5", "io6", /* stp */
 122                                                         "io21",
 123                                                         "io33";
 124                                         lantiq,open-drain;
 125                                         lantiq,pull = <0>;
 126                                         lantiq,output = <1>;
 127                                 };
 128                                 pcie-rst {
 129                                         lantiq,pins = "io38";
 130                                         lantiq,pull = <0>;
 131                                         lantiq,output = <1>;
 132                                 };
 133                                 conf_in {
 134                                         lantiq,pins = "io39", /* exin3 */
 135                                                         "io48"; /* nand rdy */
 136                                         lantiq,pull = <2>;
 137                                 };
 138                         };
 139                 };
 140
 141                 eth@E108000 {
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         compatible = "lantiq,xrx200-net";
 145                         reg = < 0xE108000 0x3000 /* switch */
 146                                 0xE10B100 0x70 /* mdio */
 147                                 0xE10B1D8 0x30 /* mii */
 148                                 0xE10B308 0x30 /* pmac */
 149                         >;
 150                         interrupt-parent = <&icu0>;
 151                         interrupts = <73 72>;
 152
 153                         lan: interface@0 {
 154                                 compatible = "lantiq,xrx200-pdi";
 155                                 #address-cells = <1>;
 156                                 #size-cells = <0>;
 157                                 reg = <0>;
 158                                 mac-address = [ 00 11 22 33 44 55 ];
 159
 160                                 ethernet@0 {
 161                                         compatible = "lantiq,xrx200-pdi-port";
 162                                         reg = <0>;
 163                                         phy-mode = "rgmii";
 164                                         phy-handle = <&phy0>;
 165                                 };
 166                                 ethernet@1 {
 167                                         compatible = "lantiq,xrx200-pdi-port";
 168                                         reg = <1>;
 169                                         phy-mode = "rgmii";
 170                                         phy-handle = <&phy1>;
 171                                 };
 172                                 ethernet@2 {
 173                                         compatible = "lantiq,xrx200-pdi-port";
 174                                         reg = <2>;
 175                                         phy-mode = "gmii";
 176                                         phy-handle = <&phy11>;
 177                                 };
 178                         };
 179
 180                         wan: interface@1 {
 181                                 compatible = "lantiq,xrx200-pdi";
 182                                 #address-cells = <1>;
 183                                 #size-cells = <0>;
 184                                 reg = <1>;
 185                                 mac-address = [ 00 11 22 33 44 56 ];
 186                                 lantiq,wan;
 187                                 ethernet@5 {
 188                                         compatible = "lantiq,xrx200-pdi-port";
 189                                         reg = <5>;
 190                                         phy-mode = "rgmii";
 191                                         phy-handle = <&phy5>;
 192                                 };
 193                         };
 194
 195                         test: interface@2 {
 196                                 compatible = "lantiq,xrx200-pdi";
 197                                 #address-cells = <1>;
 198                                 #size-cells = <0>;
 199                                 reg = <2>;
 200                                 mac-address = [ 00 11 22 33 44 57 ];
 201                                 ethernet@4 {
 202                                         compatible = "lantiq,xrx200-pdi-port";
 203                                         reg = <4>;
 204                                         phynmode0 = "gmii";
 205                                         phy-handle = <&phy13>;
 206                                 };
 207                         };
 208
 209                         mdio@0 {
 210                                 #address-cells = <1>;
 211                                 #size-cells = <0>;
 212                                 compatible = "lantiq,xrx200-mdio";
 213                                 phy0: ethernet-phy@0 {
 214                                         reg = <0x0>;
 215                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 216                                 };
 217                                 phy1: ethernet-phy@1 {
 218                                         reg = <0x1>;
 219                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 220                                 };
 221                                 phy5: ethernet-phy@5 {
 222                                         reg = <0x5>;
 223                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 224                                 };
 225                                 phy11: ethernet-phy@11 {
 226                                         reg = <0x11>;
 227                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 228                                 };
 229                                 phy13: ethernet-phy@13 {
 230                                         reg = <0x13>;
 231                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 232                                 };
 233                         };
 234                 };
 235
 236                 stp: stp@E100BB0 {
 237                         compatible = "lantiq,gpio-stp-xway";
 238                         reg = <0xE100BB0 0x40>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241
 242                         lantiq,shadow = <0xffff>;
 243                         lantiq,groups = <0x7>;
 244                         lantiq,dsl = <0x3>;
 245                         lantiq,phy1 = <0x7>;
 246                         lantiq,phy2 = <0x7>;
 247                         /* lantiq,rising; */
 248                 };
 249
 250                 ifxhcd@E101000 {
 251                         status = "okay";
 252                         gpios = <&gpio 33 0>;
 253                         lantiq,portmask = <0x3>;
 254                 };
 255
 256                 pci@E105400 {
 257                         #address-cells = <3>;
 258                         #size-cells = <2>;
 259                         #interrupt-cells = <1>;
 260                         compatible = "lantiq,pci-xway1";
 261                         bus-range = <0x0 0x0>;
 262                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
 263                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
 264                         reg = <0x7000000 0x8000         /* config space */
 265                                 0xE105400 0x400>;       /* pci bridge */
 266                         lantiq,bus-clock = <33333333>;
 267                         /*lantiq,external-clock;*/
 268                         lantiq,delay-hi = <0>; /* 0ns delay */
 269                         lantiq,delay-lo = <0>; /* 0.0ns delay */
 270                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 271                         interrupt-map = <
 272                                 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
 273                                 >;
 274                         gpios-reset = <&gpio 21 0>;
 275                         req-mask = <0x1>;       /* GNT1 */
 276                 };
 277         };
 278
 279         gphy-xrx200 {
 280                 compatible = "lantiq,phy-xrx200";
 281                 firmware = "lantiq/vr9_phy11g_a2x.bin";
 282                 phys = [ 00 01 ];
 283         };
 284
 285         gpio-keys-polled {
 286                 compatible = "gpio-keys-polled";
 287                 #address-cells = <1>;
 288                 #size-cells = <0>;
 289                 poll-interval = <100>;
 290 /*              reset {
 291                         label = "reset";
 292                         gpios = <&gpio 7 1>;
 293                         linux,code = <0x198>;
 294                 };*/
 295                 paging {
 296                         label = "paging";
 297                         gpios = <&gpio 11 1>;
 298                         linux,code = <0x100>;
 299                 };
 300         };
 301
 302         gpio-leds {
 303                 compatible = "gpio-leds";
 304
 305                 power: power {
 306                         label = "easy80920:green:power";
 307                         gpios = <&stp 9 0>;
 308                         default-state = "keep";
 309                 };
 310                 warning {
 311                         label = "easy80920:green:warning";
 312                         gpios = <&stp 22 0>;
 313                 };
 314                 fxs1 {
 315                         label = "easy80920:green:fxs1";
 316                         gpios = <&stp 21 0>;
 317                 };
 318                 fxs2 {
 319                         label = "easy80920:green:fxs2";
 320                         gpios = <&stp 20 0>;
 321                 };
 322                 fxo {
 323                         label = "easy80920:green:fxo";
 324                         gpios = <&stp 19 0>;
 325                 };
 326                 usb1: usb1 {
 327                         label = "easy80920:green:usb1";
 328                         gpios = <&stp 18 0>;
 329                 };
 330                 usb2: usb2 {
 331                         label = "easy80920:green:usb2";
 332                         gpios = <&stp 15 0>;
 333                 };
 334                 sd {
 335                         label = "easy80920:green:sd";
 336                         gpios = <&stp 14 0>;
 337                 };
 338                 wps {
 339                         label = "easy80920:green:wps";
 340                         gpios = <&stp 12 0>;
 341                 };
 342         };
 343 };