target/linux/lantiq/dts/EASY80920.dtsi

   1 /include/ "vr9.dtsi"
   2
   3 / {
   4         chosen {
   5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
   6         };
   7
   8         memory@0 {
   9                 reg = <0x0 0x4000000>;
  10         };
  11
  12         fpi@10000000 {
  13                 #address-cells = <1>;
  14                 #size-cells = <1>;
  15                 compatible = "lantiq,fpi", "simple-bus";
  16                 ranges = <0x0 0x10000000 0xEEFFFFF>;
  17                 reg = <0x10000000 0xEF00000>;
  18
  19                 localbus@0 {
  20                         #address-cells = <2>;
  21                         #size-cells = <1>;
  22                         compatible = "lantiq,localbus", "simple-bus";
  23
  24                 };
  25
  26                 spi@E100800 {
  27                         compatible = "lantiq,spi-xway-broken";
  28                         reg = <0xE100800 0x100>;
  29                         interrupt-parent = <&icu0>;
  30                         interrupts = <22 23 24>;
  31                         #address-cells = <1>;
  32                         #size-cells = <1>;
  33
  34                         m25p80@0 {
  35                                 #address-cells = <1>;
  36                                 #size-cells = <1>;
  37                                 compatible = "s25fl129p0";
  38                                 reg = <0 0>;
  39                                 linux,modalias = "m25p80", "mx25l3205d";
  40                                 spi-max-frequency = <1000000>;
  41
  42                                 partition@0 {
  43                                         reg = <0x0 0x20000>;
  44                                         label = "SPI (RO) U-Boot Image";
  45                                         read-only;
  46                                 };
  47
  48                                 partition@20000 {
  49                                         reg = <0x20000 0x10000>;
  50                                         label = "ENV_MAC";
  51                                         read-only;
  52                                 };
  53
  54                                 partition@30000 {
  55                                         reg = <0x30000 0x10000>;
  56                                         label = "DPF";
  57                                         read-only;
  58                                 };
  59
  60                                 partition@40000 {
  61                                         reg = <0x40000 0x10000>;
  62                                         label = "NVRAM";
  63                                         read-only;
  64                                 };
  65
  66                                 partition@500000 {
  67                                         reg = <0x50000 0x003a0000>;
  68                                         label = "kernel";
  69                                 };
  70                         };
  71                 };
  72
  73                 gpio: pinmux@E100B10 {
  74                         compatible = "lantiq,pinctrl-xr9";
  75                         pinctrl-names = "default";
  76                         pinctrl-0 = <&state_default>;
  77
  78                         interrupt-parent = <&icu0>;
  79                         interrupts = <166 135 66 40 41 42 38>;
  80
  81                         #gpio-cells = <2>;
  82                         gpio-controller;
  83                         reg = <0xE100B10 0xA0>;
  84
  85                         state_default: pinmux {
  86                                 exin3 {
  87                                         lantiq,groups = "exin3";
  88                                         lantiq,function = "exin";
  89                                 };
  90                                 stp {
  91                                         lantiq,groups = "stp";
  92                                         lantiq,function = "stp";
  93                                 };
  94                                 spi {
  95                                         lantiq,groups = "spi", "spi_cs4";
  96                                         lantiq,function = "spi";
  97                                 };
  98                                 nand {
  99                                         lantiq,groups = "nand cle", "nand ale",
 100                                                         "nand rd", "nand rdy";
 101                                         lantiq,function = "ebu";
 102                                 };
 103                                 mdio {
 104                                         lantiq,groups = "mdio";
 105                                         lantiq,function = "mdio";
 106                                 };
 107                                 pci {
 108                                         lantiq,groups = "gnt1", "req1";
 109                                         lantiq,function = "pci";
 110                                 };
 111                                 conf_out {
 112                                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
 113                                                         "io4", "io5", "io6", /* stp */
 114                                                         "io21",
 115                                                         "io33";
 116                                         lantiq,open-drain;
 117                                         lantiq,pull = <0>;
 118                                         lantiq,output = <1>;
 119                                 };
 120                                 pcie-rst {
 121                                         lantiq,pins = "io38";
 122                                         lantiq,pull = <0>;
 123                                         lantiq,output = <1>;
 124                                 };
 125                                 conf_in {
 126                                         lantiq,pins = "io39", /* exin3 */
 127                                                         "io48"; /* nand rdy */
 128                                         lantiq,pull = <2>;
 129                                 };
 130                         };
 131                 };
 132
 133                 eth@E108000 {
 134                         #address-cells = <1>;
 135                         #size-cells = <0>;
 136                         compatible = "lantiq,xrx200-net";
 137                         reg = < 0xE108000 0x3000 /* switch */
 138                                 0xE10B100 0x70 /* mdio */
 139                                 0xE10B1D8 0x30 /* mii */
 140                                 0xE10B308 0x30 /* pmac */
 141                         >;
 142                         interrupt-parent = <&icu0>;
 143                         interrupts = <73 72>;
 144
 145                         lan: interface@0 {
 146                                 compatible = "lantiq,xrx200-pdi";
 147                                 #address-cells = <1>;
 148                                 #size-cells = <0>;
 149                                 reg = <0>;
 150                                 mac-address = [ 00 11 22 33 44 55 ];
 151
 152                                 ethernet@0 {
 153                                         compatible = "lantiq,xrx200-pdi-port";
 154                                         reg = <0>;
 155                                         phy-mode = "rgmii";
 156                                         phy-handle = <&phy0>;
 157                                 };
 158                                 ethernet@1 {
 159                                         compatible = "lantiq,xrx200-pdi-port";
 160                                         reg = <1>;
 161                                         phy-mode = "rgmii";
 162                                         phy-handle = <&phy1>;
 163                                 };
 164                                 ethernet@2 {
 165                                         compatible = "lantiq,xrx200-pdi-port";
 166                                         reg = <2>;
 167                                         phy-mode = "gmii";
 168                                         phy-handle = <&phy11>;
 169                                 };
 170                         };
 171
 172                         wan: interface@1 {
 173                                 compatible = "lantiq,xrx200-pdi";
 174                                 #address-cells = <1>;
 175                                 #size-cells = <0>;
 176                                 reg = <1>;
 177                                 mac-address = [ 00 11 22 33 44 56 ];
 178                                 lantiq,wan;
 179                                 ethernet@5 {
 180                                         compatible = "lantiq,xrx200-pdi-port";
 181                                         reg = <5>;
 182                                         phy-mode = "rgmii";
 183                                         phy-handle = <&phy5>;
 184                                 };
 185                         };
 186
 187                         test: interface@2 {
 188                                 compatible = "lantiq,xrx200-pdi";
 189                                 #address-cells = <1>;
 190                                 #size-cells = <0>;
 191                                 reg = <2>;
 192                                 mac-address = [ 00 11 22 33 44 57 ];
 193                                 ethernet@4 {
 194                                         compatible = "lantiq,xrx200-pdi-port";
 195                                         reg = <4>;
 196                                         phynmode0 = "gmii";
 197                                         phy-handle = <&phy13>;
 198                                 };
 199                         };
 200
 201                         mdio@0 {
 202                                 #address-cells = <1>;
 203                                 #size-cells = <0>;
 204                                 compatible = "lantiq,xrx200-mdio";
 205                                 phy0: ethernet-phy@0 {
 206                                         reg = <0x0>;
 207                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 208                                         lantiq,c45-reg-init = <1 0 0 0>;
 209                                 };
 210                                 phy1: ethernet-phy@1 {
 211                                         reg = <0x1>;
 212                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 213                                         lantiq,c45-reg-init = <1 0 0 0>;
 214                                 };
 215                                 phy5: ethernet-phy@5 {
 216                                         reg = <0x5>;
 217                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 218                                         lantiq,c45-reg-init = <1 0 0 0>;
 219                                 };
 220                                 phy11: ethernet-phy@11 {
 221                                         reg = <0x11>;
 222                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 223                                         lantiq,c45-reg-init = <1 0 0 0>;
 224                                 };
 225                                 phy13: ethernet-phy@13 {
 226                                         reg = <0x13>;
 227                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 228                                         lantiq,c45-reg-init = <1 0 0 0>;
 229                                 };
 230                         };
 231                 };
 232
 233                 stp: stp@E100BB0 {
 234                         compatible = "lantiq,gpio-stp-xway";
 235                         reg = <0xE100BB0 0x40>;
 236                         #gpio-cells = <2>;
 237                         gpio-controller;
 238
 239                         lantiq,shadow = <0xffff>;
 240                         lantiq,groups = <0x7>;
 241                         lantiq,dsl = <0x3>;
 242                         lantiq,phy1 = <0x7>;
 243                         lantiq,phy2 = <0x7>;
 244                         /* lantiq,rising; */
 245                 };
 246
 247                 ifxhcd@E101000 {
 248                         status = "okay";
 249                         gpios = <&gpio 33 0>;
 250                         lantiq,portmask = <0x3>;
 251                 };
 252
 253                 pci@E105400 {
 254                         #address-cells = <3>;
 255                         #size-cells = <2>;
 256                         #interrupt-cells = <1>;
 257                         compatible = "lantiq,pci-xway1";
 258                         bus-range = <0x0 0x0>;
 259                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
 260                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
 261                         reg = <0x7000000 0x8000         /* config space */
 262                                 0xE105400 0x400>;       /* pci bridge */
 263                         lantiq,bus-clock = <33333333>;
 264                         /*lantiq,external-clock;*/
 265                         lantiq,delay-hi = <0>; /* 0ns delay */
 266                         lantiq,delay-lo = <0>; /* 0.0ns delay */
 267                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 268                         interrupt-map = <
 269                                 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
 270                                 >;
 271                         gpios-reset = <&gpio 21 0>;
 272                         req-mask = <0x1>;       /* GNT1 */
 273                 };
 274         };
 275
 276         gphy-xrx200 {
 277                 compatible = "lantiq,phy-xrx200";
 278                 firmware = "lantiq/vr9_phy11g_a2x.bin";
 279                 phys = [ 00 01 ];
 280         };
 281
 282         gpio-keys-polled {
 283                 compatible = "gpio-keys-polled";
 284                 #address-cells = <1>;
 285                 #size-cells = <0>;
 286                 poll-interval = <100>;
 287 /*              reset {
 288                         label = "reset";
 289                         gpios = <&gpio 7 1>;
 290                         linux,code = <0x198>;
 291                 };*/
 292                 paging {
 293                         label = "paging";
 294                         gpios = <&gpio 11 1>;
 295                         linux,code = <0x100>;
 296                 };
 297         };
 298
 299         gpio-leds {
 300                 compatible = "gpio-leds";
 301
 302                 power {
 303                         label = "power";
 304                         gpios = <&stp 9 0>;
 305                         default-state = "on";
 306                 };
 307                 warning {
 308                         label = "warning";
 309                         gpios = <&stp 22 0>;
 310                 };
 311                 fxs1 {
 312                         label = "fxs1";
 313                         gpios = <&stp 21 0>;
 314                 };
 315                 fxs2 {
 316                         label = "fxs2";
 317                         gpios = <&stp 20 0>;
 318                 };
 319                 fxo {
 320                         label = "fxo";
 321                         gpios = <&stp 19 0>;
 322                 };
 323                 usb1 {
 324                         label = "usb1";
 325                         gpios = <&stp 18 0>;
 326                 };
 327                 usb2 {
 328                         label = "usb2";
 329                         gpios = <&stp 15 0>;
 330                 };
 331                 sd {
 332                         label = "sd";
 333                         gpios = <&stp 14 0>;
 334                 };
 335                 wps {
 336                         label = "wps";
 337                         gpios = <&stp 12 0>;
 338                 };
 339         };
 340 };