target/linux/ipq806x/patches/0170-clk-qcom-Add-KPSS-ACC-GCC-driver.patch

   1 From 67a9d5a02b178644da624ef9c32b4e6abb2c4f6e Mon Sep 17 00:00:00 2001
   2 From: Stephen Boyd <sboyd@codeaurora.org>
   3 Date: Wed, 18 Jun 2014 14:25:41 -0700
   4 Subject: [PATCH 170/182] clk: qcom: Add KPSS ACC/GCC driver
   5
   6 The ACC and GCC regions present in KPSSv1 contain registers to
   7 control clocks and power to each Krait CPU and L2. For CPUfreq
   8 purposes probe these devices and expose a mux clock that chooses
   9 between PXO and PLL8.
  10
  11 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  12 ---
  13  drivers/clk/qcom/Kconfig    |    8 +++
  14  drivers/clk/qcom/Makefile   |    1 +
  15  drivers/clk/qcom/kpss-xcc.c |  115 +++++++++++++++++++++++++++++++++++++++++++
  16  3 files changed, 124 insertions(+)
  17  create mode 100644 drivers/clk/qcom/kpss-xcc.c
  18
  19 --- a/drivers/clk/qcom/Kconfig
  20 +++ b/drivers/clk/qcom/Kconfig
  21 @@ -62,6 +62,14 @@ config QCOM_HFPLL
  22           Say Y if you want to support CPU frequency scaling on devices
  23           such as MSM8974, APQ8084, etc.
  24
  25 +config KPSS_XCC
  26 +       tristate "KPSS Clock Controller"
  27 +       depends on COMMON_CLK_QCOM
  28 +       help
  29 +         Support for the Krait ACC and GCC clock controllers. Say Y
  30 +         if you want to support CPU frequency scaling on devices such
  31 +         as MSM8960, APQ8064, etc.
  32 +
  33  config KRAIT_CLOCKS
  34         bool
  35         select KRAIT_L2_ACCESSORS
  36 --- a/drivers/clk/qcom/Makefile
  37 +++ b/drivers/clk/qcom/Makefile
  38 @@ -17,4 +17,5 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm896
  39  obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
  40  obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
  41  obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
  42 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
  43  obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
  44 --- /dev/null
  45 +++ b/drivers/clk/qcom/kpss-xcc.c
  46 @@ -0,0 +1,115 @@
  47 +/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
  48 + *
  49 + * This program is free software; you can redistribute it and/or modify
  50 + * it under the terms of the GNU General Public License version 2 and
  51 + * only version 2 as published by the Free Software Foundation.
  52 + *
  53 + * This program is distributed in the hope that it will be useful,
  54 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  55 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  56 + * GNU General Public License for more details.
  57 + */
  58 +
  59 +#include <linux/kernel.h>
  60 +#include <linux/init.h>
  61 +#include <linux/module.h>
  62 +#include <linux/platform_device.h>
  63 +#include <linux/err.h>
  64 +#include <linux/io.h>
  65 +#include <linux/of.h>
  66 +#include <linux/of_device.h>
  67 +#include <linux/clk.h>
  68 +#include <linux/clk-provider.h>
  69 +#include <linux/clk/msm-clk-generic.h>
  70 +
  71 +static int kpss_xcc_set_mux_sel(struct mux_clk *clk, int sel)
  72 +{
  73 +       writel_relaxed(sel, clk->base + clk->offset);
  74 +       return 0;
  75 +}
  76 +
  77 +static int kpss_xcc_get_mux_sel(struct mux_clk *clk)
  78 +{
  79 +       return readl_relaxed(clk->base + clk->offset);
  80 +}
  81 +
  82 +static const struct clk_mux_ops kpss_xcc_ops = {
  83 +       .set_mux_sel = kpss_xcc_set_mux_sel,
  84 +       .get_mux_sel = kpss_xcc_get_mux_sel,
  85 +};
  86 +
  87 +static const char *aux_parents[] = {
  88 +       "pll8_vote",
  89 +       "pxo",
  90 +};
  91 +
  92 +static u8 aux_parent_map[] = {
  93 +       3,
  94 +       0,
  95 +};
  96 +
  97 +static const struct of_device_id kpss_xcc_match_table[] = {
  98 +       { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
  99 +       { .compatible = "qcom,kpss-gcc" },
 100 +       {}
 101 +};
 102 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
 103 +
 104 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
 105 +{
 106 +       const struct of_device_id *id;
 107 +       struct clk *clk;
 108 +       struct resource *res;
 109 +       void __iomem *base;
 110 +       struct mux_clk *mux_clk;
 111 +       struct clk_init_data init = {
 112 +               .parent_names = aux_parents,
 113 +               .num_parents = 2,
 114 +               .ops = &clk_ops_gen_mux,
 115 +       };
 116 +
 117 +       id = of_match_device(kpss_xcc_match_table, &pdev->dev);
 118 +       if (!id)
 119 +               return -ENODEV;
 120 +
 121 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 122 +       base = devm_ioremap_resource(&pdev->dev, res);
 123 +       if (IS_ERR(base))
 124 +               return PTR_ERR(base);
 125 +
 126 +       mux_clk = devm_kzalloc(&pdev->dev, sizeof(*mux_clk), GFP_KERNEL);
 127 +       if (!mux_clk)
 128 +               return -ENOMEM;
 129 +
 130 +       mux_clk->mask = 0x3;
 131 +       mux_clk->parent_map = aux_parent_map;
 132 +       mux_clk->ops = &kpss_xcc_ops;
 133 +       mux_clk->base = base;
 134 +       mux_clk->hw.init = &init;
 135 +
 136 +       if (id->data) {
 137 +               if (of_property_read_string_index(pdev->dev.of_node,
 138 +                                       "clock-output-names", 0, &init.name))
 139 +                       return -ENODEV;
 140 +               mux_clk->offset = 0x14;
 141 +       } else {
 142 +               init.name = "acpu_l2_aux";
 143 +               mux_clk->offset = 0x28;
 144 +       }
 145 +
 146 +       clk = devm_clk_register(&pdev->dev, &mux_clk->hw);
 147 +
 148 +       return PTR_ERR_OR_ZERO(clk);
 149 +}
 150 +
 151 +static struct platform_driver kpss_xcc_driver = {
 152 +       .probe = kpss_xcc_driver_probe,
 153 +       .driver = {
 154 +               .name = "kpss-xcc",
 155 +               .of_match_table = kpss_xcc_match_table,
 156 +               .owner = THIS_MODULE,
 157 +       },
 158 +};
 159 +module_platform_driver(kpss_xcc_driver);
 160 +
 161 +MODULE_LICENSE("GPL v2");