kernel: update 3.14 to 3.14.18
[openwrt.git] / target / linux / ipq806x / patches / 0143-ata-qcom-Add-device-tree-bindings-information.patch
1 From dd280a4cf6b826144f74d3fc4285633f1c337a1d Mon Sep 17 00:00:00 2001
2 From: Kumar Gala <galak@codeaurora.org>
3 Date: Thu, 12 Jun 2014 11:28:47 -0500
4 Subject: [PATCH 143/182] ata: qcom: Add device tree bindings information
5
6 Add device tree binding for Qualcomm AHCI SATA controller and specifically
7 the sata controller on the IPQ806x family of SoCs.
8
9 Signed-off-by: Kumar Gala <galak@codeaurora.org>
10 ---
11  .../devicetree/bindings/ata/qcom-sata.txt          |   40 ++++++++++++++++++++
12  1 file changed, 40 insertions(+)
13  create mode 100644 Documentation/devicetree/bindings/ata/qcom-sata.txt
14
15 --- /dev/null
16 +++ b/Documentation/devicetree/bindings/ata/qcom-sata.txt
17 @@ -0,0 +1,40 @@
18 +* Qualcomm AHCI SATA Controller
19 +
20 +SATA nodes are defined to describe on-chip Serial ATA controllers.
21 +Each SATA controller should have its own node.
22 +
23 +Required properties:
24 +- compatible           : compatible list, contains "qcom,msm-ahci"
25 +- interrupts           : <interrupt mapping for SATA IRQ>
26 +- reg                  : <registers mapping>
27 +- phys                 : Must contain exactly one entry as specified
28 +                         in phy-bindings.txt
29 +- phy-names            : Must be "sata-phy"
30 +
31 +Required properties for "qcom,ipq806x-ahci" compatible:
32 +- clocks               : Must contain an entry for each entry in clock-names.
33 +- clock-names          : Shall be:
34 +                               "slave_iface" - Fabric port AHB clock for SATA
35 +                               "iface" - AHB clock
36 +                               "core" - core clock
37 +                               "rxoob" - RX out-of-band clock
38 +                               "pmalive" - Power Module Alive clock
39 +
40 +Example:
41 +       sata@29000000 {
42 +               compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
43 +               reg = <0x29000000 0x180>;
44 +
45 +               interrupts = <0 209 0x0>;
46 +
47 +               clocks = <&gcc SFAB_SATA_S_H_CLK>,
48 +                        <&gcc SATA_H_CLK>,
49 +                        <&gcc SATA_A_CLK>,
50 +                        <&gcc SATA_RXOOB_CLK>,
51 +                        <&gcc SATA_PMALIVE_CLK>;
52 +               clock-names = "slave_iface", "iface", "core",
53 +                               "rxoob", "pmalive";
54 +
55 +               phys = <&sata_phy>;
56 +               phy-names = "sata-phy";
57 +       };