kernel: update 3.14 to 3.14.18
[openwrt.git] / target / linux / ipq806x / patches / 0089-ARM-dts-MSM8974-Add-pinctrl-node.patch
1 From b3a77c7cab10272988231482e2c654c5f10a910c Mon Sep 17 00:00:00 2001
2 From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
3 Date: Thu, 6 Feb 2014 17:28:49 +0200
4 Subject: [PATCH 089/182] ARM: dts: MSM8974: Add pinctrl node
5
6 Add the pin control node and pin definitions of SPI8.
7
8 Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
9 Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
10 Acked-by: Linus Walleij <linus.walleij@linaro.org>
11 Signed-off-by: Kumar Gala <galak@codeaurora.org>
12 ---
13  arch/arm/boot/dts/qcom-msm8974.dtsi |   29 +++++++++++++++++++++++++++++
14  1 file changed, 29 insertions(+)
15
16 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
17 +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
18 @@ -198,5 +198,34 @@
19                         clocks = <&gcc GCC_PRNG_AHB_CLK>;
20                         clock-names = "core";
21                 };
22 +
23 +               msmgpio: pinctrl@fd510000 {
24 +                       compatible = "qcom,msm8974-pinctrl";
25 +                       reg = <0xfd510000 0x4000>;
26 +                       gpio-controller;
27 +                       #gpio-cells = <2>;
28 +                       interrupt-controller;
29 +                       #interrupt-cells = <2>;
30 +                       interrupts = <0 208 0>;
31 +
32 +                       spi8_default: spi8_default {
33 +                               mosi {
34 +                                       pins = "gpio45";
35 +                                       function = "blsp_spi8";
36 +                               };
37 +                               miso {
38 +                                       pins = "gpio46";
39 +                                       function = "blsp_spi8";
40 +                               };
41 +                               cs {
42 +                                       pins = "gpio47";
43 +                                       function = "blsp_spi8";
44 +                               };
45 +                               clk {
46 +                                       pins = "gpio48";
47 +                                       function = "blsp_spi8";
48 +                               };
49 +                       };
50 +               };
51         };
52  };