target/linux/imx6/patches-3.18/207-ARM-dts-imx6-ventana-Add-PCI-nodes-for-on-board-PCI-.patch

   1 From 840202d23892baaff74be11ec71c3ffc6ad6298e Mon Sep 17 00:00:00 2001
   2 From: Tim Harvey <tharvey@gateworks.com>
   3 Date: Tue, 20 Jan 2015 08:46:55 -0800
   4 Subject: [PATCH] ARM: dts: imx6 ventana: Add PCI nodes for on-board PCI
   5  devices
   6
   7 If the PCI nodes are defined, drivers can access information from the DT.
   8 For example, the sky2 enet driver can obtain the mac address configured
   9 from the bootloader (which is applied to the DT node with the ethernet1 alias).
  10
  11 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
  12 ---
  13  arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 38 +++++++++++++++++++++++++++++++++--
  14  arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 38 +++++++++++++++++++++++++++++++++--
  15  2 files changed, 72 insertions(+), 4 deletions(-)
  16
  17 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  18 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  19 @@ -280,8 +280,42 @@
  20         reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  21         status = "okay";
  22
  23 -       eth1: sky2@8 { /* MAC/PHY on bus 8 */
  24 -               compatible = "marvell,sky2";
  25 +       pcie@0,0 {
  26 +               /* 00:00.0 0604: 16c3:abcd root host-bridge */
  27 +               #address-cells = <3>;
  28 +               #size-cells = <2>;
  29 +               device_type = "pci";
  30 +               reg = <0x0 0 0 0 0>;
  31 +
  32 +               pcie@0,0 {
  33 +                       /* 01:00.0 0604: 10b5:8609 PEX switch bridge */
  34 +                       #address-cells = <3>;
  35 +                       #size-cells = <2>;
  36 +                       device_type = "pci";
  37 +                       reg = <0x0 0 0 0 0>;
  38 +
  39 +                       /*
  40 +                        * GigE PCI dev node needs to be defined so that enet
  41 +                        * driver can use it to obtain its boot-loader
  42 +                        * specified MAC
  43 +                        */
  44 +                       pcie@4,0 {
  45 +                               /* 02:04.0 0604: 10b5:8609: PEX port bridge */
  46 +                               #address-cells = <3>;
  47 +                               #size-cells = <2>;
  48 +                               device_type = "pci";
  49 +                               reg = <0x2000 0 0 0 0>;
  50 +
  51 +                               eth1: pci@0,0 {
  52 +                                       /* 04:00.0 0200: 11ab:4380: GigE */
  53 +                                       #address-cells = <3>;
  54 +                                       #size-cells = <2>;
  55 +                                       device_type = "pci";
  56 +                                       reg = <0x0 0 0 0 0>;
  57 +                                       compatible = "marvell,sky2";
  58 +                               };
  59 +                       };
  60 +               };
  61         };
  62  };
  63
  64 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  65 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  66 @@ -369,8 +369,42 @@
  67         reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  68         status = "okay";
  69
  70 -       eth1: sky2@8 { /* MAC/PHY on bus 8 */
  71 -               compatible = "marvell,sky2";
  72 +       pcie@0,0 {
  73 +               /* 00:00.0 0604: 16c3:abcd root host-bridge */
  74 +               #address-cells = <3>;
  75 +               #size-cells = <2>;
  76 +               device_type = "pci";
  77 +               reg = <0x0 0 0 0 0>;
  78 +
  79 +               pcie@0,0 {
  80 +                       /* 01:00.0 0604: 10b5:8609 PEX switch bridge */
  81 +                       #address-cells = <3>;
  82 +                       #size-cells = <2>;
  83 +                       device_type = "pci";
  84 +                       reg = <0x0 0 0 0 0>;
  85 +
  86 +                       /*
  87 +                        * GigE PCI dev node needs to be defined so that enet
  88 +                        * driver can use it to obtain its boot-loader
  89 +                        * specified MAC
  90 +                        */
  91 +                       pcie@8,0 {
  92 +                               /* 02:08.0 0604: 10b5:8609: PEX port bridge */
  93 +                               #address-cells = <3>;
  94 +                               #size-cells = <2>;
  95 +                               device_type = "pci";
  96 +                               reg = <0x4000 0 0 0 0>;
  97 +
  98 +                               eth1: pci@0,0 {
  99 +                                       /* 08:00.0 0200: 11ab:4380: GigE */
 100 +                                       #address-cells = <3>;
 101 +                                       #size-cells = <2>;
 102 +                                       device_type = "pci";
 103 +                                       reg = <0x0 0 0 0 0>;
 104 +                                       compatible = "marvell,sky2";
 105 +                               };
 106 +                       };
 107 +               };
 108         };
 109  };
 110