ddb796c3973fe2c36985d86d38e2dedc1507da1a
[openwrt.git] / target / linux / imx6 / patches-3.10 / 110-gw5400-a.patch
1 --- a/arch/arm/boot/dts/Makefile
2 +++ b/arch/arm/boot/dts/Makefile
3 @@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
4         imx6dl-sabresd.dtb \
5         imx6dl-wandboard.dtb \
6         imx6q-arm2.dtb \
7 +       imx6q-gw5400-a.dtb \
8         imx6q-sabreauto.dtb \
9         imx6q-sabrelite.dtb \
10         imx6q-sabresd.dtb \
11 --- a/arch/arm/boot/dts/imx6q.dtsi
12 +++ b/arch/arm/boot/dts/imx6q.dtsi
13 @@ -98,6 +98,14 @@
14                                                         MX6Q_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
15                                                 >;
16                                         };
17 +
18 +                                       pinctrl_audmux_3: audmux-3 {
19 +                                               fsl,pins = <
20 +                                                       MX6Q_PAD_DISP0_DAT19__AUD5_RXD  0x80000000
21 +                                                       MX6Q_PAD_EIM_D25__AUD5_RXC      0x80000000
22 +                                                       MX6Q_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000
23 +                                               >;
24 +                                       };
25                                 };
26  
27                                 ecspi1 {
28 @@ -187,6 +195,30 @@
29                                                         MX6Q_PAD_SD4_DAT0__NAND_DQS      0x00b1
30                                                 >;
31                                         };
32 +
33 +                                       /* No strobe */
34 +                                       pinctrl_gpmi_nand_2: gpmi-nand-2 {
35 +                                               fsl,pins = <
36 +                                                       MX6Q_PAD_NANDF_CLE__NAND_CLE     0xb0b1
37 +                                                       MX6Q_PAD_NANDF_ALE__NAND_ALE     0xb0b1
38 +                                                       MX6Q_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
39 +                                                       MX6Q_PAD_NANDF_RB0__NAND_READY_B 0xb000
40 +                                                       MX6Q_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
41 +                                                       MX6Q_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
42 +                                                       MX6Q_PAD_NANDF_CS2__NAND_CE2_B   0xb0b1
43 +                                                       MX6Q_PAD_NANDF_CS3__NAND_CE3_B   0xb0b1
44 +                                                       MX6Q_PAD_SD4_CMD__NAND_RE_B      0xb0b1
45 +                                                       MX6Q_PAD_SD4_CLK__NAND_WE_B      0xb0b1
46 +                                                       MX6Q_PAD_NANDF_D0__NAND_DATA00   0xb0b1
47 +                                                       MX6Q_PAD_NANDF_D1__NAND_DATA01   0xb0b1
48 +                                                       MX6Q_PAD_NANDF_D2__NAND_DATA02   0xb0b1
49 +                                                       MX6Q_PAD_NANDF_D3__NAND_DATA03   0xb0b1
50 +                                                       MX6Q_PAD_NANDF_D4__NAND_DATA04   0xb0b1
51 +                                                       MX6Q_PAD_NANDF_D5__NAND_DATA05   0xb0b1
52 +                                                       MX6Q_PAD_NANDF_D6__NAND_DATA06   0xb0b1
53 +                                                       MX6Q_PAD_NANDF_D7__NAND_DATA07   0xb0b1
54 +                                               >;
55 +                                       };
56                                 };
57  
58                                 i2c1 {
59 @@ -205,6 +237,12 @@
60                                                         MX6Q_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
61                                                 >;
62                                         };
63 +                                       pinctrl_i2c2_2: i2c2grp-2 {
64 +                                               fsl,pins = <
65 +                                                       MX6Q_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
66 +                                                       MX6Q_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
67 +                                               >;
68 +                                       };
69                                 };
70  
71                                 i2c3 {
72 @@ -214,6 +252,12 @@
73                                                         MX6Q_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
74                                                 >;
75                                         };
76 +                                       pinctrl_i2c3_2: i2c3grp-2 {
77 +                                               fsl,pins = <
78 +                                                       MX6Q_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
79 +                                                       MX6Q_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
80 +                                               >;
81 +                                       };
82                                 };
83  
84                                 uart1 {
85 @@ -223,6 +267,12 @@
86                                                         MX6Q_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
87                                                 >;
88                                         };
89 +                                       pinctrl_uart1_2: uart1grp-2 {
90 +                                               fsl,pins = <
91 +                                                       MX6Q_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
92 +                                                       MX6Q_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
93 +                                               >;
94 +                                       };
95                                 };
96  
97                                 uart2 {
98 @@ -232,6 +282,21 @@
99                                                         MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
100                                                 >;
101                                         };
102 +                                       pinctrl_uart2_2: uart2grp-2 {
103 +                                               fsl,pins = <
104 +                                                       MX6Q_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
105 +                                                       MX6Q_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
106 +                                               >;
107 +                                       };
108 +                               };
109 +
110 +                               uart3 {
111 +                                       pinctrl_uart3_1: uart3grp-1 {
112 +                                               fsl,pins = <
113 +                                                       MX6Q_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
114 +                                                       MX6Q_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
115 +                                               >;
116 +                                       };
117                                 };
118  
119                                 uart4 {
120 @@ -242,6 +307,15 @@
121                                                 >;
122                                         };
123                                 };
124 +
125 +                               uart5 {
126 +                                       pinctrl_uart5_1: uart5grp-1 {
127 +                                               fsl,pins = <
128 +                                                       MX6Q_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
129 +                                                       MX6Q_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
130 +                                               >;
131 +                                       };
132 +                               };
133  
134                                 usbotg {
135                                         pinctrl_usbotg_1: usbotggrp-1 {