target/linux/imx6/patches-3.10/0062-ARM-i.MX6q-fix-the-wrong-parent-of-can_root-clock.patch

   1 From 9b3d423707c3b1f6633be1be7e959623e10c596b Mon Sep 17 00:00:00 2001
   2 From: Jiada Wang <jiada_wang@mentor.com>
   3 Date: Wed, 30 Oct 2013 04:25:51 -0700
   4 Subject: [PATCH] ARM: i.MX6q: fix the wrong parent of can_root clock
   5
   6 instead of pll3_usb_otg the parent of can_root clock
   7 should be pll3_60m.
   8
   9 Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
  10 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
  11 ---
  12  arch/arm/mach-imx/clk-imx6q.c | 2 +-
  13  1 file changed, 1 insertion(+), 1 deletion(-)
  14
  15 --- a/arch/arm/mach-imx/clk-imx6q.c
  16 +++ b/arch/arm/mach-imx/clk-imx6q.c
  17 @@ -442,7 +442,7 @@ int __init mx6q_clocks_init(void)
  18         clk[asrc_podf]        = imx_clk_divider("asrc_podf",        "asrc_pred",         base + 0x30, 9,  3);
  19         clk[spdif_pred]       = imx_clk_divider("spdif_pred",       "spdif_sel",         base + 0x30, 25, 3);
  20         clk[spdif_podf]       = imx_clk_divider("spdif_podf",       "spdif_pred",        base + 0x30, 22, 3);
  21 -       clk[can_root]         = imx_clk_divider("can_root",         "pll3_usb_otg",      base + 0x20, 2,  6);
  22 +       clk[can_root]         = imx_clk_divider("can_root",         "pll3_60m",          base + 0x20, 2,  6);
  23         clk[ecspi_root]       = imx_clk_divider("ecspi_root",       "pll3_60m",          base + 0x38, 19, 6);
  24         clk[gpu2d_core_podf]  = imx_clk_divider("gpu2d_core_podf",  "gpu2d_core_sel",    base + 0x18, 23, 3);
  25         clk[gpu3d_core_podf]  = imx_clk_divider("gpu3d_core_podf",  "gpu3d_core_sel",    base + 0x18, 26, 3);