imx6: switch to 3.18
[openwrt.git] / target / linux / imx6 / files-3.14 / arch / arm / boot / dts / imx6qdl-gw552x.dtsi
1 /*
2  * Copyright 2014 Gateworks Corporation
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 / {
13         /* these are used by bootloader for disabling nodes */
14         aliases {
15                 led0 = &led0;
16                 led1 = &led1;
17                 led2 = &led2;
18                 nand = &gpmi;
19                 usb0 = &usbh1;
20         };
21
22         chosen {
23                 bootargs = "console=ttymxc1,115200";
24         };
25
26         leds {
27                 compatible = "gpio-leds";
28
29                 led0: user1 {
30                         label = "user1";
31                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
32                         default-state = "on";
33                         linux,default-trigger = "heartbeat";
34                 };
35
36                 led1: user2 {
37                         label = "user2";
38                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
39                         default-state = "off";
40                 };
41
42                 led2: user3 {
43                         label = "user3";
44                         gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
45                         default-state = "off";
46                 };
47         };
48
49         memory {
50                 reg = <0x10000000 0x20000000>;
51         };
52
53         regulators {
54                 compatible = "simple-bus";
55                 #address-cells = <1>;
56                 #size-cells = <0>;
57
58                 reg_1p0v: regulator@0 {
59                         compatible = "regulator-fixed";
60                         reg = <0>;
61                         regulator-name = "1P0V";
62                         regulator-min-microvolt = <1000000>;
63                         regulator-max-microvolt = <1000000>;
64                         regulator-always-on;
65                 };
66
67                 reg_3p3v: regulator@2 {
68                         compatible = "regulator-fixed";
69                         reg = <2>;
70                         regulator-name = "3P3V";
71                         regulator-min-microvolt = <3300000>;
72                         regulator-max-microvolt = <3300000>;
73                         regulator-always-on;
74                 };
75
76                 reg_5p0v: regulator@3 {
77                         compatible = "regulator-fixed";
78                         reg = <3>;
79                         regulator-name = "5P0V";
80                         regulator-min-microvolt = <5000000>;
81                         regulator-max-microvolt = <5000000>;
82                         regulator-always-on;
83                 };
84         };
85 };
86
87 &gpmi {
88         pinctrl-names = "default";
89         pinctrl-0 = <&pinctrl_gpmi_nand>;
90         status = "okay";
91 };
92
93 &i2c1 {
94         clock-frequency = <100000>;
95         pinctrl-names = "default";
96         pinctrl-0 = <&pinctrl_i2c1>;
97         status = "okay";
98
99         eeprom1: eeprom@50 {
100                 compatible = "atmel,24c02";
101                 reg = <0x50>;
102                 pagesize = <16>;
103         };
104
105         eeprom2: eeprom@51 {
106                 compatible = "atmel,24c02";
107                 reg = <0x51>;
108                 pagesize = <16>;
109         };
110
111         eeprom3: eeprom@52 {
112                 compatible = "atmel,24c02";
113                 reg = <0x52>;
114                 pagesize = <16>;
115         };
116
117         eeprom4: eeprom@53 {
118                 compatible = "atmel,24c02";
119                 reg = <0x53>;
120                 pagesize = <16>;
121         };
122
123         gpio: pca9555@23 {
124                 compatible = "nxp,pca9555";
125                 reg = <0x23>;
126                 gpio-controller;
127                 #gpio-cells = <2>;
128         };
129
130         hwmon: gsc@29 {
131                 compatible = "gw,gsp";
132                 reg = <0x29>;
133         };
134
135         rtc: ds1672@68 {
136                 compatible = "dallas,ds1672";
137                 reg = <0x68>;
138         };
139 };
140
141 &i2c2 {
142         clock-frequency = <100000>;
143         pinctrl-names = "default";
144         pinctrl-0 = <&pinctrl_i2c2>;
145         status = "okay";
146
147         pciswitch: pex8609@3f {
148                 compatible = "plx,pex8609";
149                 reg = <0x3f>;
150         };
151
152         pmic: ltc3676@3c {
153                 compatible = "ltc,ltc3676";
154                 reg = <0x3c>;
155
156                 regulators {
157                         sw1_reg: ltc3676__sw1 {
158                                 regulator-min-microvolt = <1175000>;
159                                 regulator-max-microvolt = <1175000>;
160                                 regulator-boot-on;
161                                 regulator-always-on;
162                         };
163
164                         sw2_reg: ltc3676__sw2 {
165                                 regulator-min-microvolt = <1800000>;
166                                 regulator-max-microvolt = <1800000>;
167                                 regulator-boot-on;
168                                 regulator-always-on;
169                         };
170
171                         sw3_reg: ltc3676__sw3 {
172                                 regulator-min-microvolt = <1175000>;
173                                 regulator-max-microvolt = <1175000>;
174                                 regulator-boot-on;
175                                 regulator-always-on;
176                         };
177
178                         sw4_reg: ltc3676__sw4 {
179                                 regulator-min-microvolt = <1500000>;
180                                 regulator-max-microvolt = <1500000>;
181                                 regulator-boot-on;
182                                 regulator-always-on;
183                         };
184
185                         ldo2_reg: ltc3676__ldo2 {
186                                 regulator-min-microvolt = <2500000>;
187                                 regulator-max-microvolt = <2500000>;
188                                 regulator-boot-on;
189                                 regulator-always-on;
190                         };
191
192                         ldo4_reg: ltc3676__ldo4 {
193                                 regulator-min-microvolt = <3000000>;
194                                 regulator-max-microvolt = <3000000>;
195                         };
196                 };
197         };
198 };
199
200 &i2c3 {
201         clock-frequency = <100000>;
202         pinctrl-names = "default";
203         pinctrl-0 = <&pinctrl_i2c3>;
204         status = "okay";
205 };
206
207 &iomuxc {
208         pinctrl-names = "default";
209         pinctrl-0 = <&pinctrl_hog>;
210
211         imx6qdl-gw52xx {
212                 pinctrl_hog: hoggrp {
213                         fsl,pins = <
214                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE_RST# */
215                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* USBHUB_RST# */
216                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIESKT_WDIS# */
217                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
218                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
219                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
220                          >;
221                 };
222
223                 pinctrl_gpmi_nand: gpminandgrp {
224                         fsl,pins = <
225                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
226                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
227                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
228                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
229                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
230                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
231                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
232                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
233                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
234                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
235                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
236                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
237                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
238                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
239                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
240                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
241                         >;
242                 };
243
244                 pinctrl_i2c1: i2c1grp {
245                         fsl,pins = <
246                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
247                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
248                         >;
249                 };
250
251                 pinctrl_i2c2: i2c2grp {
252                         fsl,pins = <
253                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
254                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
255                         >;
256                 };
257
258                 pinctrl_i2c3: i2c3grp {
259                         fsl,pins = <
260                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
261                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
262                         >;
263                 };
264
265                 pinctrl_uart2: uart2grp {
266                         fsl,pins = <
267                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
268                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
269                         >;
270                 };
271
272                 pinctrl_uart3: uart3grp {
273                         fsl,pins = <
274                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
275                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
276                         >;
277                 };
278
279                 pinctrl_uart5: uart5grp {
280                         fsl,pins = <
281                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
282                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
283                         >;
284                 };
285         };
286 };
287
288 &pcie {
289         reset-gpio = <&gpio1 29 0>;
290         status = "okay";
291 };
292
293 &uart2 {
294         pinctrl-names = "default";
295         pinctrl-0 = <&pinctrl_uart2>;
296         status = "okay";
297 };
298
299 &uart3 {
300         pinctrl-names = "default";
301         pinctrl-0 = <&pinctrl_uart3>;
302         status = "okay";
303 };
304
305 &uart5 {
306         pinctrl-names = "default";
307         pinctrl-0 = <&pinctrl_uart5>;
308         status = "okay";
309 };
310
311 &usbh1 {
312         status = "okay";
313 };