imx6: update PCIe driver
[openwrt.git] / target / linux / imx6 / files-3.10 / arch / arm / boot / dts / imx6q-gw5400-a.dts
1 /*
2  * Copyright 2013 Gateworks Corporation
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 /dts-v1/;
13 #include "imx6q-ventana.dtsi"
14
15 / {
16         model = "Gateworks Ventana GW5400-A";
17         compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
18
19         aliases {
20                 ethernet0 = &fec;
21                 ethernet1 = &eth1;
22                 sky2 = &eth1;
23         };
24
25         /* SDRAM addressing */
26         memory {
27                 reg = <0x10000000 0x40000000>;
28         };
29
30         chosen {
31                 bootargs = "console=ttymxc1,115200";
32         };
33
34         leds {
35                 compatible = "gpio-leds";
36
37                 led0: user0 {
38                         label = "user0";
39                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG# */
40                         linux,default-trigger = "heartbeat";
41                 };
42
43                 led1: user1 {
44                         label = "user1";
45                         gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR# */
46                 };
47
48                 led2: user2 {
49                         label = "user2";
50                         gpios = <&gpio4 15 0>; /* 111 -> MX6_LOCLEDR# */
51                 };
52         };
53
54         regulators {
55                 compatible = "simple-bus";
56
57                 reg_2p5v: 2p5v {
58                         compatible = "regulator-fixed";
59                         regulator-name = "2P5V";
60                         regulator-min-microvolt = <2500000>;
61                         regulator-max-microvolt = <2500000>;
62                         regulator-always-on;
63                 };
64
65                 reg_3p3v: 3p3v {
66                         compatible = "regulator-fixed";
67                         regulator-name = "3P3V";
68                         regulator-min-microvolt = <3300000>;
69                         regulator-max-microvolt = <3300000>;
70                         regulator-always-on;
71                 };
72
73                 reg_usb_otg_vbus: usb_otg_vbus {
74                         compatible = "regulator-fixed";
75                         regulator-name = "usb_otg_vbus";
76                         regulator-min-microvolt = <5000000>;
77                         regulator-max-microvolt = <5000000>;
78                         gpio = <&gpio3 22 0>;
79                         enable-active-high;
80                 };
81         };
82
83         sound {
84                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
85                              "fsl,imx-audio-sgtl5000";
86                 model = "imx6q-sabrelite-sgtl5000";
87                 ssi-controller = <&ssi1>;
88                 audio-codec = <&codec>;
89                 audio-routing =
90                         "MIC_IN", "Mic Jack",
91                         "Mic Jack", "Mic Bias",
92                         "Headphone Jack", "HP_OUT";
93                 mux-int-port = <1>;
94                 mux-ext-port = <4>;
95         };
96 };
97
98 &iomuxc {
99         pinctrl-names = "default";
100         pinctrl-0 = <&pinctrl_hog>;
101
102         hog {
103                 pinctrl_hog: hoggrp {
104                         fsl,pins = <
105                                 /* USB OTG Power Enable */
106                                 MX6Q_PAD_EIM_D22__GPIO3_IO22   0x80000000
107
108                                 /*  3:19 SPINOR_CS0# */
109                                 MX6Q_PAD_EIM_D19__GPIO3_IO19   0x80000000
110
111                                 /*  1:09 MX6_DIO0 (could also be PWM1_PWM0) */
112                                 MX6Q_PAD_GPIO_9__GPIO1_IO09    0x80000000
113                                 /*  1:19 MX6_DIO1 (could also be PWM2_PWM0) */
114                                 MX6Q_PAD_SD1_DAT2__GPIO1_IO19  0x80000000
115                                 /*  2:09 MX6_DIO2 (could also be PWM3_PWM0) */
116                                 MX6Q_PAD_SD4_DAT1__GPIO2_IO09  0x80000000
117                                 /*  2:10 MX6_DIO3 (could also be PWM3_PWM0) */
118                                 MX6Q_PAD_SD4_DAT2__GPIO2_IO10  0x80000000
119
120                                 /*  1:16 USBHUB_RST# */
121                                 MX6Q_PAD_SD1_DAT0__GPIO1_IO16   0x80000000
122
123                                 /* PCIE IRQ */
124                                 MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
125                                 /* PCIE RST */
126                                 MX6Q_PAD_ENET_TXD1__GPIO1_IO29  0x08000000
127
128                                 /*  1:12 MIPI_DIO */
129                                 MX6Q_PAD_SD1_DAT3__GPIO1_IO21   0x80000000
130
131                                 /*  AUD4_MCK */
132                                 MX6Q_PAD_GPIO_0__CCM_CLKO1      0x80000000
133                          >;
134                 };
135         };
136
137 #if 0
138         /* ipu1: IPU1_CSI0: HDMI reciver (Digital Video In) */
139         ipu1 {
140                 pinctrl_ipu1_1: ipu1grp-5 {
141                         fsl,pins = <
142                                 MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
143                                 MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN
144                                 MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK
145                                 MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC
146                                 MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_DATA04
147                                 MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_DATA05
148                                 MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_DATA06
149                                 MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_DATA07
150                                 MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_DATA08
151                                 MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_DATA09
152                                 MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_DATA10
153                                 MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_DATA11
154                                 MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_DATA12
155                                 MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_DATA13
156                                 MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_DATA14
157                                 MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_DATA15
158                                 MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16
159                                 MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17
160                                 MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18
161                                 MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19
162                         >;
163                 };
164         };
165
166         /* ipu2: IPU1_CSI1: Analog Video Decoder (Analog Video In) */
167         /* IPU2_CSI1: Analog Video Decoder (Analog Video In) */
168         ipu2 {
169                 pinctrl_ipu2_1: ipu2grp-1 {
170                         fsl,pins = <
171                                 MX6Q_PAD_EIM_A17__IPU2_CSI1_DATA12
172                                 MX6Q_PAD_EIM_D27__IPU2_CSI1_DATA13
173                                 MX6Q_PAD_EIM_D26__IPU2_CSI1_DATA14
174                                 MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15
175                                 MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16
176                                 MX6Q_PAD_EIM_D18__IPU2_CSI1_DATA17
177                                 MX6Q_PAD_EIM_D16__IPU2_CSI1_DATA18
178                                 MX6Q_PAD_EIM_EB2__IPU2_CSI1_DATA19
179
180                                 MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC
181                                 MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC
182 // not sure why this causes kernel to crash in early init
183 //                      MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK
184                         >;
185                 };
186         };
187
188         /* ipu3: IPU2_DISP0: Analog Video Encoder (Analog Video Out) */
189         ipu3 {
190                 pinctrl_ipu3_1: ipu3grp-5 {
191                         fsl,pins = <
192                                 MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DATA00
193                                 MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DATA01
194                                 MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DATA02
195                                 MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DATA03
196                                 MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DATA04
197                                 MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DATA05
198                                 MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DATA06
199                                 MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DATA07
200                                 MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DATA08
201                                 MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DATA09
202                                 MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DATA10
203                                 MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DATA11
204                                 MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DATA12
205                                 MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DATA13
206                                 MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DATA14
207                                 MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DATA15
208                         >;
209                 };
210         };
211 #endif
212 };
213
214 &ecspi1 {
215         pinctrl-names = "default";
216         pinctrl-0 = <&pinctrl_ecspi1_1>;
217         status = "okay";
218
219         flash: m25p80@0 {
220                 #address-cells = <1>;
221                 #size-cells = <1>;
222                 compatible = "sst,w25q256";
223                 spi-max-frequency = <30000000>;
224                 reg = <0>;
225         };
226 };
227
228 &uart1 {
229         pinctrl-names = "default";
230         pinctrl-0 = <&pinctrl_uart1_2>;
231         status = "okay";
232 };
233
234 &uart2 {
235         pinctrl-names = "default";
236         pinctrl-0 = <&pinctrl_uart2_2>;
237         status = "okay";
238 };
239
240 &uart3 {
241         pinctrl-names = "default";
242         pinctrl-0 = <&pinctrl_uart3_1>;
243         status = "okay";
244 };
245
246 &uart5 {
247         status = "okay";
248         pinctrl-names = "default";
249         pinctrl-0 = <&pinctrl_uart5_1>;
250 };
251
252 &ssi1 {
253         fsl,mode = "i2s-slave";
254         status = "okay";
255 };
256
257 &ssi2 {
258         fsl,mode = "i2s-slave";
259         status = "okay";
260 };
261
262 &can1 {
263         reg = <0x02090000 0x4000>;
264         interrupts = <0 110 0x04>;
265         //clock-frequency
266         status = "okay";
267 };
268
269 &usbh1 {
270         status = "okay";
271 };
272
273 &pcie {
274         reset-gpios = <&gpio1 29 0>;
275         status = "okay";
276
277         eth1: sky2@8 { /* MAC/PHY on bus 8 */
278                 compatible = "marvell,sky2";
279                 /* Filled in by U-Boot */
280                 mac-address = [ 00 00 00 00 00 00 ];
281         };      
282 };
283
284 &fec {
285         pinctrl-names = "default";
286         pinctrl-0 = <&pinctrl_enet_1>;
287         phy-mode = "rgmii";
288         phy-reset-gpios = <&gpio1 30 0>;
289         status = "okay";
290 };
291
292 &usdhc3 {
293         pinctrl-names = "default";
294         pinctrl-0 = <&pinctrl_usdhc3_2>;
295         cd-gpios = <&gpio7 0 0>;
296         vmmc-supply = <&reg_3p3v>;
297         status = "okay";
298 };
299
300 &audmux {
301         pinctrl-names = "default";
302         pinctrl-0 = <&pinctrl_audmux_3>;
303         status = "okay";
304 };
305
306 &i2c1 {
307         status = "okay";
308         clock-frequency = <100000>;
309         pinctrl-names = "default";
310         pinctrl-0 = <&pinctrl_i2c1_1>;
311
312         eeprom: eeprom@50 {
313                 compatible = "atmel,24c02";
314                 reg = <0x50>;
315                 pagesize = <16>;
316         };
317
318         eeprom1: eeprom@50 {
319                 compatible = "atmel,24c02";
320                 reg = <0x50>;
321                 pagesize = <16>;
322         };
323
324         eeprom2: eeprom@51 {
325                 compatible = "atmel,24c02";
326                 reg = <0x51>;
327                 pagesize = <16>;
328         };
329
330         eeprom3: eeprom@52 {
331                 compatible = "atmel,24c02";
332                 reg = <0x52>;
333                 pagesize = <16>;
334         };
335
336         eeprom4: eeprom@53 {
337                 compatible = "atmel,24c02";
338                 reg = <0x53>;
339                 pagesize = <16>;
340         };
341
342         rtc: ds1672@68 {
343                 compatible = "dallas,ds1672";
344                 reg = <0x68>;
345         };
346
347         gpio: pca9555@23 {
348                 compatible = "nxp,pca9555";
349                 reg = <0x23>;
350                 gpio-controller;
351                 #gpio-cells = <2>;
352         };
353
354         hwmon: gsc@29 {
355                 compatible = "gw,gsp";
356                 reg = <0x29>;
357         };
358 };
359
360 &i2c2 {
361         status = "okay";
362         clock-frequency = <100000>;
363         pinctrl-names = "default";
364         pinctrl-0 = <&pinctrl_i2c2_2>;
365
366         pmic: pfuze@08 {
367                 compatible = "fsl,pfuze100";
368                 reg = <0x0a>;
369         };
370
371         pciswitch: pex8609@3f {
372                 compatible = "plx,pex8609";
373                 reg = <0x3f>;
374         };
375
376         pciclkgen: si52147@6b {
377                 compatible = "sil,si52147";
378                 reg = <0x6b>;
379         };
380 };
381
382 &i2c3 {
383         status = "okay";
384         clock-frequency = <100000>;
385         pinctrl-names = "default";
386         pinctrl-0 = <&pinctrl_i2c3_2>;
387
388         codec: sgtl5000@0a {
389                 compatible = "fsl,sgtl5000";
390                 reg = <0x0a>;
391                 clocks = <&clks 169>;
392                 VDDA-supply = <&reg_2p5v>;
393                 VDDIO-supply = <&reg_3p3v>;
394         };
395
396         accelerometer: mma8450@1c {
397                 compatible = "fsl,mma8450";
398                 reg = <0x1c>;
399         };
400
401         videoout: adv7393@2a {
402                 compatible = "adi,adv7393";
403                 reg = <0x2a>;
404         };
405
406         videoin: adv7180@20 {
407                 compatible = "adi,adv7180";
408                 reg = <0x20>;
409         };
410
411         hdmiin: adv7611@4c {
412                 compatible = "adi,adv7611";
413                 reg = <0x4c>;
414         };
415
416         touchscreen: egalax_ts@04 {
417                 compatible = "eeti,egalax_ts";
418                 reg = <0x04>;
419                 wakeup-gpios = <&gpio1 12 0>;
420         };
421 };
422
423 &ldb {
424         status = "okay";
425         lvds-channel@0 {
426                 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
427         };
428 };