target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv {
  40         struct switch_dev dev;
  41         struct phy_device *phy;
  42         u32 (*read)(struct ar8216_priv *priv, int reg);
  43         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  44         const struct net_device_ops *ndo_old;
  45         struct net_device_ops ndo;
  46         struct mutex reg_mutex;
  47         int chip;
  48         bool initialized;
  49         bool port4_phy;
  50         char buf[80];
  51
  52         bool init;
  53
  54         /* all fields below are cleared on reset */
  55         bool vlan;
  56         u16 vlan_id[AR8X16_MAX_VLANS];
  57         u8 vlan_table[AR8X16_MAX_VLANS];
  58         u8 vlan_tagged;
  59         u16 pvid[AR8216_NUM_PORTS];
  60 };
  61
  62 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  63
  64 static inline void
  65 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  66 {
  67         regaddr >>= 1;
  68         *r1 = regaddr & 0x1e;
  69
  70         regaddr >>= 5;
  71         *r2 = regaddr & 0x7;
  72
  73         regaddr >>= 3;
  74         *page = regaddr & 0x1ff;
  75 }
  76
  77 static u32
  78 ar8216_mii_read(struct ar8216_priv *priv, int reg)
  79 {
  80         struct phy_device *phy = priv->phy;
  81         struct mii_bus *bus = phy->bus;
  82         u16 r1, r2, page;
  83         u16 lo, hi;
  84
  85         split_addr((u32) reg, &r1, &r2, &page);
  86
  87         mutex_lock(&bus->mdio_lock);
  88
  89         bus->write(bus, 0x18, 0, page);
  90         usleep_range(1000, 2000); /* wait for the page switch to propagate */
  91         lo = bus->read(bus, 0x10 | r2, r1);
  92         hi = bus->read(bus, 0x10 | r2, r1 + 1);
  93
  94         mutex_unlock(&bus->mdio_lock);
  95
  96         return (hi << 16) | lo;
  97 }
  98
  99 static void
 100 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 101 {
 102         struct phy_device *phy = priv->phy;
 103         struct mii_bus *bus = phy->bus;
 104         u16 r1, r2, r3;
 105         u16 lo, hi;
 106
 107         split_addr((u32) reg, &r1, &r2, &r3);
 108         lo = val & 0xffff;
 109         hi = (u16) (val >> 16);
 110
 111         mutex_lock(&bus->mdio_lock);
 112
 113         bus->write(bus, 0x18, 0, r3);
 114         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 115         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 116         bus->write(bus, 0x10 | r2, r1, lo);
 117
 118         mutex_unlock(&bus->mdio_lock);
 119 }
 120
 121 static void
 122 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 123                      u16 dbg_addr, u16 dbg_data)
 124 {
 125         struct mii_bus *bus = priv->phy->bus;
 126
 127         mutex_lock(&bus->mdio_lock);
 128         bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
 129         bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
 130         mutex_unlock(&bus->mdio_lock);
 131 }
 132
 133 static u32
 134 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 135 {
 136         u32 v;
 137
 138         lockdep_assert_held(&priv->reg_mutex);
 139
 140         v = priv->read(priv, reg);
 141         v &= ~mask;
 142         v |= val;
 143         priv->write(priv, reg, v);
 144
 145         return v;
 146 }
 147
 148 static inline int
 149 ar8216_id_chip(struct ar8216_priv *priv)
 150 {
 151         u32 val;
 152         u16 id;
 153         int i;
 154
 155         priv->chip = UNKNOWN;
 156
 157         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 158         if (val == ~0)
 159                 return -ENODEV;
 160
 161         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 162         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 163                 u16 t;
 164
 165                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 166                 if (val == ~0)
 167                         return -ENODEV;
 168
 169                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 170                 if (t != id)
 171                         return -ENODEV;
 172         }
 173
 174         switch (id) {
 175         case 0x0101:
 176                 priv->chip = AR8216;
 177                 break;
 178         case 0x0301:
 179                 priv->chip = AR8236;
 180                 break;
 181         case 0x1000:
 182         case 0x1001:
 183                 priv->chip = AR8316;
 184                 break;
 185         default:
 186                 printk(KERN_DEBUG
 187                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 188                         (int)(id >> AR8216_CTRL_VERSION_S),
 189                         (int)(id & AR8216_CTRL_REVISION),
 190                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 191                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 192
 193                 return -ENODEV;
 194         }
 195
 196         return 0;
 197 }
 198
 199 static void
 200 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 201                       struct switch_port_link *link)
 202 {
 203         u32 status;
 204         u32 speed;
 205
 206         memset(link, '\0', sizeof(*link));
 207
 208         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 209
 210         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 211         if (link->aneg) {
 212                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 213                 if (!link->link)
 214                         return;
 215         } else {
 216                 link->link = true;
 217         }
 218
 219         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 220         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 221         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 222
 223         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 224                  AR8216_PORT_STATUS_SPEED_S;
 225
 226         switch (speed) {
 227         case AR8216_PORT_SPEED_10M:
 228                 link->speed = SWITCH_PORT_SPEED_10;
 229                 break;
 230         case AR8216_PORT_SPEED_100M:
 231                 link->speed = SWITCH_PORT_SPEED_100;
 232                 break;
 233         case AR8216_PORT_SPEED_1000M:
 234                 link->speed = SWITCH_PORT_SPEED_1000;
 235                 break;
 236         default:
 237                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 238                 break;
 239         }
 240 }
 241
 242 static int
 243 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 244                 struct switch_val *val)
 245 {
 246         struct ar8216_priv *priv = to_ar8216(dev);
 247         priv->vlan = !!val->value.i;
 248         return 0;
 249 }
 250
 251 static int
 252 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 253                 struct switch_val *val)
 254 {
 255         struct ar8216_priv *priv = to_ar8216(dev);
 256         val->value.i = priv->vlan;
 257         return 0;
 258 }
 259
 260
 261 static int
 262 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 263 {
 264         struct ar8216_priv *priv = to_ar8216(dev);
 265
 266         /* make sure no invalid PVIDs get set */
 267
 268         if (vlan >= dev->vlans)
 269                 return -EINVAL;
 270
 271         priv->pvid[port] = vlan;
 272         return 0;
 273 }
 274
 275 static int
 276 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 277 {
 278         struct ar8216_priv *priv = to_ar8216(dev);
 279         *vlan = priv->pvid[port];
 280         return 0;
 281 }
 282
 283 static int
 284 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 285                struct switch_val *val)
 286 {
 287         struct ar8216_priv *priv = to_ar8216(dev);
 288         priv->vlan_id[val->port_vlan] = val->value.i;
 289         return 0;
 290 }
 291
 292 static int
 293 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 294                struct switch_val *val)
 295 {
 296         struct ar8216_priv *priv = to_ar8216(dev);
 297         val->value.i = priv->vlan_id[val->port_vlan];
 298         return 0;
 299 }
 300
 301 static int
 302 ar8216_get_port_link(struct switch_dev *dev, int port,
 303                      struct switch_port_link *link)
 304 {
 305         struct ar8216_priv *priv = to_ar8216(dev);
 306
 307         ar8216_read_port_link(priv, port, link);
 308         return 0;
 309 }
 310
 311 static int
 312 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 313 {
 314         struct ar8216_priv *priv = dev->phy_ptr;
 315         unsigned char *buf;
 316
 317         if (unlikely(!priv))
 318                 goto error;
 319
 320         if (!priv->vlan)
 321                 goto send;
 322
 323         if (unlikely(skb_headroom(skb) < 2)) {
 324                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 325                         goto error;
 326         }
 327
 328         buf = skb_push(skb, 2);
 329         buf[0] = 0x10;
 330         buf[1] = 0x80;
 331
 332 send:
 333         return priv->ndo_old->ndo_start_xmit(skb, dev);
 334
 335 error:
 336         dev_kfree_skb_any(skb);
 337         return 0;
 338 }
 339
 340 static int
 341 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 342 {
 343         struct ar8216_priv *priv;
 344         struct net_device *dev;
 345         unsigned char *buf;
 346         int port, vlan;
 347
 348         dev = skb->dev;
 349         if (!dev)
 350                 goto error;
 351
 352         priv = dev->phy_ptr;
 353         if (!priv)
 354                 goto error;
 355
 356         /* don't strip the header if vlan mode is disabled */
 357         if (!priv->vlan)
 358                 goto recv;
 359
 360         /* strip header, get vlan id */
 361         buf = skb->data;
 362         skb_pull(skb, 2);
 363
 364         /* check for vlan header presence */
 365         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 366                 goto recv;
 367
 368         port = buf[0] & 0xf;
 369
 370         /* no need to fix up packets coming from a tagged source */
 371         if (priv->vlan_tagged & (1 << port))
 372                 goto recv;
 373
 374         /* lookup port vid from local table, the switch passes an invalid vlan id */
 375         vlan = priv->vlan_id[priv->pvid[port]];
 376
 377         buf[14 + 2] &= 0xf0;
 378         buf[14 + 2] |= vlan >> 8;
 379         buf[15 + 2] = vlan & 0xff;
 380
 381 recv:
 382         skb->protocol = eth_type_trans(skb, skb->dev);
 383
 384         if (napi)
 385                 return netif_receive_skb(skb);
 386         else
 387                 return netif_rx(skb);
 388
 389 error:
 390         /* no vlan? eat the packet! */
 391         dev_kfree_skb_any(skb);
 392         return NET_RX_DROP;
 393 }
 394
 395 static int
 396 ar8216_netif_rx(struct sk_buff *skb)
 397 {
 398         return ar8216_mangle_rx(skb, 0);
 399 }
 400
 401 static int
 402 ar8216_netif_receive_skb(struct sk_buff *skb)
 403 {
 404         return ar8216_mangle_rx(skb, 1);
 405 }
 406
 407
 408 static struct switch_attr ar8216_globals[] = {
 409         {
 410                 .type = SWITCH_TYPE_INT,
 411                 .name = "enable_vlan",
 412                 .description = "Enable VLAN mode",
 413                 .set = ar8216_set_vlan,
 414                 .get = ar8216_get_vlan,
 415                 .max = 1
 416         },
 417 };
 418
 419 static struct switch_attr ar8216_port[] = {
 420 };
 421
 422 static struct switch_attr ar8216_vlan[] = {
 423         {
 424                 .type = SWITCH_TYPE_INT,
 425                 .name = "vid",
 426                 .description = "VLAN ID (0-4094)",
 427                 .set = ar8216_set_vid,
 428                 .get = ar8216_get_vid,
 429                 .max = 4094,
 430         },
 431 };
 432
 433
 434 static int
 435 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 436 {
 437         struct ar8216_priv *priv = to_ar8216(dev);
 438         u8 ports = priv->vlan_table[val->port_vlan];
 439         int i;
 440
 441         val->len = 0;
 442         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 443                 struct switch_port *p;
 444
 445                 if (!(ports & (1 << i)))
 446                         continue;
 447
 448                 p = &val->value.ports[val->len++];
 449                 p->id = i;
 450                 if (priv->vlan_tagged & (1 << i))
 451                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 452                 else
 453                         p->flags = 0;
 454         }
 455         return 0;
 456 }
 457
 458 static int
 459 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 460 {
 461         struct ar8216_priv *priv = to_ar8216(dev);
 462         u8 *vt = &priv->vlan_table[val->port_vlan];
 463         int i, j;
 464
 465         *vt = 0;
 466         for (i = 0; i < val->len; i++) {
 467                 struct switch_port *p = &val->value.ports[i];
 468
 469                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 470                         priv->vlan_tagged |= (1 << p->id);
 471                 } else {
 472                         priv->vlan_tagged &= ~(1 << p->id);
 473                         priv->pvid[p->id] = val->port_vlan;
 474
 475                         /* make sure that an untagged port does not
 476                          * appear in other vlans */
 477                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 478                                 if (j == val->port_vlan)
 479                                         continue;
 480                                 priv->vlan_table[j] &= ~(1 << p->id);
 481                         }
 482                 }
 483
 484                 *vt |= 1 << p->id;
 485         }
 486         return 0;
 487 }
 488
 489 static int
 490 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 491 {
 492         int timeout = 20;
 493         u32 t = 0;
 494
 495         while (1) {
 496                 t = priv->read(priv, reg);
 497                 if ((t & mask) == val)
 498                         return 0;
 499
 500                 if (timeout-- <= 0)
 501                         break;
 502
 503                 udelay(10);
 504         }
 505
 506         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 507                (unsigned int) reg, t, mask, val);
 508         return -ETIMEDOUT;
 509 }
 510
 511 static void
 512 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 513 {
 514         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 515                 return;
 516         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 517                 val &= AR8216_VTUDATA_MEMBER;
 518                 val |= AR8216_VTUDATA_VALID;
 519                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 520         }
 521         op |= AR8216_VTU_ACTIVE;
 522         priv->write(priv, AR8216_REG_VTU, op);
 523 }
 524
 525 static void
 526 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 527                   u32 members, u32 pvid)
 528 {
 529         u32 header;
 530
 531         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
 532                 header = AR8216_PORT_CTRL_HEADER;
 533         else
 534                 header = 0;
 535
 536         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 537                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 538                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 539                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 540                    AR8216_PORT_CTRL_LEARN | header |
 541                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 542                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 543
 544         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 545                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 546                    AR8216_PORT_VLAN_DEFAULT_ID,
 547                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 548                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 549                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 550 }
 551
 552 static void
 553 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 554                   u32 members, u32 pvid)
 555 {
 556         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 557                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 558                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 559                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 560                    AR8216_PORT_CTRL_LEARN |
 561                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 562                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 563
 564         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 565                    AR8236_PORT_VLAN_DEFAULT_ID,
 566                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 567
 568         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 569                    AR8236_PORT_VLAN2_VLAN_MODE |
 570                    AR8236_PORT_VLAN2_MEMBER,
 571                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 572                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 573 }
 574
 575 static int
 576 ar8216_hw_apply(struct switch_dev *dev)
 577 {
 578         struct ar8216_priv *priv = to_ar8216(dev);
 579         u8 portmask[AR8216_NUM_PORTS];
 580         int i, j;
 581
 582         mutex_lock(&priv->reg_mutex);
 583         /* flush all vlan translation unit entries */
 584         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 585
 586         memset(portmask, 0, sizeof(portmask));
 587         if (!priv->init) {
 588                 /* calculate the port destination masks and load vlans
 589                  * into the vlan translation unit */
 590                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 591                         u8 vp = priv->vlan_table[j];
 592
 593                         if (!vp)
 594                                 continue;
 595
 596                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 597                                 u8 mask = (1 << i);
 598                                 if (vp & mask)
 599                                         portmask[i] |= vp & ~mask;
 600                         }
 601
 602                         ar8216_vtu_op(priv,
 603                                 AR8216_VTU_OP_LOAD |
 604                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
 605                                 priv->vlan_table[j]);
 606                 }
 607         } else {
 608                 /* vlan disabled:
 609                  * isolate all ports, but connect them to the cpu port */
 610                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 611                         if (i == AR8216_PORT_CPU)
 612                                 continue;
 613
 614                         portmask[i] = 1 << AR8216_PORT_CPU;
 615                         portmask[AR8216_PORT_CPU] |= (1 << i);
 616                 }
 617         }
 618
 619         /* update the port destination mask registers and tag settings */
 620         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 621                 int egress, ingress;
 622                 int pvid;
 623
 624                 if (priv->vlan) {
 625                         pvid = priv->vlan_id[priv->pvid[i]];
 626                         if (priv->vlan_tagged & (1 << i))
 627                                 egress = AR8216_OUT_ADD_VLAN;
 628                         else
 629                                 egress = AR8216_OUT_STRIP_VLAN;
 630                         ingress = AR8216_IN_SECURE;
 631                 } else {
 632                         pvid = i;
 633                         egress = AR8216_OUT_KEEP;
 634                         ingress = AR8216_IN_PORT_ONLY;
 635                 }
 636
 637                 if (priv->chip == AR8236)
 638                         ar8236_setup_port(priv, i, egress, ingress, portmask[i],
 639                                           pvid);
 640                 else
 641                         ar8216_setup_port(priv, i, egress, ingress, portmask[i],
 642                                           pvid);
 643         }
 644         mutex_unlock(&priv->reg_mutex);
 645         return 0;
 646 }
 647
 648 static int
 649 ar8216_hw_init(struct ar8216_priv *priv)
 650 {
 651         return 0;
 652 }
 653
 654 static int
 655 ar8236_hw_init(struct ar8216_priv *priv)
 656 {
 657         int i;
 658         struct mii_bus *bus;
 659
 660         if (priv->initialized)
 661                 return 0;
 662
 663         /* Initialize the PHYs */
 664         bus = priv->phy->bus;
 665         for (i = 0; i < 5; i++) {
 666                 mdiobus_write(bus, i, MII_ADVERTISE,
 667                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 668                               ADVERTISE_PAUSE_ASYM);
 669                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 670         }
 671         msleep(1000);
 672
 673         priv->initialized = true;
 674         return 0;
 675 }
 676
 677 static int
 678 ar8316_hw_init(struct ar8216_priv *priv)
 679 {
 680         int i;
 681         u32 val, newval;
 682         struct mii_bus *bus;
 683
 684         val = priv->read(priv, 0x8);
 685
 686         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 687                 if (priv->port4_phy) {
 688                         /* value taken from Ubiquiti RouterStation Pro */
 689                         newval = 0x81461bea;
 690                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 691                 } else {
 692                         newval = 0x01261be2;
 693                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 694                 }
 695         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 696                 /* value taken from AVM Fritz!Box 7390 sources */
 697                 newval = 0x010e5b71;
 698         } else {
 699                 /* no known value for phy interface */
 700                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 701                         priv->phy->interface);
 702                 return -EINVAL;
 703         }
 704
 705         if (val == newval)
 706                 goto out;
 707
 708         priv->write(priv, 0x8, newval);
 709
 710         /* Initialize the ports */
 711         bus = priv->phy->bus;
 712         for (i = 0; i < 5; i++) {
 713                 if ((i == 4) && priv->port4_phy &&
 714                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 715                         /* work around for phy4 rgmii mode */
 716                         ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
 717                         /* rx delay */
 718                         ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
 719                         /* tx delay */
 720                         ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
 721                         msleep(1000);
 722                 }
 723
 724                 /* initialize the port itself */
 725                 mdiobus_write(bus, i, MII_ADVERTISE,
 726                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 727                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 728                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 729                 msleep(1000);
 730         }
 731
 732 out:
 733         priv->initialized = true;
 734         return 0;
 735 }
 736
 737 static void
 738 ar8216_init_globals(struct ar8216_priv *priv)
 739 {
 740         switch (priv->chip) {
 741         case AR8216:
 742                 /* standard atheros magic */
 743                 priv->write(priv, 0x38, 0xc000050e);
 744
 745                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 746                            AR8216_GCTRL_MTU, 1518 + 8 + 2);
 747                 break;
 748         case AR8316:
 749                 /* standard atheros magic */
 750                 priv->write(priv, 0x38, 0xc000050e);
 751
 752                 /* enable cpu port to receive multicast and broadcast frames */
 753                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 754
 755                 /* fall through */
 756         case AR8236:
 757                 /* enable jumbo frames */
 758                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 759                            AR8316_GCTRL_MTU, 9018 + 8 + 2);
 760                 break;
 761         }
 762 }
 763
 764 static void
 765 ar8216_init_port(struct ar8216_priv *priv, int port)
 766 {
 767         /* Enable port learning and tx */
 768         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 769                 AR8216_PORT_CTRL_LEARN |
 770                 (4 << AR8216_PORT_CTRL_STATE_S));
 771
 772         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 773
 774         if (port == AR8216_PORT_CPU) {
 775                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 776                         AR8216_PORT_STATUS_LINK_UP |
 777                         ((priv->chip == AR8316) ?
 778                                 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
 779                         AR8216_PORT_STATUS_TXMAC |
 780                         AR8216_PORT_STATUS_RXMAC |
 781                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 782                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 783                         AR8216_PORT_STATUS_DUPLEX);
 784         } else {
 785                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 786                         AR8216_PORT_STATUS_LINK_AUTO);
 787         }
 788 }
 789
 790 static int
 791 ar8216_reset_switch(struct switch_dev *dev)
 792 {
 793         struct ar8216_priv *priv = to_ar8216(dev);
 794         int i;
 795
 796         mutex_lock(&priv->reg_mutex);
 797         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 798                 offsetof(struct ar8216_priv, vlan));
 799
 800         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 801                 priv->vlan_id[i] = i;
 802
 803         /* Configure all ports */
 804         for (i = 0; i < AR8216_NUM_PORTS; i++)
 805                 ar8216_init_port(priv, i);
 806
 807         ar8216_init_globals(priv);
 808         mutex_unlock(&priv->reg_mutex);
 809
 810         return ar8216_hw_apply(dev);
 811 }
 812
 813
 814 static const struct switch_dev_ops ar8216_ops = {
 815         .attr_global = {
 816                 .attr = ar8216_globals,
 817                 .n_attr = ARRAY_SIZE(ar8216_globals),
 818         },
 819         .attr_port = {
 820                 .attr = ar8216_port,
 821                 .n_attr = ARRAY_SIZE(ar8216_port),
 822         },
 823         .attr_vlan = {
 824                 .attr = ar8216_vlan,
 825                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 826         },
 827         .get_port_pvid = ar8216_get_pvid,
 828         .set_port_pvid = ar8216_set_pvid,
 829         .get_vlan_ports = ar8216_get_ports,
 830         .set_vlan_ports = ar8216_set_ports,
 831         .apply_config = ar8216_hw_apply,
 832         .reset_switch = ar8216_reset_switch,
 833         .get_port_link = ar8216_get_port_link,
 834 };
 835
 836 static int
 837 ar8216_config_init(struct phy_device *pdev)
 838 {
 839         struct ar8216_priv *priv = pdev->priv;
 840         struct net_device *dev = pdev->attached_dev;
 841         struct switch_dev *swdev;
 842         int ret;
 843
 844         if (!priv) {
 845                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 846                 if (priv == NULL)
 847                         return -ENOMEM;
 848         }
 849
 850         priv->phy = pdev;
 851
 852         ret = ar8216_id_chip(priv);
 853         if (ret)
 854                 goto err_free_priv;
 855
 856         if (pdev->addr != 0) {
 857                 if (priv->chip == AR8316) {
 858                         pdev->supported |= SUPPORTED_1000baseT_Full;
 859                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 860
 861                         /* check if we're attaching to the switch twice */
 862                         pdev = pdev->bus->phy_map[0];
 863                         if (!pdev) {
 864                                 kfree(priv);
 865                                 return 0;
 866                         }
 867
 868                         /* switch device has not been initialized, reuse priv */
 869                         if (!pdev->priv) {
 870                                 priv->port4_phy = true;
 871                                 pdev->priv = priv;
 872                                 return 0;
 873                         }
 874
 875                         kfree(priv);
 876
 877                         /* switch device has been initialized, reinit */
 878                         priv = pdev->priv;
 879                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 880                         priv->initialized = false;
 881                         priv->port4_phy = true;
 882                         ar8316_hw_init(priv);
 883                         return 0;
 884                 }
 885
 886                 kfree(priv);
 887                 return 0;
 888         }
 889
 890         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 891                 pdev->attached_dev->name, priv->chip);
 892
 893         pdev->supported = priv->chip == AR8316 ?
 894                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
 895         pdev->advertising = pdev->supported;
 896
 897         mutex_init(&priv->reg_mutex);
 898         priv->read = ar8216_mii_read;
 899         priv->write = ar8216_mii_write;
 900
 901         pdev->priv = priv;
 902
 903         swdev = &priv->dev;
 904         swdev->cpu_port = AR8216_PORT_CPU;
 905         swdev->ops = &ar8216_ops;
 906         swdev->ports = AR8216_NUM_PORTS;
 907
 908         if (priv->chip == AR8316) {
 909                 swdev->name = "Atheros AR8316";
 910                 swdev->vlans = AR8X16_MAX_VLANS;
 911
 912                 if (priv->port4_phy) {
 913                         /* port 5 connected to the other mac, therefore unusable */
 914                         swdev->ports = (AR8216_NUM_PORTS - 1);
 915                 }
 916         } else if (priv->chip == AR8236) {
 917                 swdev->name = "Atheros AR8236";
 918                 swdev->vlans = AR8216_NUM_VLANS;
 919                 swdev->ports = AR8216_NUM_PORTS;
 920         } else {
 921                 swdev->name = "Atheros AR8216";
 922                 swdev->vlans = AR8216_NUM_VLANS;
 923         }
 924
 925         ret = register_switch(&priv->dev, pdev->attached_dev);
 926         if (ret)
 927                 goto err_free_priv;
 928
 929         priv->init = true;
 930
 931         ret = 0;
 932         if (priv->chip == AR8216)
 933                 ret = ar8216_hw_init(priv);
 934         else if (priv->chip == AR8236)
 935                 ret = ar8236_hw_init(priv);
 936         else if (priv->chip == AR8316)
 937                 ret = ar8316_hw_init(priv);
 938
 939         if (ret)
 940                 goto err_free_priv;
 941
 942         ret = ar8216_reset_switch(&priv->dev);
 943         if (ret)
 944                 goto err_free_priv;
 945
 946         dev->phy_ptr = priv;
 947
 948         /* VID fixup only needed on ar8216 */
 949         if (pdev->addr == 0 && priv->chip == AR8216) {
 950                 pdev->pkt_align = 2;
 951                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
 952                 pdev->netif_rx = ar8216_netif_rx;
 953                 priv->ndo_old = dev->netdev_ops;
 954                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
 955                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
 956                 dev->netdev_ops = &priv->ndo;
 957         }
 958
 959         priv->init = false;
 960
 961         return 0;
 962
 963 err_free_priv:
 964         kfree(priv);
 965         return ret;
 966 }
 967
 968 static int
 969 ar8216_read_status(struct phy_device *phydev)
 970 {
 971         struct ar8216_priv *priv = phydev->priv;
 972         struct switch_port_link link;
 973         int ret;
 974
 975         if (phydev->addr != 0)
 976                 return genphy_read_status(phydev);
 977
 978         ar8216_read_port_link(priv, phydev->addr, &link);
 979         phydev->link = !!link.link;
 980         if (!phydev->link)
 981                 return 0;
 982
 983         switch (link.speed) {
 984         case SWITCH_PORT_SPEED_10:
 985                 phydev->speed = SPEED_10;
 986                 break;
 987         case SWITCH_PORT_SPEED_100:
 988                 phydev->speed = SPEED_100;
 989                 break;
 990         case SWITCH_PORT_SPEED_1000:
 991                 phydev->speed = SPEED_1000;
 992                 break;
 993         default:
 994                 phydev->speed = 0;
 995         }
 996         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
 997
 998         /* flush the address translation unit */
 999         mutex_lock(&priv->reg_mutex);
1000         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1001         if (!ret)
1002                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1003         mutex_unlock(&priv->reg_mutex);
1004
1005         phydev->state = PHY_RUNNING;
1006         netif_carrier_on(phydev->attached_dev);
1007         phydev->adjust_link(phydev->attached_dev);
1008
1009         return ret;
1010 }
1011
1012 static int
1013 ar8216_config_aneg(struct phy_device *phydev)
1014 {
1015         if (phydev->addr == 0)
1016                 return 0;
1017
1018         return genphy_config_aneg(phydev);
1019 }
1020
1021 static int
1022 ar8216_probe(struct phy_device *pdev)
1023 {
1024         struct ar8216_priv priv;
1025
1026         priv.phy = pdev;
1027         return ar8216_id_chip(&priv);
1028 }
1029
1030 static void
1031 ar8216_remove(struct phy_device *pdev)
1032 {
1033         struct ar8216_priv *priv = pdev->priv;
1034         struct net_device *dev = pdev->attached_dev;
1035
1036         if (!priv)
1037                 return;
1038
1039         if (priv->ndo_old && dev)
1040                 dev->netdev_ops = priv->ndo_old;
1041         if (pdev->addr == 0)
1042                 unregister_switch(&priv->dev);
1043         kfree(priv);
1044 }
1045
1046 static struct phy_driver ar8216_driver = {
1047         .phy_id         = 0x004d0000,
1048         .name           = "Atheros AR8216/AR8236/AR8316",
1049         .phy_id_mask    = 0xffff0000,
1050         .features       = PHY_BASIC_FEATURES,
1051         .probe          = ar8216_probe,
1052         .remove         = ar8216_remove,
1053         .config_init    = &ar8216_config_init,
1054         .config_aneg    = &ar8216_config_aneg,
1055         .read_status    = &ar8216_read_status,
1056         .driver         = { .owner = THIS_MODULE },
1057 };
1058
1059 int __init
1060 ar8216_init(void)
1061 {
1062         return phy_driver_register(&ar8216_driver);
1063 }
1064
1065 void __exit
1066 ar8216_exit(void)
1067 {
1068         phy_driver_unregister(&ar8216_driver);
1069 }
1070
1071 module_init(ar8216_init);
1072 module_exit(ar8216_exit);
1073 MODULE_LICENSE("GPL");
1074