bf0a192684193d9fd55bdaf95af2f6c2b1e319bf
[openwrt.git] / target / linux / brcm47xx / patches-3.6 / 900-bcm47xx_wdt-noprescale.patch
1 --- a/drivers/watchdog/bcm47xx_wdt.c
2 +++ b/drivers/watchdog/bcm47xx_wdt.c
3 @@ -33,6 +33,7 @@
4  
5  #define WDT_DEFAULT_TIME       30      /* seconds */
6  #define WDT_MAX_TIME           255     /* seconds */
7 +#define WDT_SHIFT              15      /* 32.768 KHz on cores with slow WDT clock */
8  
9  static int wdt_time = WDT_DEFAULT_TIME;
10  static bool nowayout = WATCHDOG_NOWAYOUT;
11 @@ -52,20 +53,20 @@ static unsigned long bcm47xx_wdt_busy;
12  static char expect_release;
13  static struct timer_list wdt_timer;
14  static atomic_t ticks;
15 +static int needs_sw_scale;
16  
17 -static inline void bcm47xx_wdt_hw_start(void)
18 +static inline void bcm47xx_wdt_hw_start(u32 ticks)
19  {
20 -       /* this is 2,5s on 100Mhz clock  and 2s on 133 Mhz */
21         switch (bcm47xx_bus_type) {
22  #ifdef CONFIG_BCM47XX_SSB
23         case BCM47XX_BUS_TYPE_SSB:
24 -               ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff);
25 +               ssb_watchdog_timer_set(&bcm47xx_bus.ssb, ticks);
26                 break;
27  #endif
28  #ifdef CONFIG_BCM47XX_BCMA
29         case BCM47XX_BUS_TYPE_BCMA:
30                 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc,
31 -                                              0xfffffff);
32 +                                              ticks);
33                 break;
34  #endif
35         }
36 @@ -90,33 +91,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
37  static void bcm47xx_timer_tick(unsigned long unused)
38  {
39         if (!atomic_dec_and_test(&ticks)) {
40 -               bcm47xx_wdt_hw_start();
41 +               /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
42 +               bcm47xx_wdt_hw_start(0xfffffff);
43                 mod_timer(&wdt_timer, jiffies + HZ);
44         } else {
45                 pr_crit("Watchdog will fire soon!!!\n");
46         }
47  }
48  
49 -static inline void bcm47xx_wdt_pet(void)
50 +static void bcm47xx_wdt_pet(void)
51  {
52 -       atomic_set(&ticks, wdt_time);
53 +       if(needs_sw_scale)
54 +               atomic_set(&ticks, wdt_time);
55 +       else
56 +               bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
57  }
58  
59  static void bcm47xx_wdt_start(void)
60  {
61         bcm47xx_wdt_pet();
62 -       bcm47xx_timer_tick(0);
63 -}
64 -
65 -static void bcm47xx_wdt_pause(void)
66 -{
67 -       del_timer_sync(&wdt_timer);
68 -       bcm47xx_wdt_hw_stop();
69 +       if(needs_sw_scale)
70 +               bcm47xx_timer_tick(0);
71  }
72  
73  static void bcm47xx_wdt_stop(void)
74  {
75 -       bcm47xx_wdt_pause();
76 +       if(needs_sw_scale)
77 +               del_timer_sync(&wdt_timer);
78 +       bcm47xx_wdt_hw_stop();
79  }
80  
81  static int bcm47xx_wdt_settimeout(int new_time)
82 @@ -267,7 +269,20 @@ static int __init bcm47xx_wdt_init(void)
83         if (bcm47xx_wdt_hw_stop() < 0)
84                 return -ENODEV;
85  
86 -       setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
87 +       /* FIXME Other cores */
88 +#ifdef BCM47XX_BUS_TYPE_BCMA
89 +       if(bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA &&
90 +          bcm47xx_bus.ssb.chip_id == 0x5354) {
91 +               /* Slow WDT clock, no pre-scaling */
92 +               needs_sw_scale = 0;
93 +       } else {
94 +#endif
95 +               /* Fast WDT clock, needs software pre-scaling */
96 +               needs_sw_scale = 1;
97 +               setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
98 +#ifdef BCM47XX_BUS_TYPE_BCMA
99 +       }
100 +#endif
101  
102         if (bcm47xx_wdt_settimeout(wdt_time)) {
103                 bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);