target/linux/brcm47xx/patches-3.6/520-MIPS-BCM47XX-fix-time-for-WL520G-and-other-200-MHz-C.patch

   1 --- a/arch/mips/bcm47xx/time.c
   2 +++ b/arch/mips/bcm47xx/time.c
   3 @@ -27,10 +27,14 @@
   4  #include <linux/ssb/ssb.h>
   5  #include <asm/time.h>
   6  #include <bcm47xx.h>
   7 +#include <nvram.h>
   8
   9  void __init plat_time_init(void)
  10  {
  11         unsigned long hz = 0;
  12 +       u16 chip_id = 0;
  13 +       char buf[10];
  14 +       int len;
  15
  16         /*
  17          * Use deterministic values for initial counter interrupt
  18 @@ -43,15 +47,26 @@ void __init plat_time_init(void)
  19  #ifdef CONFIG_BCM47XX_SSB
  20         case BCM47XX_BUS_TYPE_SSB:
  21                 hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
  22 +               chip_id = bcm47xx_bus.ssb.chip_id;
  23                 break;
  24  #endif
  25  #ifdef CONFIG_BCM47XX_BCMA
  26         case BCM47XX_BUS_TYPE_BCMA:
  27                 hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
  28 +               chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
  29                 break;
  30  #endif
  31         }
  32
  33 +       if (chip_id == 0x5354) {
  34 +               len = nvram_getenv("clkfreq", buf, sizeof(buf));
  35 +               if (len >= 0 && !strncmp(buf, "200", 4))
  36 +                       hz = 100000000;
  37 +               len = nvram_getenv("hardware_version", buf, sizeof(buf));
  38 +               if (len >= 0 && !strncmp(buf, "WL520G", 6))
  39 +                       hz = 100000000;
  40 +
  41 +       }
  42         if (!hz)
  43                 hz = 100000000;
  44