73e27817b39a9c5ea3245611287f40e052b70ad4
[openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0012-spi-bcm2835-Support-pin-groups-other-than-7-11.patch
1 From bc9d2c297e886dfcc340414a61de970942ad7319 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Wed, 24 Jun 2015 14:10:44 +0100
4 Subject: [PATCH 012/127] spi-bcm2835: Support pin groups other than 7-11
5
6 The spi-bcm2835 driver automatically uses GPIO chip-selects due to
7 some unreliability of the native ones. In doing so it chooses the
8 same pins as the native chip-selects would use, but the existing
9 code always uses pins 7 and 8, wherever the SPI function is mapped.
10
11 Search the pinctrl group assigned to the driver for pins that
12 correspond to native chip-selects, and use those for GPIO chip-
13 selects.
14
15 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
16 ---
17  drivers/spi/spi-bcm2835.c | 45 +++++++++++++++++++++++++++++++++++++--------
18  1 file changed, 37 insertions(+), 8 deletions(-)
19
20 --- a/drivers/spi/spi-bcm2835.c
21 +++ b/drivers/spi/spi-bcm2835.c
22 @@ -688,6 +688,8 @@ static int bcm2835_spi_setup(struct spi_
23  {
24         int err;
25         struct gpio_chip *chip;
26 +       struct device_node *pins;
27 +       u32 pingroup_index;
28         /*
29          * sanity checking the native-chipselects
30          */
31 @@ -704,15 +706,42 @@ static int bcm2835_spi_setup(struct spi_
32                         "setup: only two native chip-selects are supported\n");
33                 return -EINVAL;
34         }
35 -       /* now translate native cs to GPIO */
36  
37 -       /* get the gpio chip for the base */
38 -       chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
39 -       if (!chip)
40 -               return 0;
41 +       /* now translate native cs to GPIO */
42 +       /* first look for chip select pins in the devices pin groups */
43 +       for (pingroup_index = 0;
44 +            (pins = of_parse_phandle(spi->master->dev.of_node,
45 +                                    "pinctrl-0",
46 +                                     pingroup_index)) != 0;
47 +            pingroup_index++) {
48 +               u32 pin;
49 +               u32 pin_index;
50 +               for (pin_index = 0;
51 +                    of_property_read_u32_index(pins,
52 +                                               "brcm,pins",
53 +                                               pin_index,
54 +                                               &pin) == 0;
55 +                    pin_index++) {
56 +                       if (((spi->chip_select == 0) &&
57 +                            ((pin == 8) || (pin == 36) || (pin == 46))) ||
58 +                           ((spi->chip_select == 1) &&
59 +                            ((pin == 7) || (pin == 35)))) {
60 +                               spi->cs_gpio = pin;
61 +                               break;
62 +                       }
63 +               }
64 +               of_node_put(pins);
65 +       }
66 +       /* if that fails, assume GPIOs 7-11 are used */
67 +       if (!gpio_is_valid(spi->cs_gpio) ) {
68 +               /* get the gpio chip for the base */
69 +               chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
70 +               if (!chip)
71 +                       return 0;
72  
73 -       /* and calculate the real CS */
74 -       spi->cs_gpio = chip->base + 8 - spi->chip_select;
75 +               /* and calculate the real CS */
76 +               spi->cs_gpio = chip->base + 8 - spi->chip_select;
77 +       }
78  
79         /* and set up the "mode" and level */
80         dev_info(&spi->dev, "setting up native-CS%i as GPIO %i\n",