add 16MB flash support for ar2315 (who knows...?)
[openwrt.git] / target / linux / atheros-2.6 / files / drivers / mtd / devices / spiflash.h
1 /*
2  * SPI Flash Memory support header file.
3  *
4  * $Id: //depot/sw/releases/linuxsrc/src/kernels/mips-linux-2.4.25/drivers/mtd/devices/spiflash.h#3 $
5  *
6  *
7  * Copyright (c) 2005, Atheros Communications Inc.
8  * Copyright (C) 2006 FON Technology, SL.
9  * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
10  *
11  * This code is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  */
16 #define FLASH_1MB  1
17 #define FLASH_2MB  2
18 #define FLASH_4MB  3
19 #define FLASH_8MB  4
20 #define FLASH_16MB 5
21 #define MAX_FLASH  6
22
23 #define STM_PAGE_SIZE           256
24
25 #define SPI_WRITE_ENABLE    0
26 #define SPI_WRITE_DISABLE   1
27 #define SPI_RD_STATUS       2
28 #define SPI_WR_STATUS       3
29 #define SPI_RD_DATA         4
30 #define SPI_FAST_RD_DATA    5
31 #define SPI_PAGE_PROGRAM    6
32 #define SPI_SECTOR_ERASE    7
33 #define SPI_BULK_ERASE      8
34 #define SPI_DEEP_PWRDOWN    9
35 #define SPI_RD_SIG          10
36 #define SPI_MAX_OPCODES     11
37
38 #define SFI_WRITE_BUFFER_SIZE   4
39 #define SFI_FLASH_ADDR_MASK     0x00ffffff
40
41 #define STM_8MBIT_SIGNATURE     0x13
42 #define STM_M25P80_BYTE_COUNT   1048576
43 #define STM_M25P80_SECTOR_COUNT 16
44 #define STM_M25P80_SECTOR_SIZE  0x10000
45
46 #define STM_16MBIT_SIGNATURE    0x14
47 #define STM_M25P16_BYTE_COUNT   2097152
48 #define STM_M25P16_SECTOR_COUNT 32
49 #define STM_M25P16_SECTOR_SIZE  0x10000
50
51 #define STM_32MBIT_SIGNATURE    0x15
52 #define STM_M25P32_BYTE_COUNT   4194304
53 #define STM_M25P32_SECTOR_COUNT 64
54 #define STM_M25P32_SECTOR_SIZE  0x10000
55
56 #define STM_64MBIT_SIGNATURE    0x16
57 #define STM_M25P64_BYTE_COUNT   8388608
58 #define STM_M25P64_SECTOR_COUNT 128
59 #define STM_M25P64_SECTOR_SIZE  0x10000
60
61 #define STM_128MBIT_SIGNATURE   0x17
62 #define STM_M25P128_BYTE_COUNT   16777216
63 #define STM_M25P128_SECTOR_COUNT 256
64 #define STM_M25P128_SECTOR_SIZE  0x10000
65
66 #define STM_1MB_BYTE_COUNT   STM_M25P80_BYTE_COUNT
67 #define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
68 #define STM_1MB_SECTOR_SIZE  STM_M25P80_SECTOR_SIZE
69 #define STM_2MB_BYTE_COUNT   STM_M25P16_BYTE_COUNT
70 #define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
71 #define STM_2MB_SECTOR_SIZE  STM_M25P16_SECTOR_SIZE
72 #define STM_4MB_BYTE_COUNT   STM_M25P32_BYTE_COUNT
73 #define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
74 #define STM_4MB_SECTOR_SIZE  STM_M25P32_SECTOR_SIZE
75 #define STM_8MB_BYTE_COUNT   STM_M25P64_BYTE_COUNT
76 #define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
77 #define STM_8MB_SECTOR_SIZE  STM_M25P64_SECTOR_SIZE
78 #define STM_16MB_BYTE_COUNT   STM_M25P128_BYTE_COUNT
79 #define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
80 #define STM_16MB_SECTOR_SIZE  STM_M25P128_SECTOR_SIZE
81
82 /*
83  * ST Microelectronics Opcodes for Serial Flash
84  */
85
86 #define STM_OP_WR_ENABLE       0x06     /* Write Enable */
87 #define STM_OP_WR_DISABLE      0x04     /* Write Disable */
88 #define STM_OP_RD_STATUS       0x05     /* Read Status */
89 #define STM_OP_WR_STATUS       0x01     /* Write Status */
90 #define STM_OP_RD_DATA         0x03     /* Read Data */
91 #define STM_OP_FAST_RD_DATA    0x0b     /* Fast Read Data */
92 #define STM_OP_PAGE_PGRM       0x02     /* Page Program */
93 #define STM_OP_SECTOR_ERASE    0xd8     /* Sector Erase */
94 #define STM_OP_BULK_ERASE      0xc7     /* Bulk Erase */
95 #define STM_OP_DEEP_PWRDOWN    0xb9     /* Deep Power-Down Mode */
96 #define STM_OP_RD_SIG          0xab     /* Read Electronic Signature */
97
98 #define STM_STATUS_WIP       0x01       /* Write-In-Progress */
99 #define STM_STATUS_WEL       0x02       /* Write Enable Latch */
100 #define STM_STATUS_BP0       0x04       /* Block Protect 0 */
101 #define STM_STATUS_BP1       0x08       /* Block Protect 1 */
102 #define STM_STATUS_BP2       0x10       /* Block Protect 2 */
103 #define STM_STATUS_SRWD      0x80       /* Status Register Write Disable */
104
105 /*
106  * SPI Flash Interface Registers
107  */
108 #define AR531XPLUS_SPI_READ     0x08000000
109 #define AR531XPLUS_SPI_MMR      0x11300000
110 #define AR531XPLUS_SPI_MMR_SIZE 12
111
112 #define AR531XPLUS_SPI_CTL      0x00
113 #define AR531XPLUS_SPI_OPCODE   0x04
114 #define AR531XPLUS_SPI_DATA     0x08
115
116 #define SPI_FLASH_READ          AR531XPLUS_SPI_READ
117 #define SPI_FLASH_MMR           AR531XPLUS_SPI_MMR
118 #define SPI_FLASH_MMR_SIZE      AR531XPLUS_SPI_MMR_SIZE
119 #define SPI_FLASH_CTL           AR531XPLUS_SPI_CTL
120 #define SPI_FLASH_OPCODE        AR531XPLUS_SPI_OPCODE
121 #define SPI_FLASH_DATA          AR531XPLUS_SPI_DATA
122
123 #define SPI_CTL_START           0x00000100
124 #define SPI_CTL_BUSY            0x00010000
125 #define SPI_CTL_TXCNT_MASK      0x0000000f
126 #define SPI_CTL_RXCNT_MASK      0x000000f0
127 #define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
128 #define SPI_CTL_SIZE_MASK       0x00060000
129
130 #define SPI_CTL_CLK_SEL_MASK    0x03000000
131 #define SPI_OPCODE_MASK         0x000000ff
132
133 #define SPI_STATUS_WIP          STM_STATUS_WIP