target/linux/atheros-2.6/files/drivers/mtd/devices/spiflash.c

   1
   2 /*
   3  * MTD driver for the SPI Flash Memory support.
   4  *
   5  * Copyright (c) 2005-2006 Atheros Communications Inc.
   6  * Copyright (C) 2006 FON Technology, SL.
   7  * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
   8  * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
   9  *
  10  * This code is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  */
  15
  16 /*===========================================================================
  17 ** !!!!  VERY IMPORTANT NOTICE !!!!  FLASH DATA STORED IN LITTLE ENDIAN FORMAT
  18 **
  19 ** This module contains the Serial Flash access routines for the Atheros SOC.
  20 ** The Atheros SOC integrates a SPI flash controller that is used to access
  21 ** serial flash parts. The SPI flash controller executes in "Little Endian"
  22 ** mode. THEREFORE, all WRITES and READS from the MIPS CPU must be
  23 ** BYTESWAPPED! The SPI Flash controller hardware by default performs READ
  24 ** ONLY byteswapping when accessed via the SPI Flash Alias memory region
  25 ** (Physical Address 0x0800_0000 - 0x0fff_ffff). The data stored in the
  26 ** flash sectors is stored in "Little Endian" format.
  27 **
  28 ** The spiflash_write() routine performs byteswapping on all write
  29 ** operations.
  30 **===========================================================================*/
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/types.h>
  35 #include <linux/version.h>
  36 #include <linux/errno.h>
  37 #include <linux/slab.h>
  38 #include <linux/mtd/mtd.h>
  39 #include <linux/mtd/partitions.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/squashfs_fs.h>
  42 #include <linux/root_dev.h>
  43 #include <asm/delay.h>
  44 #include <asm/io.h>
  45 #include "spiflash.h"
  46
  47 /* debugging */
  48 /* #define SPIFLASH_DEBUG */
  49
  50 #ifndef __BIG_ENDIAN
  51 #error This driver currently only works with big endian CPU.
  52 #endif
  53
  54 #define MAX_PARTS 32
  55
  56 static char module_name[] = "spiflash";
  57
  58 #define MIN(a,b)        ((a) < (b) ? (a) : (b))
  59 #define FALSE   0
  60 #define TRUE    1
  61
  62 #define ROOTFS_NAME     "rootfs"
  63
  64 static __u32 spiflash_regread32(int reg);
  65 static void spiflash_regwrite32(int reg, __u32 data);
  66 static __u32 spiflash_sendcmd (int op);
  67
  68 int __init spiflash_init (void);
  69 void __exit spiflash_exit (void);
  70 static int spiflash_probe_chip (void);
  71 static int spiflash_erase (struct mtd_info *mtd,struct erase_info *instr);
  72 static int spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_char *buf);
  73 static int spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf);
  74
  75 /* Flash configuration table */
  76 struct flashconfig {
  77     __u32 byte_cnt;
  78     __u32 sector_cnt;
  79     __u32 sector_size;
  80     __u32 cs_addrmask;
  81 } flashconfig_tbl[MAX_FLASH] =
  82     {
  83         { 0, 0, 0, 0},
  84         { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE, 0x0},
  85         { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE, 0x0},
  86         { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE, 0x0},
  87         { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE, 0x0}
  88     };
  89
  90 /* Mapping of generic opcodes to STM serial flash opcodes */
  91 struct opcodes {
  92     __u16 code;
  93     __s8 tx_cnt;
  94     __s8 rx_cnt;
  95 } stm_opcodes[] = {
  96         {STM_OP_WR_ENABLE, 1, 0},
  97         {STM_OP_WR_DISABLE, 1, 0},
  98         {STM_OP_RD_STATUS, 1, 1},
  99         {STM_OP_WR_STATUS, 1, 0},
 100         {STM_OP_RD_DATA, 4, 4},
 101         {STM_OP_FAST_RD_DATA, 1, 0},
 102         {STM_OP_PAGE_PGRM, 8, 0},
 103         {STM_OP_SECTOR_ERASE, 4, 0},
 104         {STM_OP_BULK_ERASE, 1, 0},
 105         {STM_OP_DEEP_PWRDOWN, 1, 0},
 106         {STM_OP_RD_SIG, 4, 1}
 107 };
 108
 109 /* Driver private data structure */
 110 struct spiflash_data {
 111         struct  mtd_info       *mtd;
 112         struct  mtd_partition  *parsed_parts;     /* parsed partitions */
 113         void    *spiflash_readaddr; /* memory mapped data for read  */
 114         void    *spiflash_mmraddr;  /* memory mapped register space */
 115         spinlock_t mutex;
 116 };
 117
 118 static struct spiflash_data *spidata;
 119
 120 extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts);
 121
 122 /***************************************************************************************************/
 123
 124 static __u32
 125 spiflash_regread32(int reg)
 126 {
 127         volatile __u32 *data = (__u32 *)(spidata->spiflash_mmraddr + reg);
 128
 129         return (*data);
 130 }
 131
 132 static void
 133 spiflash_regwrite32(int reg, __u32 data)
 134 {
 135         volatile __u32 *addr = (__u32 *)(spidata->spiflash_mmraddr + reg);
 136
 137         *addr = data;
 138         return;
 139 }
 140
 141 static __u32
 142 spiflash_sendcmd (int op)
 143 {
 144          __u32 reg;
 145          __u32 mask;
 146         struct opcodes *ptr_opcode;
 147
 148         ptr_opcode = &stm_opcodes[op];
 149
 150         do {
 151                 reg = spiflash_regread32(SPI_FLASH_CTL);
 152         } while (reg & SPI_CTL_BUSY);
 153
 154         spiflash_regwrite32(SPI_FLASH_OPCODE, ptr_opcode->code);
 155
 156         reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | ptr_opcode->tx_cnt |
 157                 (ptr_opcode->rx_cnt << 4) | SPI_CTL_START;
 158
 159         spiflash_regwrite32(SPI_FLASH_CTL, reg);
 160
 161         if (ptr_opcode->rx_cnt > 0) {
 162                 do {
 163                         reg = spiflash_regread32(SPI_FLASH_CTL);
 164                 } while (reg & SPI_CTL_BUSY);
 165
 166                 reg = (__u32) spiflash_regread32(SPI_FLASH_DATA);
 167
 168                 switch (ptr_opcode->rx_cnt) {
 169                 case 1:
 170                         mask = 0x000000ff;
 171                         break;
 172                 case 2:
 173                         mask = 0x0000ffff;
 174                         break;
 175                 case 3:
 176                         mask = 0x00ffffff;
 177                         break;
 178                 default:
 179                         mask = 0xffffffff;
 180                         break;
 181                 }
 182
 183                 reg &= mask;
 184         }
 185         else {
 186                 reg = 0;
 187         }
 188
 189         return reg;
 190 }
 191
 192 /* Probe SPI flash device
 193  * Function returns 0 for failure.
 194  * and flashconfig_tbl array index for success.
 195  */
 196 static int
 197 spiflash_probe_chip (void)
 198 {
 199         __u32 sig;
 200         int flash_size;
 201
 202         /* Read the signature on the flash device */
 203         sig = spiflash_sendcmd(SPI_RD_SIG);
 204
 205         switch (sig) {
 206         case STM_8MBIT_SIGNATURE:
 207                 flash_size = FLASH_1MB;
 208                 break;
 209         case STM_16MBIT_SIGNATURE:
 210                 flash_size = FLASH_2MB;
 211                 break;
 212         case STM_32MBIT_SIGNATURE:
 213                 flash_size = FLASH_4MB;
 214                 break;
 215         case STM_64MBIT_SIGNATURE:
 216                 flash_size = FLASH_8MB;
 217                 break;
 218         default:
 219                 printk (KERN_WARNING "%s: Read of flash device signature failed!\n", module_name);
 220                 return (0);
 221         }
 222
 223         return (flash_size);
 224 }
 225
 226
 227 static int
 228 spiflash_erase (struct mtd_info *mtd,struct erase_info *instr)
 229 {
 230         struct opcodes *ptr_opcode;
 231         __u32 temp, reg;
 232         int finished = FALSE;
 233
 234 #ifdef SPIFLASH_DEBUG
 235         printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n",__FUNCTION__,instr->addr,instr->len);
 236 #endif
 237
 238         /* sanity checks */
 239         if (instr->addr + instr->len > mtd->size) return (-EINVAL);
 240
 241         ptr_opcode = &stm_opcodes[SPI_SECTOR_ERASE];
 242
 243         temp = ((__u32)instr->addr << 8) | (__u32)(ptr_opcode->code);
 244         spin_lock(&spidata->mutex);
 245         spiflash_sendcmd(SPI_WRITE_ENABLE);
 246         do {
 247                 schedule();
 248                 reg = spiflash_regread32(SPI_FLASH_CTL);
 249         } while (reg & SPI_CTL_BUSY);
 250
 251         spiflash_regwrite32(SPI_FLASH_OPCODE, temp);
 252
 253         reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | ptr_opcode->tx_cnt | SPI_CTL_START;
 254         spiflash_regwrite32(SPI_FLASH_CTL, reg);
 255
 256         do {
 257                 schedule();
 258                 reg = spiflash_sendcmd(SPI_RD_STATUS);
 259                 if (!(reg & SPI_STATUS_WIP)) {
 260                         finished = TRUE;
 261                 }
 262         } while (!finished);
 263         spin_unlock(&spidata->mutex);
 264
 265         instr->state = MTD_ERASE_DONE;
 266         if (instr->callback) instr->callback (instr);
 267
 268 #ifdef SPIFLASH_DEBUG
 269         printk (KERN_DEBUG "%s return\n",__FUNCTION__);
 270 #endif
 271         return (0);
 272 }
 273
 274 static int
 275 spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_char *buf)
 276 {
 277         u_char  *read_addr;
 278
 279 #ifdef SPIFLASH_DEBUG
 280         printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n",__FUNCTION__,(__u32) from,(int)len);
 281 #endif
 282
 283         /* sanity checks */
 284         if (!len) return (0);
 285         if (from + len > mtd->size) return (-EINVAL);
 286
 287
 288         /* we always read len bytes */
 289         *retlen = len;
 290
 291         read_addr = (u_char *)(spidata->spiflash_readaddr + from);
 292         spin_lock(&spidata->mutex);
 293         memcpy(buf, read_addr, len);
 294         spin_unlock(&spidata->mutex);
 295
 296         return (0);
 297 }
 298
 299 static int
 300 spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
 301 {
 302         int done = FALSE, page_offset, bytes_left, finished;
 303         __u32 xact_len, spi_data = 0, opcode, reg;
 304
 305 #ifdef SPIFLASH_DEBUG
 306         printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n",__FUNCTION__,(__u32) to,len);
 307 #endif
 308
 309         *retlen = 0;
 310
 311         /* sanity checks */
 312         if (!len) return (0);
 313         if (to + len > mtd->size) return (-EINVAL);
 314
 315         opcode = stm_opcodes[SPI_PAGE_PROGRAM].code;
 316         bytes_left = len;
 317
 318         while (done == FALSE) {
 319                 xact_len = MIN(bytes_left, sizeof(__u32));
 320
 321                 /* 32-bit writes cannot span across a page boundary
 322                  * (256 bytes). This types of writes require two page
 323                  * program operations to handle it correctly. The STM part
 324                  * will write the overflow data to the beginning of the
 325                  * current page as opposed to the subsequent page.
 326                  */
 327                 page_offset = (to & (STM_PAGE_SIZE - 1)) + xact_len;
 328
 329                 if (page_offset > STM_PAGE_SIZE) {
 330                         xact_len -= (page_offset - STM_PAGE_SIZE);
 331                 }
 332
 333                 spin_lock(&spidata->mutex);
 334                 spiflash_sendcmd(SPI_WRITE_ENABLE);
 335
 336                 do {
 337                         schedule();
 338                         reg = spiflash_regread32(SPI_FLASH_CTL);
 339                 } while (reg & SPI_CTL_BUSY);
 340
 341                 switch (xact_len) {
 342                         case 1:
 343                                 spi_data = (u32) ((u8) *buf);
 344                                 break;
 345                         case 2:
 346                                 spi_data = (buf[1] << 8) | buf[0];
 347                                 break;
 348                         case 3:
 349                                 spi_data = (buf[2] << 16) | (buf[1] << 8) | buf[0];
 350                                 break;
 351                         case 4:
 352                                 spi_data = (buf[3] << 24) | (buf[2] << 16) |
 353                                                         (buf[1] << 8) | buf[0];
 354                                 break;
 355                         default:
 356                                 printk("spiflash_write: default case\n");
 357                                 break;
 358                 }
 359
 360                 spiflash_regwrite32(SPI_FLASH_DATA, spi_data);
 361                 opcode = (opcode & SPI_OPCODE_MASK) | ((__u32)to << 8);
 362                 spiflash_regwrite32(SPI_FLASH_OPCODE, opcode);
 363
 364                 reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | (xact_len + 4) | SPI_CTL_START;
 365                 spiflash_regwrite32(SPI_FLASH_CTL, reg);
 366                 finished = FALSE;
 367
 368                 do {
 369                         schedule();
 370                         reg = spiflash_sendcmd(SPI_RD_STATUS);
 371                         if (!(reg & SPI_STATUS_WIP)) {
 372                                 finished = TRUE;
 373                         }
 374                 } while (!finished);
 375                 spin_unlock(&spidata->mutex);
 376
 377                 bytes_left -= xact_len;
 378                 to += xact_len;
 379                 buf += xact_len;
 380
 381                 *retlen += xact_len;
 382
 383                 if (bytes_left == 0) {
 384                         done = TRUE;
 385                 }
 386         }
 387
 388         return (0);
 389 }
 390
 391
 392 #ifdef CONFIG_MTD_PARTITIONS
 393 static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
 394 #endif
 395
 396
 397 static int spiflash_probe(struct platform_device *pdev)
 398 {
 399         int i, result = -1;
 400         int index, num_parts;
 401         struct mtd_info *mtd;
 402
 403         spidata->spiflash_mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
 404
 405         if (!spidata->spiflash_mmraddr) {
 406                 printk (KERN_WARNING "%s: Failed to map flash device\n", module_name);
 407                 kfree(spidata);
 408                 spidata = NULL;
 409         }
 410
 411         mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
 412         if (!mtd) {
 413                 kfree(spidata);
 414                 return (-ENXIO);
 415         }
 416
 417         printk ("MTD driver for SPI flash.\n");
 418         printk ("%s: Probing for Serial flash ...\n", module_name);
 419         if (!(index = spiflash_probe_chip())) {
 420         printk (KERN_WARNING "%s: Found no serial flash device\n", module_name);
 421                 kfree(mtd);
 422                 kfree(spidata);
 423         return (-ENXIO);
 424         }
 425
 426         printk ("%s: Found SPI serial Flash.\n", module_name);
 427
 428         spidata->spiflash_readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
 429         if (!spidata->spiflash_readaddr) {
 430                 printk (KERN_WARNING "%s: Failed to map flash device\n", module_name);
 431                 kfree(mtd);
 432                 kfree(spidata);
 433                 return (-ENXIO);
 434         }
 435
 436         mtd->name = module_name;
 437         mtd->type = MTD_NORFLASH;
 438         mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
 439         mtd->size = flashconfig_tbl[index].byte_cnt;
 440         mtd->erasesize = flashconfig_tbl[index].sector_size;
 441         mtd->writesize = 1;
 442         mtd->numeraseregions = 0;
 443         mtd->eraseregions = NULL;
 444         mtd->erase = spiflash_erase;
 445         mtd->read = spiflash_read;
 446         mtd->write = spiflash_write;
 447         mtd->owner = THIS_MODULE;
 448
 449 #ifdef SPIFLASH_DEBUG
 450         printk (KERN_DEBUG
 451                    "mtd->name = %s\n"
 452                    "mtd->size = 0x%.8x (%uM)\n"
 453                    "mtd->erasesize = 0x%.8x (%uK)\n"
 454                    "mtd->numeraseregions = %d\n",
 455                    mtd->name,
 456                    mtd->size, mtd->size / (1024*1024),
 457                    mtd->erasesize, mtd->erasesize / 1024,
 458                    mtd->numeraseregions);
 459
 460         if (mtd->numeraseregions) {
 461                 for (result = 0; result < mtd->numeraseregions; result++) {
 462                         printk (KERN_DEBUG
 463                            "\n\n"
 464                            "mtd->eraseregions[%d].offset = 0x%.8x\n"
 465                            "mtd->eraseregions[%d].erasesize = 0x%.8x (%uK)\n"
 466                            "mtd->eraseregions[%d].numblocks = %d\n",
 467                            result,mtd->eraseregions[result].offset,
 468                            result,mtd->eraseregions[result].erasesize,mtd->eraseregions[result].erasesize / 1024,
 469                            result,mtd->eraseregions[result].numblocks);
 470                 }
 471         }
 472 #endif
 473         /* parse redboot partitions */
 474         num_parts = parse_mtd_partitions(mtd, part_probe_types, &spidata->parsed_parts, 0);
 475         for (i = 0; i < num_parts; i++) {
 476                 if (!strcmp(spidata->parsed_parts[i].name, ROOTFS_NAME)) {
 477                         /* create the root device */
 478                         ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i);
 479                 }
 480         }
 481
 482 #ifdef SPIFLASH_DEBUG
 483         printk (KERN_DEBUG "Found %d partitions\n", num_parts);
 484 #endif
 485         if (num_parts) {
 486                 result = add_mtd_partitions(mtd, spidata->parsed_parts, num_parts);
 487         } else {
 488 #ifdef SPIFLASH_DEBUG
 489                 printk (KERN_DEBUG "Did not find any partitions\n");
 490 #endif
 491                 kfree(mtd);
 492                 kfree(spidata);
 493                 return (-ENXIO);
 494         }
 495
 496         spidata->mtd = mtd;
 497
 498         return (result);
 499 }
 500
 501 static int spiflash_remove (struct platform_device *pdev)
 502 {
 503         del_mtd_partitions (spidata->mtd);
 504         kfree(spidata->mtd);
 505
 506         return 0;
 507 }
 508
 509 struct platform_driver spiflash_driver = {
 510         .driver.name = "spiflash",
 511         .probe = spiflash_probe,
 512         .remove = spiflash_remove,
 513 };
 514
 515 int __init
 516 spiflash_init (void)
 517 {
 518         spidata = kmalloc(sizeof(struct spiflash_data), GFP_KERNEL);
 519         if (!spidata)
 520                 return (-ENXIO);
 521
 522         spin_lock_init(&spidata->mutex);
 523         platform_driver_register(&spiflash_driver);
 524
 525         return 0;
 526 }
 527
 528 void __exit
 529 spiflash_exit (void)
 530 {
 531         kfree(spidata);
 532 }
 533
 534 module_init (spiflash_init);
 535 module_exit (spiflash_exit);
 536
 537 MODULE_LICENSE("GPL");
 538 MODULE_AUTHOR("Atheros Communications Inc");
 539 MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
 540