ar71xx: Add QCA955X GPIO mux and function definitions
[openwrt.git] / target / linux / ar71xx / patches-4.1 / 740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch
1 --- a/arch/mips/ath79/pci.c
2 +++ b/arch/mips/ath79/pci.c
3 @@ -53,6 +53,15 @@ static const struct ath79_pci_irq ar724x
4         }
5  };
6  
7 +static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = {
8 +       {
9 +               .bus    = 0,
10 +               .slot   = 0,
11 +               .pin    = 1,
12 +               .irq    = ATH79_PCI_IRQ(0),
13 +       },
14 +};
15 +
16  static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = {
17         {
18                 .bus    = 0,
19 @@ -98,6 +107,9 @@ int __init pcibios_map_irq(const struct
20                            soc_is_ar9344()) {
21                         ath79_pci_irq_map = ar724x_pci_irq_map;
22                         ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
23 +               } else if (soc_is_qca953x()) {
24 +                       ath79_pci_irq_map = qca953x_pci_irq_map;
25 +                       ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map);
26                 } else if (soc_is_qca955x()) {
27                         ath79_pci_irq_map = qca955x_pci_irq_map;
28                         ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
29 @@ -303,6 +315,15 @@ int __init ath79_register_pci(void)
30                                                  AR724X_PCI_MEM_SIZE,
31                                                  0,
32                                                  ATH79_IP2_IRQ(0));
33 +       } else if (soc_is_qca9533()) {
34 +               pdev = ath79_register_pci_ar724x(0,
35 +                                                QCA953X_PCI_CFG_BASE0,
36 +                                                QCA953X_PCI_CTRL_BASE0,
37 +                                                QCA953X_PCI_CRP_BASE0,
38 +                                                QCA953X_PCI_MEM_BASE0,
39 +                                                QCA953X_PCI_MEM_SIZE,
40 +                                                0,
41 +                                                ATH79_IP2_IRQ(0));
42         } else if (soc_is_qca9558()) {
43                 pdev = ath79_register_pci_ar724x(0,
44                                                  QCA955X_PCI_CFG_BASE0,