ar71xx: Fix LED polarity for the TP-LINK TL-MR13U.
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-tl-wr1041n-v2.c
1 /*
2  *  TP-LINK TL-WR1041 v2 board support
3  *
4  *  Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2011-2012 Anan Huang <axishero@foxmail.com>
6  *
7  *  This program is free software; you can redistribute it and/or modify it
8  *  under the terms of the GNU General Public License version 2 as published
9  *  by the Free Software Foundation.
10  */
11
12 #include <linux/pci.h>
13 #include <linux/phy.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-spi.h"
27 #include "dev-wmac.h"
28 #include "machtypes.h"
29
30 #define TL_WR1041NV2_GPIO_BTN_RESET     14
31 #define TL_WR1041NV2_GPIO_LED_WPS       13
32 #define TL_WR1041NV2_GPIO_LED_WLAN      11
33
34 #define TL_WR1041NV2_GPIO_LED_SYSTEM    12
35
36 #define TL_WR1041NV2_KEYS_POLL_INTERVAL         20      /* msecs */
37 #define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL     (3 * TL_WR1041NV2_KEYS_POLL_INTERVAL)
38
39 #define TL_WR1041NV2_PCIE_CALDATA_OFFSET        0x5000
40
41 static const char *tl_wr1041nv2_part_probes[] = {
42         "tp-link",
43         NULL,
44 };
45
46 static struct flash_platform_data tl_wr1041nv2_flash_data = {
47         .part_probes    = tl_wr1041nv2_part_probes,
48 };
49
50 static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = {
51         {
52                 .name           = "tp-link:green:system",
53                 .gpio           = TL_WR1041NV2_GPIO_LED_SYSTEM,
54                 .active_low     = 1,
55         }, {
56                 .name           = "tp-link:green:wps",
57                 .gpio           = TL_WR1041NV2_GPIO_LED_WPS,
58                 .active_low     = 1,
59         }, {
60                 .name           = "tp-link:green:wlan",
61                 .gpio           = TL_WR1041NV2_GPIO_LED_WLAN,
62                 .active_low     = 1,
63         }
64 };
65
66 static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = {
67         {
68                 .desc           = "reset",
69                 .type           = EV_KEY,
70                 .code           = KEY_RESTART,
71                 .debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL,
72                 .gpio           = TL_WR1041NV2_GPIO_BTN_RESET,
73                 .active_low     = 1,
74         }
75 };
76
77 static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {
78         .mode = AR8327_PAD_MAC_RGMII,
79         .txclk_delay_en = true,
80         .rxclk_delay_en = true,
81         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
82         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
83 };
84
85 static struct ar8327_platform_data db120_ar8327_data = {
86         .pad0_cfg = &db120_ar8327_pad0_cfg,
87         .port0_cfg = {
88                 .force_link = 1,
89                 .speed = AR8327_PORT_SPEED_1000,
90                 .duplex = 1,
91                 .txpause = 1,
92                 .rxpause = 1,
93         }
94 };
95
96 static struct mdio_board_info db120_mdio0_info[] = {
97         {
98                 .bus_id = "ag71xx-mdio.0",
99                 .phy_addr = 0,
100                 .platform_data = &db120_ar8327_data,
101         },
102 };
103
104 static void __init tl_wr1041nv2_setup(void)
105 {
106         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
107         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
108
109         ath79_register_m25p80(&tl_wr1041nv2_flash_data);
110
111         ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio),
112                                  tl_wr1041nv2_leds_gpio);
113         ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL,
114                                          ARRAY_SIZE(tl_wr1041nv2_gpio_keys),
115                                          tl_wr1041nv2_gpio_keys);
116         ath79_register_wmac(ee, mac);
117
118         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
119                                    AR934X_ETH_CFG_SW_ONLY_MODE);
120
121         ath79_register_mdio(1, 0x0);
122         ath79_register_mdio(0, 0x0);
123
124         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
125
126         mdiobus_register_board_info(db120_mdio0_info,
127                                     ARRAY_SIZE(db120_mdio0_info));
128
129         /* GMAC0 is connected to an AR8327 switch */
130         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
131         ath79_eth0_data.phy_mask = BIT(0);
132         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
133         ath79_eth0_pll_data.pll_1000 = 0x06000000;
134         ath79_register_eth(0);
135 }
136
137 MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2",
138              "TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup);