target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c

   1 /*
   2  *  MikroTik RouterBOARD 91X support
   3  *
   4  *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt) "rb91x: " fmt
  12
  13 #include <linux/phy.h>
  14 #include <linux/delay.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/ath9k_platform.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/spi/74x164.h>
  22 #include <linux/spi/flash.h>
  23 #include <linux/routerboot.h>
  24 #include <linux/gpio.h>
  25 #include <linux/platform_data/gpio-latch.h>
  26 #include <linux/platform_data/rb91x_nand.h>
  27
  28 #include <asm/prom.h>
  29 #include <asm/mach-ath79/ath79.h>
  30 #include <asm/mach-ath79/ath79_spi_platform.h>
  31 #include <asm/mach-ath79/ar71xx_regs.h>
  32
  33 #include "common.h"
  34 #include "dev-eth.h"
  35 #include "dev-leds-gpio.h"
  36 #include "dev-nfc.h"
  37 #include "dev-usb.h"
  38 #include "dev-spi.h"
  39 #include "dev-wmac.h"
  40 #include "machtypes.h"
  41 #include "pci.h"
  42 #include "routerboot.h"
  43
  44 #define RB_ROUTERBOOT_OFFSET    0x0000
  45 #define RB_ROUTERBOOT_MIN_SIZE  0xb000
  46 #define RB_HARD_CFG_SIZE        0x1000
  47 #define RB_BIOS_OFFSET          0xd000
  48 #define RB_BIOS_SIZE            0x1000
  49 #define RB_SOFT_CFG_OFFSET      0xf000
  50 #define RB_SOFT_CFG_SIZE        0x1000
  51
  52 #define RB91X_FLAG_USB          BIT(0)
  53 #define RB91X_FLAG_PCIE         BIT(1)
  54
  55 #define RB91X_LATCH_GPIO_BASE   AR934X_GPIO_COUNT
  56 #define RB91X_LATCH_GPIO(_x)    (RB91X_LATCH_GPIO_BASE + (_x))
  57
  58 #define RB91X_SSR_GPIO_BASE     (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
  59 #define RB91X_SSR_GPIO(_x)      (RB91X_SSR_GPIO_BASE + (_x))
  60
  61 #define RB91X_SSR_BIT_LED1              0
  62 #define RB91X_SSR_BIT_LED2              1
  63 #define RB91X_SSR_BIT_LED3              2
  64 #define RB91X_SSR_BIT_LED4              3
  65 #define RB91X_SSR_BIT_LED5              4
  66 #define RB91X_SSR_BIT_5                 5
  67 #define RB91X_SSR_BIT_USB_POWER         6
  68 #define RB91X_SSR_BIT_PCIE_POWER        7
  69
  70 #define RB91X_GPIO_SSR_STROBE   RB91X_LATCH_GPIO(0)
  71 #define RB91X_GPIO_LED_POWER    RB91X_LATCH_GPIO(1)
  72 #define RB91X_GPIO_LED_USER     RB91X_LATCH_GPIO(2)
  73 #define RB91X_GPIO_NAND_READ    RB91X_LATCH_GPIO(3)
  74 #define RB91X_GPIO_NAND_RDY     RB91X_LATCH_GPIO(4)
  75 #define RB91X_GPIO_NLE          RB91X_LATCH_GPIO(11)
  76 #define RB91X_GPIO_NAND_NRW     RB91X_LATCH_GPIO(12)
  77 #define RB91X_GPIO_NAND_NCE     RB91X_LATCH_GPIO(13)
  78 #define RB91X_GPIO_NAND_CLE     RB91X_LATCH_GPIO(14)
  79 #define RB91X_GPIO_NAND_ALE     RB91X_LATCH_GPIO(15)
  80
  81 #define RB91X_GPIO_LED_1        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1)
  82 #define RB91X_GPIO_LED_2        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2)
  83 #define RB91X_GPIO_LED_3        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3)
  84 #define RB91X_GPIO_LED_4        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4)
  85 #define RB91X_GPIO_LED_5        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5)
  86 #define RB91X_GPIO_USB_POWER    RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER)
  87 #define RB91X_GPIO_PCIE_POWER   RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER)
  88
  89 struct rb_board_info {
  90         const char *name;
  91         u32 flags;
  92 };
  93
  94 static struct mtd_partition rb711gr100_spi_partitions[] = {
  95         {
  96                 .name           = "routerboot",
  97                 .offset         = RB_ROUTERBOOT_OFFSET,
  98                 .mask_flags     = MTD_WRITEABLE,
  99         }, {
 100                 .name           = "hard_config",
 101                 .size           = RB_HARD_CFG_SIZE,
 102                 .mask_flags     = MTD_WRITEABLE,
 103         }, {
 104                 .name           = "bios",
 105                 .offset         = RB_BIOS_OFFSET,
 106                 .size           = RB_BIOS_SIZE,
 107                 .mask_flags     = MTD_WRITEABLE,
 108         }, {
 109                 .name           = "soft_config",
 110                 .size           = RB_SOFT_CFG_SIZE,
 111         }
 112 };
 113
 114 static struct flash_platform_data rb711gr100_spi_flash_data = {
 115         .parts          = rb711gr100_spi_partitions,
 116         .nr_parts       = ARRAY_SIZE(rb711gr100_spi_partitions),
 117 };
 118
 119 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
 120         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
 121         12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
 122 };
 123
 124 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
 125         .base = RB91X_LATCH_GPIO_BASE,
 126         .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
 127         .gpios = rb711gr100_gpio_latch_gpios,
 128         .le_gpio_index = 11,
 129         .le_active_low = true,
 130 };
 131
 132 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = {
 133         .gpio_nce = RB91X_GPIO_NAND_NCE,
 134         .gpio_ale = RB91X_GPIO_NAND_ALE,
 135         .gpio_cle = RB91X_GPIO_NAND_CLE,
 136         .gpio_rdy = RB91X_GPIO_NAND_RDY,
 137         .gpio_read = RB91X_GPIO_NAND_READ,
 138         .gpio_nrw = RB91X_GPIO_NAND_NRW,
 139         .gpio_nle = RB91X_GPIO_NLE,
 140 };
 141
 142 static u8 rb711gr100_ssr_initdata[] __initdata = {
 143         BIT(RB91X_SSR_BIT_PCIE_POWER) |
 144         BIT(RB91X_SSR_BIT_USB_POWER) |
 145         BIT(RB91X_SSR_BIT_5)
 146 };
 147
 148 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = {
 149         .base = RB91X_SSR_GPIO_BASE,
 150         .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata),
 151         .init_data = rb711gr100_ssr_initdata,
 152 };
 153
 154 static struct ath79_spi_controller_data rb711gr100_spi0_cdata = {
 155         .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
 156         .cs_line = 0,
 157         .is_flash = true,
 158 };
 159
 160 static struct ath79_spi_controller_data rb711gr100_spi1_cdata = {
 161         .cs_type = ATH79_SPI_CS_TYPE_GPIO,
 162         .cs_line = RB91X_GPIO_SSR_STROBE,
 163 };
 164
 165 static struct spi_board_info rb711gr100_spi_info[] = {
 166         {
 167                 .bus_num        = 0,
 168                 .chip_select    = 0,
 169                 .max_speed_hz   = 25000000,
 170                 .modalias       = "m25p80",
 171                 .platform_data  = &rb711gr100_spi_flash_data,
 172                 .controller_data = &rb711gr100_spi0_cdata
 173         }, {
 174                 .bus_num        = 0,
 175                 .chip_select    = 1,
 176                 .max_speed_hz   = 10000000,
 177                 .modalias       = "74x164",
 178                 .platform_data  = &rb711gr100_ssr_data,
 179                 .controller_data = &rb711gr100_spi1_cdata
 180         }
 181 };
 182
 183 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = {
 184         .bus_num = 0,
 185         .num_chipselect = 2,
 186 };
 187
 188 static struct gpio_led rb711gr100_leds[] __initdata = {
 189         {
 190                 .name           = "rb:green:led1",
 191                 .gpio           = RB91X_GPIO_LED_1,
 192                 .active_low     = 0,
 193         },
 194         {
 195                 .name           = "rb:green:led2",
 196                 .gpio           = RB91X_GPIO_LED_2,
 197                 .active_low     = 0,
 198         },
 199         {
 200                 .name           = "rb:green:led3",
 201                 .gpio           = RB91X_GPIO_LED_3,
 202                 .active_low     = 0,
 203         },
 204         {
 205                 .name           = "rb:green:led4",
 206                 .gpio           = RB91X_GPIO_LED_4,
 207                 .active_low     = 0,
 208         },
 209         {
 210                 .name           = "rb:green:led5",
 211                 .gpio           = RB91X_GPIO_LED_5,
 212                 .active_low     = 0,
 213         },
 214         {
 215                 .name           = "rb:green:user",
 216                 .gpio           = RB91X_GPIO_LED_USER,
 217                 .active_low     = 0,
 218         },
 219         {
 220                 .name           = "rb:green:power",
 221                 .gpio           = RB91X_GPIO_LED_POWER,
 222                 .active_low     = 0,
 223         },
 224 };
 225
 226 static void __init rb711gr100_init_partitions(const struct rb_info *info)
 227 {
 228         rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
 229         rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
 230
 231         rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
 232 }
 233
 234 void __init rb711gr100_wlan_init(void)
 235 {
 236         char *caldata;
 237         u8 wlan_mac[ETH_ALEN];
 238
 239         caldata = rb_get_wlan_data();
 240         if (caldata == NULL)
 241                 return;
 242
 243         ath79_init_mac(wlan_mac, ath79_mac_base, 1);
 244         ath79_register_wmac(caldata + 0x1000, wlan_mac);
 245
 246         kfree(caldata);
 247 }
 248
 249 #define RB_BOARD_INFO(_name, _flags)    \
 250         {                               \
 251                 .name = (_name),        \
 252                 .flags = (_flags),      \
 253         }
 254
 255 static const struct rb_board_info rb711gr100_boards[] __initconst = {
 256         RB_BOARD_INFO("911G-2HPnD", 0),
 257         RB_BOARD_INFO("911G-5HPnD", 0),
 258         RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 259         RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 260 };
 261
 262 static u32 rb711gr100_get_flags(const struct rb_info *info)
 263 {
 264         int i;
 265
 266         for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
 267                 const struct rb_board_info *bi;
 268
 269                 bi = &rb711gr100_boards[i];
 270                 if (strcmp(info->board_name, bi->name) == 0)
 271                         return bi->flags;
 272         }
 273
 274         return 0;
 275 }
 276
 277 static void __init rb711gr100_setup(void)
 278 {
 279         const struct rb_info *info;
 280         char buf[64];
 281         u32 flags;
 282
 283         info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
 284         if (!info)
 285                 return;
 286
 287         scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
 288                   (info->board_name) ? info->board_name : "");
 289         mips_set_machine_name(buf);
 290
 291         rb711gr100_init_partitions(info);
 292         ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info,
 293                            ARRAY_SIZE(rb711gr100_spi_info));
 294
 295         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
 296                                    AR934X_ETH_CFG_SW_ONLY_MODE);
 297
 298         ath79_register_mdio(0, 0x0);
 299
 300         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 301         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 302         ath79_eth0_data.phy_mask = BIT(0);
 303         ath79_eth0_pll_data.pll_1000 = 0x02000000;
 304
 305         ath79_register_eth(0);
 306
 307         rb711gr100_wlan_init();
 308
 309         platform_device_register_data(NULL, "rb91x-nand", -1,
 310                                       &rb711gr100_nand_data,
 311                                       sizeof(rb711gr100_nand_data));
 312
 313         platform_device_register_data(NULL, "gpio-latch", -1,
 314                                       &rb711gr100_gpio_latch_data,
 315                                       sizeof(rb711gr100_gpio_latch_data));
 316
 317         ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds),
 318                                  rb711gr100_leds);
 319
 320         flags = rb711gr100_get_flags(info);
 321
 322         if (flags & RB91X_FLAG_USB)
 323                 ath79_register_usb();
 324
 325         if (flags & RB91X_FLAG_PCIE)
 326                 ath79_register_pci();
 327
 328 }
 329
 330 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);