ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-cap324.c
1 /*
2  *  PowerCloud Systems CAP324 board support
3  *
4  *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2012-2013 PowerCloud Systems
6  *  Copyright (C) 2015 Daniel Dickinson
7  *
8  *  This program is free software; you can redistribute it and/or modify it
9  *  under the terms of the GNU General Public License version 2 as published
10  *  by the Free Software Foundation.
11  */
12
13 #include <linux/pci.h>
14 #include <linux/phy.h>
15 #include <linux/platform_device.h>
16 #include <linux/ath9k_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-spi.h"
27 #include "dev-usb.h"
28 #include "dev-wmac.h"
29 #include "machtypes.h"
30
31 #define CAP324_GPIO_LED_POWER_GREEN     12
32 #define CAP324_GPIO_LED_POWER_AMBER     13
33 #define CAP324_GPIO_LED_LAN_GREEN       14
34 #define CAP324_GPIO_LED_LAN_AMBER       15
35 #define CAP324_GPIO_LED_WLAN_GREEN      18
36 #define CAP324_GPIO_LED_WLAN_AMBER      19
37
38 #define CAP324_GPIO_BTN_RESET   17
39
40 #define CAP324_KEYS_POLL_INTERVAL       20      /* msecs */
41 #define CAP324_KEYS_DEBOUNCE_INTERVAL (3 * CAP324_KEYS_POLL_INTERVAL)
42
43 #define CAP324_MAC_OFFSET               0
44 #define CAP324_WMAC_CALDATA_OFFSET      0x1000
45 #define CAP324_PCIE_CALDATA_OFFSET      0x5000
46
47 static struct gpio_led cap324_leds_gpio[] __initdata = {
48         {
49                 .name           = "pcs:green:power",
50                 .gpio           = CAP324_GPIO_LED_POWER_GREEN,
51                 .active_low     = 1,
52         },
53         {
54                 .name           = "pcs:amber:power",
55                 .gpio           = CAP324_GPIO_LED_POWER_AMBER,
56                 .active_low     = 1,
57         },
58         {
59                 .name           = "pcs:green:lan",
60                 .gpio           = CAP324_GPIO_LED_LAN_GREEN,
61                 .active_low     = 1,
62         },
63         {
64                 .name           = "pcs:amber:lan",
65                 .gpio           = CAP324_GPIO_LED_LAN_AMBER,
66                 .active_low     = 1,
67         },
68         {
69                 .name           = "pcs:green:wlan",
70                 .gpio           = CAP324_GPIO_LED_WLAN_GREEN,
71                 .active_low     = 1,
72         },
73         {
74                 .name           = "pcs:amber:wlan",
75                 .gpio           = CAP324_GPIO_LED_WLAN_AMBER,
76                 .active_low     = 1,
77         },
78 };
79
80 static struct gpio_keys_button cap324_gpio_keys[] __initdata = {
81         {
82                 .desc           = "Reset button",
83                 .type           = EV_KEY,
84                 .code           = KEY_RESTART,
85                 .debounce_interval = CAP324_KEYS_DEBOUNCE_INTERVAL,
86                 .gpio           = CAP324_GPIO_BTN_RESET,
87                 .active_low     = 1,
88         },
89 };
90
91 static void __init cap324_setup(void)
92 {
93         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
94         u8 mac[6];
95
96         ath79_gpio_output_select(CAP324_GPIO_LED_LAN_GREEN,
97                                  AR934X_GPIO_OUT_GPIO);
98         ath79_gpio_output_select(CAP324_GPIO_LED_LAN_AMBER,
99                                  AR934X_GPIO_OUT_GPIO);
100
101         ath79_register_m25p80(NULL);
102
103         ath79_register_leds_gpio(-1, ARRAY_SIZE(cap324_leds_gpio),
104                                  cap324_leds_gpio);
105         ath79_register_gpio_keys_polled(-1, CAP324_KEYS_POLL_INTERVAL,
106                                         ARRAY_SIZE(cap324_gpio_keys),
107                                         cap324_gpio_keys);
108
109         ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -1);
110         ath79_wmac_disable_2ghz();
111         ath79_register_wmac(art + CAP324_WMAC_CALDATA_OFFSET, mac);
112
113         ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -2);
114         ap91_pci_init(art + CAP324_PCIE_CALDATA_OFFSET, mac);
115
116         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
117                                    AR934X_ETH_CFG_SW_ONLY_MODE);
118
119         ath79_register_mdio(0, 0x0);
120
121         ath79_init_mac(ath79_eth0_data.mac_addr,
122                        art + CAP324_MAC_OFFSET, -2);
123
124         /* GMAC0 is connected to an external PHY */
125         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
126         ath79_eth0_data.phy_mask = BIT(0);
127         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
128         ath79_eth0_pll_data.pll_1000 = 0x06000000;
129         ath79_register_eth(0);
130 }
131
132 MIPS_MACHINE(ATH79_MACH_CAP324, "CAP324", "PowerCloud CAP324",
133              cap324_setup);