target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb4xx.c

   1 /*
   2  *  MikroTik RouterBOARD 4xx series support
   3  *
   4  *  Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/irq.h>
  14 #include <linux/mdio-gpio.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/flash.h>
  18 #include <linux/spi/mmc_spi.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/mach-ath79/ar71xx_regs.h>
  23 #include <asm/mach-ath79/ath79.h>
  24 #include <asm/mach-ath79/pci.h>
  25 #include <asm/mach-ath79/rb4xx_cpld.h>
  26
  27 #include "common.h"
  28 #include "dev-eth.h"
  29 #include "dev-gpio-buttons.h"
  30 #include "dev-leds-gpio.h"
  31 #include "dev-usb.h"
  32 #include "machtypes.h"
  33 #include "pci.h"
  34
  35 #define RB4XX_GPIO_USER_LED     4
  36 #define RB4XX_GPIO_RESET_SWITCH 7
  37
  38 #define RB4XX_GPIO_CPLD_BASE    32
  39 #define RB4XX_GPIO_CPLD_LED1    (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
  40 #define RB4XX_GPIO_CPLD_LED2    (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
  41 #define RB4XX_GPIO_CPLD_LED3    (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
  42 #define RB4XX_GPIO_CPLD_LED4    (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
  43 #define RB4XX_GPIO_CPLD_LED5    (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
  44
  45 #define RB4XX_KEYS_POLL_INTERVAL        20      /* msecs */
  46 #define RB4XX_KEYS_DEBOUNCE_INTERVAL    (3 * RB4XX_KEYS_POLL_INTERVAL)
  47
  48 static struct gpio_led rb4xx_leds_gpio[] __initdata = {
  49         {
  50                 .name           = "rb4xx:yellow:user",
  51                 .gpio           = RB4XX_GPIO_USER_LED,
  52                 .active_low     = 0,
  53         }, {
  54                 .name           = "rb4xx:green:led1",
  55                 .gpio           = RB4XX_GPIO_CPLD_LED1,
  56                 .active_low     = 1,
  57         }, {
  58                 .name           = "rb4xx:green:led2",
  59                 .gpio           = RB4XX_GPIO_CPLD_LED2,
  60                 .active_low     = 1,
  61         }, {
  62                 .name           = "rb4xx:green:led3",
  63                 .gpio           = RB4XX_GPIO_CPLD_LED3,
  64                 .active_low     = 1,
  65         }, {
  66                 .name           = "rb4xx:green:led4",
  67                 .gpio           = RB4XX_GPIO_CPLD_LED4,
  68                 .active_low     = 1,
  69         }, {
  70                 .name           = "rb4xx:green:led5",
  71                 .gpio           = RB4XX_GPIO_CPLD_LED5,
  72                 .active_low     = 0,
  73         },
  74 };
  75
  76 static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = {
  77         {
  78                 .desc           = "reset_switch",
  79                 .type           = EV_KEY,
  80                 .code           = KEY_RESTART,
  81                 .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL,
  82                 .gpio           = RB4XX_GPIO_RESET_SWITCH,
  83                 .active_low     = 1,
  84         }
  85 };
  86
  87 static struct platform_device rb4xx_nand_device = {
  88         .name   = "rb4xx-nand",
  89         .id     = -1,
  90 };
  91
  92 static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = {
  93         {
  94                 .slot   = 17,
  95                 .pin    = 1,
  96                 .irq    = ATH79_PCI_IRQ(2),
  97         }, {
  98                 .slot   = 18,
  99                 .pin    = 1,
 100                 .irq    = ATH79_PCI_IRQ(0),
 101         }, {
 102                 .slot   = 18,
 103                 .pin    = 2,
 104                 .irq    = ATH79_PCI_IRQ(1),
 105         }, {
 106                 .slot   = 19,
 107                 .pin    = 1,
 108                 .irq    = ATH79_PCI_IRQ(1),
 109         }, {
 110                 .slot   = 19,
 111                 .pin    = 1,
 112                 .irq    = ATH79_PCI_IRQ(2),
 113         }
 114 };
 115
 116 static struct mtd_partition rb4xx_partitions[] = {
 117         {
 118                 .name           = "routerboot",
 119                 .offset         = 0,
 120                 .size           = 0x0b000,
 121                 .mask_flags     = MTD_WRITEABLE,
 122         }, {
 123                 .name           = "hard_config",
 124                 .offset         = 0x0b000,
 125                 .size           = 0x01000,
 126                 .mask_flags     = MTD_WRITEABLE,
 127         }, {
 128                 .name           = "bios",
 129                 .offset         = 0x0d000,
 130                 .size           = 0x02000,
 131                 .mask_flags     = MTD_WRITEABLE,
 132         }, {
 133                 .name           = "soft_config",
 134                 .offset         = 0x0f000,
 135                 .size           = 0x01000,
 136         }
 137 };
 138
 139 static struct flash_platform_data rb4xx_flash_data = {
 140         .type           = "pm25lv512",
 141         .parts          = rb4xx_partitions,
 142         .nr_parts       = ARRAY_SIZE(rb4xx_partitions),
 143 };
 144
 145 static struct rb4xx_cpld_platform_data rb4xx_cpld_data = {
 146         .gpio_base      = RB4XX_GPIO_CPLD_BASE,
 147 };
 148
 149 static struct mmc_spi_platform_data rb4xx_mmc_data = {
 150         .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
 151 };
 152
 153 static struct spi_board_info rb4xx_spi_info[] = {
 154         {
 155                 .bus_num        = 0,
 156                 .chip_select    = 0,
 157                 .max_speed_hz   = 25000000,
 158                 .modalias       = "m25p80",
 159                 .platform_data  = &rb4xx_flash_data,
 160         }, {
 161                 .bus_num        = 0,
 162                 .chip_select    = 1,
 163                 .max_speed_hz   = 25000000,
 164                 .modalias       = "spi-rb4xx-cpld",
 165                 .platform_data  = &rb4xx_cpld_data,
 166         }
 167 };
 168
 169 static struct spi_board_info rb4xx_microsd_info[] = {
 170         {
 171                 .bus_num        = 0,
 172                 .chip_select    = 2,
 173                 .max_speed_hz   = 25000000,
 174                 .modalias       = "mmc_spi",
 175                 .platform_data  = &rb4xx_mmc_data,
 176         }
 177 };
 178
 179
 180 static struct resource rb4xx_spi_resources[] = {
 181         {
 182                 .start  = AR71XX_SPI_BASE,
 183                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 184                 .flags  = IORESOURCE_MEM,
 185         },
 186 };
 187
 188 static struct platform_device rb4xx_spi_device = {
 189         .name           = "rb4xx-spi",
 190         .id             = -1,
 191         .resource       = rb4xx_spi_resources,
 192         .num_resources  = ARRAY_SIZE(rb4xx_spi_resources),
 193 };
 194
 195 static void __init rb4xx_generic_setup(void)
 196 {
 197         ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
 198                                    AR71XX_GPIO_FUNC_SPI_CS2_EN);
 199
 200         ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
 201                                         rb4xx_leds_gpio);
 202
 203         ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL,
 204                                         ARRAY_SIZE(rb4xx_gpio_keys),
 205                                         rb4xx_gpio_keys);
 206
 207         spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
 208         platform_device_register(&rb4xx_spi_device);
 209         platform_device_register(&rb4xx_nand_device);
 210 }
 211
 212 static void __init rb411_setup(void)
 213 {
 214         rb4xx_generic_setup();
 215         spi_register_board_info(rb4xx_microsd_info,
 216                                 ARRAY_SIZE(rb4xx_microsd_info));
 217
 218         ath79_register_mdio(0, 0xfffffffc);
 219
 220         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 221         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 222         ath79_eth0_data.phy_mask = 0x00000003;
 223
 224         ath79_register_eth(0);
 225
 226         ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
 227         ath79_register_pci();
 228 }
 229
 230 MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH",
 231              rb411_setup);
 232
 233 static void __init rb411u_setup(void)
 234 {
 235         rb411_setup();
 236         ath79_register_usb();
 237 }
 238
 239 MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U",
 240              rb411u_setup);
 241
 242 #define RB433_LAN_PHYMASK       BIT(0)
 243 #define RB433_WAN_PHYMASK       BIT(4)
 244 #define RB433_MDIO_PHYMASK      (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
 245
 246 static void __init rb433_setup(void)
 247 {
 248         rb4xx_generic_setup();
 249         spi_register_board_info(rb4xx_microsd_info,
 250                                 ARRAY_SIZE(rb4xx_microsd_info));
 251
 252         ath79_register_mdio(0, ~RB433_MDIO_PHYMASK);
 253
 254         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1);
 255         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 256         ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK;
 257
 258         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
 259         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 260         ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK;
 261
 262         ath79_register_eth(1);
 263         ath79_register_eth(0);
 264
 265         ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
 266         ath79_register_pci();
 267 }
 268
 269 MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH",
 270              rb433_setup);
 271
 272 static void __init rb433u_setup(void)
 273 {
 274         rb433_setup();
 275         ath79_register_usb();
 276 }
 277
 278 MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH",
 279              rb433u_setup);
 280
 281 #define RB450_LAN_PHYMASK       BIT(0)
 282 #define RB450_WAN_PHYMASK       BIT(4)
 283 #define RB450_MDIO_PHYMASK      (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
 284
 285 static void __init rb450_generic_setup(int gige)
 286 {
 287         rb4xx_generic_setup();
 288         ath79_register_mdio(0, ~RB450_MDIO_PHYMASK);
 289
 290         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1);
 291         ath79_eth0_data.phy_if_mode = (gige) ?
 292                 PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
 293         ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK;
 294
 295         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
 296         ath79_eth1_data.phy_if_mode = (gige) ?
 297                 PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
 298         ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK;
 299
 300         ath79_register_eth(1);
 301         ath79_register_eth(0);
 302 }
 303
 304 static void __init rb450_setup(void)
 305 {
 306         rb450_generic_setup(0);
 307 }
 308
 309 MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450",
 310              rb450_setup);
 311
 312 static void __init rb450g_setup(void)
 313 {
 314         rb450_generic_setup(1);
 315         spi_register_board_info(rb4xx_microsd_info,
 316                                 ARRAY_SIZE(rb4xx_microsd_info));
 317 }
 318
 319 MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G",
 320              rb450g_setup);
 321
 322 static void __init rb493_setup(void)
 323 {
 324         rb4xx_generic_setup();
 325
 326         ath79_register_mdio(0, 0x3fffff00);
 327
 328         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 329         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 330         ath79_eth0_data.speed = SPEED_100;
 331         ath79_eth0_data.duplex = DUPLEX_FULL;
 332
 333         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
 334         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 335         ath79_eth1_data.phy_mask = 0x00000001;
 336
 337         ath79_register_eth(0);
 338         ath79_register_eth(1);
 339
 340         ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
 341         ath79_register_pci();
 342 }
 343
 344 MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH",
 345              rb493_setup);
 346
 347 #define RB493G_GPIO_MDIO_MDC            7
 348 #define RB493G_GPIO_MDIO_DATA           8
 349
 350 #define RB493G_MDIO_PHYMASK             BIT(0)
 351
 352 static struct mdio_gpio_platform_data rb493g_mdio_data = {
 353         .mdc            = RB493G_GPIO_MDIO_MDC,
 354         .mdio           = RB493G_GPIO_MDIO_DATA,
 355
 356         .phy_mask       = ~RB493G_MDIO_PHYMASK,
 357 };
 358
 359 static struct platform_device rb493g_mdio_device = {
 360         .name           = "mdio-gpio",
 361         .id             = -1,
 362         .dev            = {
 363                 .platform_data  = &rb493g_mdio_data,
 364         },
 365 };
 366
 367 static void __init rb493g_setup(void)
 368 {
 369         ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
 370                                     AR71XX_GPIO_FUNC_SPI_CS2_EN);
 371
 372         ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
 373                                     rb4xx_leds_gpio);
 374
 375         spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
 376         platform_device_register(&rb4xx_spi_device);
 377         platform_device_register(&rb4xx_nand_device);
 378
 379         ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK);
 380
 381         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 382         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 383         ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK;
 384         ath79_eth0_data.speed = SPEED_1000;
 385         ath79_eth0_data.duplex = DUPLEX_FULL;
 386
 387         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
 388         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 389         ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev;
 390         ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK;
 391         ath79_eth1_data.speed = SPEED_1000;
 392         ath79_eth1_data.duplex = DUPLEX_FULL;
 393
 394         platform_device_register(&rb493g_mdio_device);
 395
 396         ath79_register_eth(1);
 397         ath79_register_eth(0);
 398
 399         ath79_register_usb();
 400
 401         ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
 402         ath79_register_pci();
 403 }
 404
 405 MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G",
 406              rb493g_setup);