package/mac80211/patches/300-pending_work.patch

   1 --- a/net/mac80211/agg-rx.c
   2 +++ b/net/mac80211/agg-rx.c
   3 @@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
   4                 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
   5         else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
   6                 memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
   7 +       else if (sdata->vif.type == NL80211_IFTYPE_WDS)
   8 +               memcpy(mgmt->bssid, da, ETH_ALEN);
   9
  10         mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
  11                                           IEEE80211_STYPE_ACTION);
  12 --- a/net/mac80211/agg-tx.c
  13 +++ b/net/mac80211/agg-tx.c
  14 @@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
  15         memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
  16         if (sdata->vif.type == NL80211_IFTYPE_AP ||
  17             sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
  18 -           sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
  19 +           sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
  20 +           sdata->vif.type == NL80211_IFTYPE_WDS)
  21                 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
  22         else if (sdata->vif.type == NL80211_IFTYPE_STATION)
  23                 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
  24 @@ -520,6 +521,7 @@ int ieee80211_start_tx_ba_session(struct
  25             sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
  26             sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
  27             sdata->vif.type != NL80211_IFTYPE_AP &&
  28 +           sdata->vif.type != NL80211_IFTYPE_WDS &&
  29             sdata->vif.type != NL80211_IFTYPE_ADHOC)
  30                 return -EINVAL;
  31
  32 --- a/net/mac80211/debugfs_sta.c
  33 +++ b/net/mac80211/debugfs_sta.c
  34 @@ -65,11 +65,11 @@ static ssize_t sta_flags_read(struct fil
  35         test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
  36
  37         int res = scnprintf(buf, sizeof(buf),
  38 -                           "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
  39 +                           "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
  40                             TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
  41                             TEST(PS_DRIVER), TEST(AUTHORIZED),
  42                             TEST(SHORT_PREAMBLE),
  43 -                           TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
  44 +                           TEST(WME), TEST(CLEAR_PS_FILT),
  45                             TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
  46                             TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
  47                             TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
  48 --- a/net/mac80211/iface.c
  49 +++ b/net/mac80211/iface.c
  50 @@ -501,7 +501,6 @@ int ieee80211_do_open(struct wireless_de
  51         struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
  52         struct net_device *dev = wdev->netdev;
  53         struct ieee80211_local *local = sdata->local;
  54 -       struct sta_info *sta;
  55         u32 changed = 0;
  56         int res;
  57         u32 hw_reconf_flags = 0;
  58 @@ -658,30 +657,8 @@ int ieee80211_do_open(struct wireless_de
  59
  60         set_bit(SDATA_STATE_RUNNING, &sdata->state);
  61
  62 -       if (sdata->vif.type == NL80211_IFTYPE_WDS) {
  63 -               /* Create STA entry for the WDS peer */
  64 -               sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
  65 -                                    GFP_KERNEL);
  66 -               if (!sta) {
  67 -                       res = -ENOMEM;
  68 -                       goto err_del_interface;
  69 -               }
  70 -
  71 -               sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
  72 -               sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
  73 -               sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
  74 -
  75 -               res = sta_info_insert(sta);
  76 -               if (res) {
  77 -                       /* STA has been freed */
  78 -                       goto err_del_interface;
  79 -               }
  80 -
  81 -               rate_control_rate_init(sta);
  82 -               netif_carrier_on(dev);
  83 -       } else if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE) {
  84 +       if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE)
  85                 rcu_assign_pointer(local->p2p_sdata, sdata);
  86 -       }
  87
  88         /*
  89          * set_multicast_list will be invoked by the networking core
  90 @@ -1066,6 +1043,72 @@ static void ieee80211_if_setup(struct ne
  91         dev->destructor = free_netdev;
  92  }
  93
  94 +static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
  95 +                                        struct sk_buff *skb)
  96 +{
  97 +       struct ieee80211_local *local = sdata->local;
  98 +       struct ieee80211_rx_status *rx_status;
  99 +       struct ieee802_11_elems elems;
 100 +       struct ieee80211_mgmt *mgmt;
 101 +       struct sta_info *sta;
 102 +       size_t baselen;
 103 +       u32 rates = 0;
 104 +       u16 stype;
 105 +       bool new = false;
 106 +       enum ieee80211_band band = local->hw.conf.channel->band;
 107 +       struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
 108 +
 109 +       rx_status = IEEE80211_SKB_RXCB(skb);
 110 +       mgmt = (struct ieee80211_mgmt *) skb->data;
 111 +       stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
 112 +
 113 +       if (stype != IEEE80211_STYPE_BEACON)
 114 +               return;
 115 +
 116 +       baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
 117 +       if (baselen > skb->len)
 118 +               return;
 119 +
 120 +       ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
 121 +                              skb->len - baselen, &elems);
 122 +
 123 +       rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
 124 +
 125 +       rcu_read_lock();
 126 +
 127 +       sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
 128 +
 129 +       if (!sta) {
 130 +               rcu_read_unlock();
 131 +               sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
 132 +                                    GFP_KERNEL);
 133 +               if (!sta)
 134 +                       return;
 135 +
 136 +               new = true;
 137 +       }
 138 +
 139 +       sta->last_rx = jiffies;
 140 +       sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
 141 +
 142 +       if (elems.ht_cap_elem)
 143 +               ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
 144 +                               elems.ht_cap_elem, &sta->sta.ht_cap);
 145 +
 146 +       if (elems.wmm_param)
 147 +               set_sta_flag(sta, WLAN_STA_WME);
 148 +
 149 +       if (new) {
 150 +               sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
 151 +               sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
 152 +               sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
 153 +               rate_control_rate_init(sta);
 154 +               sta_info_insert_rcu(sta);
 155 +       }
 156 +
 157 +       rcu_read_unlock();
 158 +}
 159 +
 160  static void ieee80211_iface_work(struct work_struct *work)
 161  {
 162         struct ieee80211_sub_if_data *sdata =
 163 @@ -1170,6 +1213,9 @@ static void ieee80211_iface_work(struct
 164                                 break;
 165                         ieee80211_mesh_rx_queued_mgmt(sdata, skb);
 166                         break;
 167 +               case NL80211_IFTYPE_WDS:
 168 +                       ieee80211_wds_rx_queued_mgmt(sdata, skb);
 169 +                       break;
 170                 default:
 171                         WARN(1, "frame for unexpected interface type");
 172                         break;
 173 --- a/net/mac80211/rx.c
 174 +++ b/net/mac80211/rx.c
 175 @@ -2350,6 +2350,7 @@ ieee80211_rx_h_action(struct ieee80211_r
 176                     sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
 177                     sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
 178                     sdata->vif.type != NL80211_IFTYPE_AP &&
 179 +                   sdata->vif.type != NL80211_IFTYPE_WDS &&
 180                     sdata->vif.type != NL80211_IFTYPE_ADHOC)
 181                         break;
 182
 183 @@ -2655,14 +2656,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
 184
 185         if (!ieee80211_vif_is_mesh(&sdata->vif) &&
 186             sdata->vif.type != NL80211_IFTYPE_ADHOC &&
 187 -           sdata->vif.type != NL80211_IFTYPE_STATION)
 188 +           sdata->vif.type != NL80211_IFTYPE_STATION &&
 189 +           sdata->vif.type != NL80211_IFTYPE_WDS)
 190                 return RX_DROP_MONITOR;
 191
 192         switch (stype) {
 193         case cpu_to_le16(IEEE80211_STYPE_AUTH):
 194         case cpu_to_le16(IEEE80211_STYPE_BEACON):
 195         case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
 196 -               /* process for all: mesh, mlme, ibss */
 197 +               /* process for all: mesh, mlme, ibss, wds */
 198                 break;
 199         case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
 200         case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
 201 @@ -2987,10 +2989,16 @@ static int prepare_for_handlers(struct i
 202                 }
 203                 break;
 204         case NL80211_IFTYPE_WDS:
 205 -               if (bssid || !ieee80211_is_data(hdr->frame_control))
 206 -                       return 0;
 207                 if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
 208                         return 0;
 209 +
 210 +               if (ieee80211_is_data(hdr->frame_control) ||
 211 +                   ieee80211_is_action(hdr->frame_control)) {
 212 +                       if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
 213 +                               return 0;
 214 +               } else if (!ieee80211_is_beacon(hdr->frame_control))
 215 +                       return 0;
 216 +
 217                 break;
 218         case NL80211_IFTYPE_P2P_DEVICE:
 219                 if (!ieee80211_is_public_action(hdr, skb->len) &&
 220 --- a/net/mac80211/sta_info.h
 221 +++ b/net/mac80211/sta_info.h
 222 @@ -32,7 +32,6 @@
 223   * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
 224   *     frames.
 225   * @WLAN_STA_WME: Station is a QoS-STA.
 226 - * @WLAN_STA_WDS: Station is one of our WDS peers.
 227   * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
 228   *     IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
 229   *     frame to this station is transmitted.
 230 @@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
 231         WLAN_STA_AUTHORIZED,
 232         WLAN_STA_SHORT_PREAMBLE,
 233         WLAN_STA_WME,
 234 -       WLAN_STA_WDS,
 235         WLAN_STA_CLEAR_PS_FILT,
 236         WLAN_STA_MFP,
 237         WLAN_STA_BLOCK_BA,
 238 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 239 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
 240 @@ -314,7 +314,6 @@ struct ath_rx {
 241         u32 *rxlink;
 242         u32 num_pkts;
 243         unsigned int rxfilter;
 244 -       spinlock_t rxbuflock;
 245         struct list_head rxbuf;
 246         struct ath_descdma rxdma;
 247         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 248 @@ -324,7 +323,6 @@ struct ath_rx {
 249
 250  int ath_startrecv(struct ath_softc *sc);
 251  bool ath_stoprecv(struct ath_softc *sc);
 252 -void ath_flushrecv(struct ath_softc *sc);
 253  u32 ath_calcrxfilter(struct ath_softc *sc);
 254  int ath_rx_init(struct ath_softc *sc, int nbufs);
 255  void ath_rx_cleanup(struct ath_softc *sc);
 256 @@ -334,9 +332,8 @@ void ath_txq_lock(struct ath_softc *sc,
 257  void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
 258  void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
 259  void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 260 -bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
 261 -void ath_draintxq(struct ath_softc *sc,
 262 -                    struct ath_txq *txq, bool retry_tx);
 263 +bool ath_drain_all_txq(struct ath_softc *sc);
 264 +void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
 265  void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 266  void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 267  void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 268 @@ -641,7 +638,6 @@ void ath_ant_comb_update(struct ath_soft
 269  enum sc_op_flags {
 270         SC_OP_INVALID,
 271         SC_OP_BEACONS,
 272 -       SC_OP_RXFLUSH,
 273         SC_OP_ANI_RUN,
 274         SC_OP_PRIM_STA_VIF,
 275         SC_OP_HW_RESET,
 276 --- a/drivers/net/wireless/ath/ath9k/beacon.c
 277 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
 278 @@ -147,6 +147,7 @@ static struct ath_buf *ath9k_beacon_gene
 279                                  skb->len, DMA_TO_DEVICE);
 280                 dev_kfree_skb_any(skb);
 281                 bf->bf_buf_addr = 0;
 282 +               bf->bf_mpdu = NULL;
 283         }
 284
 285         skb = ieee80211_beacon_get(hw, vif);
 286 @@ -198,7 +199,7 @@ static struct ath_buf *ath9k_beacon_gene
 287                 if (sc->nvifs > 1) {
 288                         ath_dbg(common, BEACON,
 289                                 "Flushing previous cabq traffic\n");
 290 -                       ath_draintxq(sc, cabq, false);
 291 +                       ath_draintxq(sc, cabq);
 292                 }
 293         }
 294
 295 @@ -359,7 +360,6 @@ void ath9k_beacon_tasklet(unsigned long
 296                 return;
 297
 298         bf = ath9k_beacon_generate(sc->hw, vif);
 299 -       WARN_ON(!bf);
 300
 301         if (sc->beacon.bmisscnt != 0) {
 302                 ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
 303 --- a/drivers/net/wireless/ath/ath9k/debug.c
 304 +++ b/drivers/net/wireless/ath/ath9k/debug.c
 305 @@ -861,7 +861,6 @@ static ssize_t read_file_recv(struct fil
 306         RXS_ERR("RX-LENGTH-ERR", rx_len_err);
 307         RXS_ERR("RX-OOM-ERR", rx_oom_err);
 308         RXS_ERR("RX-RATE-ERR", rx_rate_err);
 309 -       RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);
 310         RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);
 311
 312         PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);
 313 --- a/drivers/net/wireless/ath/ath9k/debug.h
 314 +++ b/drivers/net/wireless/ath/ath9k/debug.h
 315 @@ -216,7 +216,6 @@ struct ath_tx_stats {
 316   * @rx_oom_err:  No. of frames dropped due to OOM issues.
 317   * @rx_rate_err:  No. of frames dropped due to rate errors.
 318   * @rx_too_many_frags_err:  Frames dropped due to too-many-frags received.
 319 - * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
 320   * @rx_beacons:  No. of beacons received.
 321   * @rx_frags:  No. of rx-fragements received.
 322   */
 323 @@ -235,7 +234,6 @@ struct ath_rx_stats {
 324         u32 rx_oom_err;
 325         u32 rx_rate_err;
 326         u32 rx_too_many_frags_err;
 327 -       u32 rx_drop_rxflush;
 328         u32 rx_beacons;
 329         u32 rx_frags;
 330  };
 331 --- a/drivers/net/wireless/ath/ath9k/main.c
 332 +++ b/drivers/net/wireless/ath/ath9k/main.c
 333 @@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_
 334         ath_start_ani(sc);
 335  }
 336
 337 -static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
 338 +static bool ath_prepare_reset(struct ath_softc *sc)
 339  {
 340         struct ath_hw *ah = sc->sc_ah;
 341         bool ret = true;
 342 @@ -196,20 +196,12 @@ static bool ath_prepare_reset(struct ath
 343         ath9k_debug_samp_bb_mac(sc);
 344         ath9k_hw_disable_interrupts(ah);
 345
 346 -       if (!ath_stoprecv(sc))
 347 +       if (!ath_drain_all_txq(sc))
 348                 ret = false;
 349
 350 -       if (!ath_drain_all_txq(sc, retry_tx))
 351 +       if (!ath_stoprecv(sc))
 352                 ret = false;
 353
 354 -       if (!flush) {
 355 -               if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 356 -                       ath_rx_tasklet(sc, 1, true);
 357 -               ath_rx_tasklet(sc, 1, false);
 358 -       } else {
 359 -               ath_flushrecv(sc);
 360 -       }
 361 -
 362         return ret;
 363  }
 364
 365 @@ -255,18 +247,17 @@ static bool ath_complete_reset(struct at
 366         return true;
 367  }
 368
 369 -static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 370 -                             bool retry_tx)
 371 +static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 372  {
 373         struct ath_hw *ah = sc->sc_ah;
 374         struct ath_common *common = ath9k_hw_common(ah);
 375         struct ath9k_hw_cal_data *caldata = NULL;
 376         bool fastcc = true;
 377 -       bool flush = false;
 378         int r;
 379
 380         __ath_cancel_work(sc);
 381
 382 +       tasklet_disable(&sc->intr_tq);
 383         spin_lock_bh(&sc->sc_pcu_lock);
 384
 385         if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
 386 @@ -276,11 +267,10 @@ static int ath_reset_internal(struct ath
 387
 388         if (!hchan) {
 389                 fastcc = false;
 390 -               flush = true;
 391                 hchan = ah->curchan;
 392         }
 393
 394 -       if (!ath_prepare_reset(sc, retry_tx, flush))
 395 +       if (!ath_prepare_reset(sc))
 396                 fastcc = false;
 397
 398         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 399 @@ -302,6 +292,8 @@ static int ath_reset_internal(struct ath
 400
 401  out:
 402         spin_unlock_bh(&sc->sc_pcu_lock);
 403 +       tasklet_enable(&sc->intr_tq);
 404 +
 405         return r;
 406  }
 407
 408 @@ -319,7 +311,7 @@ static int ath_set_channel(struct ath_so
 409         if (test_bit(SC_OP_INVALID, &sc->sc_flags))
 410                 return -EIO;
 411
 412 -       r = ath_reset_internal(sc, hchan, false);
 413 +       r = ath_reset_internal(sc, hchan);
 414
 415         return r;
 416  }
 417 @@ -549,23 +541,21 @@ chip_reset:
 418  #undef SCHED_INTR
 419  }
 420
 421 -static int ath_reset(struct ath_softc *sc, bool retry_tx)
 422 +static int ath_reset(struct ath_softc *sc)
 423  {
 424 -       int r;
 425 +       int i, r;
 426
 427         ath9k_ps_wakeup(sc);
 428
 429 -       r = ath_reset_internal(sc, NULL, retry_tx);
 430 +       r = ath_reset_internal(sc, NULL);
 431
 432 -       if (retry_tx) {
 433 -               int i;
 434 -               for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 435 -                       if (ATH_TXQ_SETUP(sc, i)) {
 436 -                               spin_lock_bh(&sc->tx.txq[i].axq_lock);
 437 -                               ath_txq_schedule(sc, &sc->tx.txq[i]);
 438 -                               spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 439 -                       }
 440 -               }
 441 +       for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 442 +               if (!ATH_TXQ_SETUP(sc, i))
 443 +                       continue;
 444 +
 445 +               spin_lock_bh(&sc->tx.txq[i].axq_lock);
 446 +               ath_txq_schedule(sc, &sc->tx.txq[i]);
 447 +               spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 448         }
 449
 450         ath9k_ps_restore(sc);
 451 @@ -586,7 +576,7 @@ void ath_reset_work(struct work_struct *
 452  {
 453         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 454
 455 -       ath_reset(sc, true);
 456 +       ath_reset(sc);
 457  }
 458
 459  /**********************/
 460 @@ -804,7 +794,7 @@ static void ath9k_stop(struct ieee80211_
 461                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 462         }
 463
 464 -       ath_prepare_reset(sc, false, true);
 465 +       ath_prepare_reset(sc);
 466
 467         if (sc->rx.frag) {
 468                 dev_kfree_skb_any(sc->rx.frag);
 469 @@ -1731,11 +1721,11 @@ static void ath9k_flush(struct ieee80211
 470         if (drop) {
 471                 ath9k_ps_wakeup(sc);
 472                 spin_lock_bh(&sc->sc_pcu_lock);
 473 -               drain_txq = ath_drain_all_txq(sc, false);
 474 +               drain_txq = ath_drain_all_txq(sc);
 475                 spin_unlock_bh(&sc->sc_pcu_lock);
 476
 477                 if (!drain_txq)
 478 -                       ath_reset(sc, false);
 479 +                       ath_reset(sc);
 480
 481                 ath9k_ps_restore(sc);
 482                 ieee80211_wake_queues(hw);
 483 @@ -1835,6 +1825,9 @@ static u32 fill_chainmask(u32 cap, u32 n
 484
 485  static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
 486  {
 487 +       if (AR_SREV_9300_20_OR_LATER(ah))
 488 +               return true;
 489 +
 490         switch (val & 0x7) {
 491         case 0x1:
 492         case 0x3:
 493 --- a/drivers/net/wireless/ath/ath9k/recv.c
 494 +++ b/drivers/net/wireless/ath/ath9k/recv.c
 495 @@ -248,8 +248,6 @@ rx_init_fail:
 496
 497  static void ath_edma_start_recv(struct ath_softc *sc)
 498  {
 499 -       spin_lock_bh(&sc->rx.rxbuflock);
 500 -
 501         ath9k_hw_rxena(sc->sc_ah);
 502
 503         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 504 @@ -261,8 +259,6 @@ static void ath_edma_start_recv(struct a
 505         ath_opmode_init(sc);
 506
 507         ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
 508 -
 509 -       spin_unlock_bh(&sc->rx.rxbuflock);
 510  }
 511
 512  static void ath_edma_stop_recv(struct ath_softc *sc)
 513 @@ -279,8 +275,6 @@ int ath_rx_init(struct ath_softc *sc, in
 514         int error = 0;
 515
 516         spin_lock_init(&sc->sc_pcu_lock);
 517 -       spin_lock_init(&sc->rx.rxbuflock);
 518 -       clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
 519
 520         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
 521                              sc->sc_ah->caps.rx_status_len;
 522 @@ -438,7 +432,6 @@ int ath_startrecv(struct ath_softc *sc)
 523                 return 0;
 524         }
 525
 526 -       spin_lock_bh(&sc->rx.rxbuflock);
 527         if (list_empty(&sc->rx.rxbuf))
 528                 goto start_recv;
 529
 530 @@ -459,26 +452,31 @@ start_recv:
 531         ath_opmode_init(sc);
 532         ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
 533
 534 -       spin_unlock_bh(&sc->rx.rxbuflock);
 535 -
 536         return 0;
 537  }
 538
 539 +static void ath_flushrecv(struct ath_softc *sc)
 540 +{
 541 +       if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 542 +               ath_rx_tasklet(sc, 1, true);
 543 +       ath_rx_tasklet(sc, 1, false);
 544 +}
 545 +
 546  bool ath_stoprecv(struct ath_softc *sc)
 547  {
 548         struct ath_hw *ah = sc->sc_ah;
 549         bool stopped, reset = false;
 550
 551 -       spin_lock_bh(&sc->rx.rxbuflock);
 552         ath9k_hw_abortpcurecv(ah);
 553         ath9k_hw_setrxfilter(ah, 0);
 554         stopped = ath9k_hw_stopdmarecv(ah, &reset);
 555
 556 +       ath_flushrecv(sc);
 557 +
 558         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 559                 ath_edma_stop_recv(sc);
 560         else
 561                 sc->rx.rxlink = NULL;
 562 -       spin_unlock_bh(&sc->rx.rxbuflock);
 563
 564         if (!(ah->ah_flags & AH_UNPLUGGED) &&
 565             unlikely(!stopped)) {
 566 @@ -490,15 +488,6 @@ bool ath_stoprecv(struct ath_softc *sc)
 567         return stopped && !reset;
 568  }
 569
 570 -void ath_flushrecv(struct ath_softc *sc)
 571 -{
 572 -       set_bit(SC_OP_RXFLUSH, &sc->sc_flags);
 573 -       if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 574 -               ath_rx_tasklet(sc, 1, true);
 575 -       ath_rx_tasklet(sc, 1, false);
 576 -       clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
 577 -}
 578 -
 579  static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 580  {
 581         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 582 @@ -735,6 +724,7 @@ static struct ath_buf *ath_get_next_rx_b
 583                         return NULL;
 584         }
 585
 586 +       list_del(&bf->list);
 587         if (!bf->bf_mpdu)
 588                 return bf;
 589
 590 @@ -1050,16 +1040,12 @@ int ath_rx_tasklet(struct ath_softc *sc,
 591                 dma_type = DMA_FROM_DEVICE;
 592
 593         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
 594 -       spin_lock_bh(&sc->rx.rxbuflock);
 595
 596         tsf = ath9k_hw_gettsf64(ah);
 597         tsf_lower = tsf & 0xffffffff;
 598
 599         do {
 600                 bool decrypt_error = false;
 601 -               /* If handling rx interrupt and flush is in progress => exit */
 602 -               if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
 603 -                       break;
 604
 605                 memset(&rs, 0, sizeof(rs));
 606                 if (edma)
 607 @@ -1102,15 +1088,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
 608
 609                 ath_debug_stat_rx(sc, &rs);
 610
 611 -               /*
 612 -                * If we're asked to flush receive queue, directly
 613 -                * chain it back at the queue without processing it.
 614 -                */
 615 -               if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags)) {
 616 -                       RX_STAT_INC(rx_drop_rxflush);
 617 -                       goto requeue_drop_frag;
 618 -               }
 619 -
 620                 memset(rxs, 0, sizeof(struct ieee80211_rx_status));
 621
 622                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
 623 @@ -1245,19 +1222,18 @@ requeue_drop_frag:
 624                         sc->rx.frag = NULL;
 625                 }
 626  requeue:
 627 +               list_add_tail(&bf->list, &sc->rx.rxbuf);
 628 +               if (flush)
 629 +                       continue;
 630 +
 631                 if (edma) {
 632 -                       list_add_tail(&bf->list, &sc->rx.rxbuf);
 633                         ath_rx_edma_buf_link(sc, qtype);
 634                 } else {
 635 -                       list_move_tail(&bf->list, &sc->rx.rxbuf);
 636                         ath_rx_buf_link(sc, bf);
 637 -                       if (!flush)
 638 -                               ath9k_hw_rxena(ah);
 639 +                       ath9k_hw_rxena(ah);
 640                 }
 641         } while (1);
 642
 643 -       spin_unlock_bh(&sc->rx.rxbuflock);
 644 -
 645         if (!(ah->imask & ATH9K_INT_RXEOL)) {
 646                 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 647                 ath9k_hw_set_interrupts(ah);
 648 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
 649 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
 650 @@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct
 651         return 0;
 652  }
 653
 654 -static int ar9003_hw_power_control_override(struct ath_hw *ah,
 655 -                                           int frequency,
 656 -                                           int *correction,
 657 -                                           int *voltage, int *temperature)
 658 +static void ar9003_hw_power_control_override(struct ath_hw *ah,
 659 +                                            int frequency,
 660 +                                            int *correction,
 661 +                                            int *voltage, int *temperature)
 662  {
 663 -       int tempSlope = 0;
 664 +       int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
 665         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
 666 -       int f[8], t[8], i;
 667 +       int f[8], t[8], t1[3], t2[3], i;
 668
 669         REG_RMW(ah, AR_PHY_TPC_11_B0,
 670                 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
 671 @@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_overr
 672          * enable temperature compensation
 673          * Need to use register names
 674          */
 675 -       if (frequency < 4000)
 676 -               tempSlope = eep->modalHeader2G.tempSlope;
 677 -       else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
 678 -               for (i = 0; i < 8; i++) {
 679 -                       t[i] = eep->base_ext1.tempslopextension[i];
 680 -                       f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
 681 -               }
 682 -               tempSlope = ar9003_hw_power_interpolate((s32) frequency,
 683 -                                                       f, t, 8);
 684 -       } else if (eep->base_ext2.tempSlopeLow != 0) {
 685 -               t[0] = eep->base_ext2.tempSlopeLow;
 686 -               f[0] = 5180;
 687 -               t[1] = eep->modalHeader5G.tempSlope;
 688 -               f[1] = 5500;
 689 -               t[2] = eep->base_ext2.tempSlopeHigh;
 690 -               f[2] = 5785;
 691 -               tempSlope = ar9003_hw_power_interpolate((s32) frequency,
 692 -                                                       f, t, 3);
 693 -       } else
 694 -               tempSlope = eep->modalHeader5G.tempSlope;
 695 +       if (frequency < 4000) {
 696 +               temp_slope = eep->modalHeader2G.tempSlope;
 697 +       } else {
 698 +               if (AR_SREV_9550(ah)) {
 699 +                       t[0] = eep->base_ext1.tempslopextension[2];
 700 +                       t1[0] = eep->base_ext1.tempslopextension[3];
 701 +                       t2[0] = eep->base_ext1.tempslopextension[4];
 702 +                       f[0] = 5180;
 703 +
 704 +                       t[1] = eep->modalHeader5G.tempSlope;
 705 +                       t1[1] = eep->base_ext1.tempslopextension[0];
 706 +                       t2[1] = eep->base_ext1.tempslopextension[1];
 707 +                       f[1] = 5500;
 708 +
 709 +                       t[2] = eep->base_ext1.tempslopextension[5];
 710 +                       t1[2] = eep->base_ext1.tempslopextension[6];
 711 +                       t2[2] = eep->base_ext1.tempslopextension[7];
 712 +                       f[2] = 5785;
 713 +
 714 +                       temp_slope = ar9003_hw_power_interpolate(frequency,
 715 +                                                                f, t, 3);
 716 +                       temp_slope1 = ar9003_hw_power_interpolate(frequency,
 717 +                                                                  f, t1, 3);
 718 +                       temp_slope2 = ar9003_hw_power_interpolate(frequency,
 719 +                                                                  f, t2, 3);
 720 +
 721 +                       goto tempslope;
 722 +               }
 723 +
 724 +               if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
 725 +                       for (i = 0; i < 8; i++) {
 726 +                               t[i] = eep->base_ext1.tempslopextension[i];
 727 +                               f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
 728 +                       }
 729 +                       temp_slope = ar9003_hw_power_interpolate((s32) frequency,
 730 +                                                                f, t, 8);
 731 +               } else if (eep->base_ext2.tempSlopeLow != 0) {
 732 +                       t[0] = eep->base_ext2.tempSlopeLow;
 733 +                       f[0] = 5180;
 734 +                       t[1] = eep->modalHeader5G.tempSlope;
 735 +                       f[1] = 5500;
 736 +                       t[2] = eep->base_ext2.tempSlopeHigh;
 737 +                       f[2] = 5785;
 738 +                       temp_slope = ar9003_hw_power_interpolate((s32) frequency,
 739 +                                                                f, t, 3);
 740 +               } else {
 741 +                       temp_slope = eep->modalHeader5G.tempSlope;
 742 +               }
 743 +       }
 744
 745 -       REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
 746 +tempslope:
 747 +       if (AR_SREV_9550(ah)) {
 748 +               /*
 749 +                * AR955x has tempSlope register for each chain.
 750 +                * Check whether temp_compensation feature is enabled or not.
 751 +                */
 752 +               if (eep->baseEepHeader.featureEnable & 0x1) {
 753 +                       if (frequency < 4000) {
 754 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
 755 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 756 +                                             eep->base_ext2.tempSlopeLow);
 757 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
 758 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 759 +                                             temp_slope);
 760 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
 761 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 762 +                                             eep->base_ext2.tempSlopeHigh);
 763 +                       } else {
 764 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
 765 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 766 +                                             temp_slope);
 767 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
 768 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 769 +                                             temp_slope1);
 770 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
 771 +                                             AR_PHY_TPC_19_ALPHA_THERM,
 772 +                                             temp_slope2);
 773 +                       }
 774 +               } else {
 775 +                       /*
 776 +                        * If temp compensation is not enabled,
 777 +                        * set all registers to 0.
 778 +                        */
 779 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19,
 780 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
 781 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
 782 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
 783 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
 784 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
 785 +               }
 786 +       } else {
 787 +               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
 788 +                             AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
 789 +       }
 790
 791         if (AR_SREV_9462_20(ah))
 792                 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
 793 -                             AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
 794 +                             AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
 795
 796
 797         REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
 798                       temperature[0]);
 799 -
 800 -       return 0;
 801  }
 802
 803  /* Apply the recorded correction values. */
 804 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
 805 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
 806 @@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
 807  static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
 808  {
 809         u16 bMode, fracMode = 0, aModeRefSel = 0;
 810 -       u32 freq, channelSel = 0, reg32 = 0;
 811 +       u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
 812         struct chan_centers centers;
 813         int loadSynthChannel;
 814
 815 @@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct
 816
 817         if (freq < 4800) {     /* 2 GHz, fractional mode */
 818                 if (AR_SREV_9330(ah)) {
 819 -                       u32 chan_frac;
 820 -                       u32 div;
 821 -
 822                         if (ah->is_clk_25mhz)
 823                                 div = 75;
 824                         else
 825 @@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct
 826                         chan_frac = (((freq * 4) % div) * 0x20000) / div;
 827                         channelSel = (channelSel << 17) | chan_frac;
 828                 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
 829 -                       u32 chan_frac;
 830 -
 831                         /*
 832 -                        * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0
 833 +                        * freq_ref = 40 / (refdiva >> amoderefsel);
 834 +                        * where refdiva=1 and amoderefsel=0
 835                          * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
 836                          * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
 837                          */
 838                         channelSel = (freq * 4) / 120;
 839                         chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
 840                         channelSel = (channelSel << 17) | chan_frac;
 841 -               } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
 842 +               } else if (AR_SREV_9340(ah)) {
 843                         if (ah->is_clk_25mhz) {
 844 -                               u32 chan_frac;
 845 -
 846                                 channelSel = (freq * 2) / 75;
 847                                 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
 848                                 channelSel = (channelSel << 17) | chan_frac;
 849 -                       } else
 850 +                       } else {
 851                                 channelSel = CHANSEL_2G(freq) >> 1;
 852 -               } else
 853 +                       }
 854 +               } else if (AR_SREV_9550(ah)) {
 855 +                       if (ah->is_clk_25mhz)
 856 +                               div = 75;
 857 +                       else
 858 +                               div = 120;
 859 +
 860 +                       channelSel = (freq * 4) / div;
 861 +                       chan_frac = (((freq * 4) % div) * 0x20000) / div;
 862 +                       channelSel = (channelSel << 17) | chan_frac;
 863 +               } else {
 864                         channelSel = CHANSEL_2G(freq);
 865 +               }
 866                 /* Set to 2G mode */
 867                 bMode = 1;
 868         } else {
 869                 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
 870                     ah->is_clk_25mhz) {
 871 -                       u32 chan_frac;
 872 -
 873                         channelSel = freq / 75;
 874                         chan_frac = ((freq % 75) * 0x20000) / 75;
 875                         channelSel = (channelSel << 17) | chan_frac;
 876 @@ -586,32 +589,19 @@ static void ar9003_hw_init_bb(struct ath
 877         ath9k_hw_synth_delay(ah, chan, synthDelay);
 878  }
 879
 880 -static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
 881 +void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
 882  {
 883 -       switch (rx) {
 884 -       case 0x5:
 885 +       if (ah->caps.tx_chainmask == 5 || ah->caps.rx_chainmask == 5)
 886                 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
 887                             AR_PHY_SWAP_ALT_CHAIN);
 888 -       case 0x3:
 889 -       case 0x1:
 890 -       case 0x2:
 891 -       case 0x7:
 892 -               REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
 893 -               REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
 894 -               break;
 895 -       default:
 896 -               break;
 897 -       }
 898 +
 899 +       REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
 900 +       REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
 901
 902         if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
 903 -               REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
 904 -       else
 905 -               REG_WRITE(ah, AR_SELFGEN_MASK, tx);
 906 +               tx = 3;
 907
 908 -       if (tx == 0x5) {
 909 -               REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
 910 -                           AR_PHY_SWAP_ALT_CHAIN);
 911 -       }
 912 +       REG_WRITE(ah, AR_SELFGEN_MASK, tx);
 913  }
 914
 915  /*
 916 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
 917 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
 918 @@ -1028,7 +1028,7 @@
 919  #define AR_PHY_TPC_5_B2          (AR_SM2_BASE + 0x208)
 920  #define AR_PHY_TPC_6_B2          (AR_SM2_BASE + 0x20c)
 921  #define AR_PHY_TPC_11_B2         (AR_SM2_BASE + 0x220)
 922 -#define AR_PHY_PDADC_TAB_2       (AR_SM2_BASE + 0x240)
 923 +#define AR_PHY_TPC_19_B2         (AR_SM2_BASE + 0x240)
 924  #define AR_PHY_TX_IQCAL_STATUS_B2   (AR_SM2_BASE + 0x48c)
 925  #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i)    (AR_SM2_BASE + 0x450 + ((_i) << 2))
 926
 927 --- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
 928 +++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
 929 @@ -23,16 +23,16 @@
 930  static const u32 ar955x_1p0_radio_postamble[][5] = {
 931         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 932         {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
 933 -       {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a},
 934 -       {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800},
 935 -       {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a},
 936 -       {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
 937 +       {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
 938 +       {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
 939 +       {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
 940 +       {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
 941         {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
 942         {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
 943 -       {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
 944 +       {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
 945         {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
 946         {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
 947 -       {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
 948 +       {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
 949         {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
 950         {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
 951  };
 952 @@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_pos
 953         {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
 954         {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
 955         {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
 956 -       {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
 957 +       {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
 958         {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
 959         {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
 960         {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
 961         {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
 962         {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
 963 -       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
 964 +       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
 965         {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
 966 -       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
 967 +       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
 968         {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
 969         {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
 970         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
 971 @@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[]
 972         {0x00016094, 0x00000000},
 973         {0x000160a0, 0x0a108ffe},
 974         {0x000160a4, 0x812fc370},
 975 -       {0x000160a8, 0x423c8000},
 976 +       {0x000160a8, 0x423c8100},
 977         {0x000160b4, 0x92480080},
 978         {0x000160c0, 0x006db6d0},
 979         {0x000160c4, 0x6db6db60},
 980 @@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[]
 981         {0x00016100, 0x11999601},
 982         {0x00016108, 0x00080010},
 983         {0x00016144, 0x02084080},
 984 -       {0x00016148, 0x000080c0},
 985 +       {0x00016148, 0x00008040},
 986         {0x00016280, 0x01800804},
 987         {0x00016284, 0x00038dc5},
 988         {0x00016288, 0x00000000},
 989 @@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[]
 990         {0x00016500, 0x11999601},
 991         {0x00016508, 0x00080010},
 992         {0x00016544, 0x02084080},
 993 -       {0x00016548, 0x000080c0},
 994 +       {0x00016548, 0x00008040},
 995         {0x00016780, 0x00000000},
 996         {0x00016784, 0x00000000},
 997         {0x00016788, 0x00400705},
 998 @@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[]
 999         {0x00016900, 0x11999601},
1000         {0x00016908, 0x00080010},
1001         {0x00016944, 0x02084080},
1002 -       {0x00016948, 0x000080c0},
1003 +       {0x00016948, 0x00008040},
1004         {0x00016b80, 0x00000000},
1005         {0x00016b84, 0x00000000},
1006         {0x00016b88, 0x00400705},
1007 @@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[]
1008
1009  static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
1010         /* Addr      5G_HT20_L   5G_HT40_L   5G_HT20_M   5G_HT40_M   5G_HT20_H   5G_HT40_H   2G_HT40     2G_HT20  */
1011 -       {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
1012 -       {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
1013 -       {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
1014 +       {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
1015 +       {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
1016 +       {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
1017         {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
1018         {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
1019         {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
1020 @@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx
1021         {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
1022         {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
1023         {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
1024 -       {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e},
1025 -       {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064},
1026 -       {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242},
1027 -       {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229},
1028 -       {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2},
1029 -       {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203},
1030 -       {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803},
1031 -       {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881},
1032 -       {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809},
1033 -       {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814},
1034 -       {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c},
1035 -       {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e},
1036 -       {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812},
1037 -       {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884},
1038 -       {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84},
1039 -       {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69},
1040 -       {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4},
1041 -       {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3},
1042 -       {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5},
1043 -       {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced},
1044 -       {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4},
1045 -       {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4},
1046 -       {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4},
1047 -       {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4},
1048 -       {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
1049 -       {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
1050 +       {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
1051 +       {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
1052 +       {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
1053 +       {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
1054 +       {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
1055 +       {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
1056 +       {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
1057 +       {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
1058 +       {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
1059 +       {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
1060 +       {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
1061 +       {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
1062 +       {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
1063 +       {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
1064 +       {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
1065 +       {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
1066 +       {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
1067 +       {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
1068 +       {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
1069 +       {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
1070 +       {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
1071 +       {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
1072 +       {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
1073 +       {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
1074 +       {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
1075 +       {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
1076         {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1077         {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1078         {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1079 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000},
1080 -       {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02},
1081 -       {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04},
1082 -       {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000},
1083 -       {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000},
1084 -       {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000},
1085 -       {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000},
1086 -       {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05},
1087 -       {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06},
1088 -       {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07},
1089 -       {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07},
1090 -       {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07},
1091 -       {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07},
1092 -       {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
1093 -       {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
1094 -       {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
1095 +       {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
1096 +       {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
1097 +       {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
1098 +       {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
1099 +       {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
1100 +       {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
1101 +       {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
1102 +       {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
1103 +       {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
1104 +       {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
1105 +       {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1106 +       {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1107 +       {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1108 +       {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
1109 +       {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
1110 +       {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
1111         {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
1112 -       {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
1113 -       {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
1114 -       {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
1115 +       {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
1116 +       {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
1117 +       {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
1118         {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
1119         {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1120 -       {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1121 +       {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1122         {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
1123         {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1124 -       {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1125 +       {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1126         {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1127 -       {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1128 +       {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1129  };
1130
1131  static const u32 ar955x_1p0_mac_core[][2] = {
1132 @@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_cor
1133         {0x0000a44c, 0x00000001},
1134         {0x0000a450, 0x00010000},
1135         {0x0000a458, 0x00000000},
1136 -       {0x0000a644, 0x3fad9d74},
1137 +       {0x0000a644, 0xbfad9d74},
1138         {0x0000a648, 0x0048060a},
1139         {0x0000a64c, 0x00003c37},
1140         {0x0000a670, 0x03020100},
1141 @@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_c
1142         {0x0000801c, 0x148ec02b, 0x148ec057},
1143         {0x00008318, 0x000044c0, 0x00008980},
1144         {0x00009e00, 0x0372131c, 0x0372131c},
1145 -       {0x0000a230, 0x0000000b, 0x00000016},
1146 +       {0x0000a230, 0x0000400b, 0x00004016},
1147         {0x0000a254, 0x00000898, 0x00001130},
1148  };
1149
1150 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c
1151 +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c
1152 @@ -347,6 +347,8 @@ void ath9k_htc_txcompletion_cb(struct ht
1153                         endpoint->ep_callbacks.tx(endpoint->ep_callbacks.priv,
1154                                                   skb, htc_hdr->endpoint_id,
1155                                                   txok);
1156 +               } else {
1157 +                       kfree_skb(skb);
1158                 }
1159         }
1160
1161 --- a/net/wireless/reg.c
1162 +++ b/net/wireless/reg.c
1163 @@ -142,8 +142,8 @@ static void rcu_free_regdom(const struct
1164
1165  static struct regulatory_request *get_last_request(void)
1166  {
1167 -       return rcu_dereference_protected(last_request,
1168 -                                        lockdep_is_held(&reg_mutex));
1169 +       return rcu_dereference_check(last_request,
1170 +                                    lockdep_is_held(&reg_mutex));
1171  }
1172
1173  /* Used to queue up regulatory hints */
1174 @@ -1125,7 +1125,9 @@ static bool is_ht40_allowed(struct ieee8
1175         if (chan->flags & IEEE80211_CHAN_DISABLED)
1176                 return false;
1177         /* This would happen when regulatory rules disallow HT40 completely */
1178 -       return !(chan->flags & IEEE80211_CHAN_NO_HT40);
1179 +       if ((chan->flags & IEEE80211_CHAN_NO_HT40) == IEEE80211_CHAN_NO_HT40)
1180 +               return false;
1181 +       return true;
1182  }
1183
1184  static void reg_process_ht_flags_channel(struct wiphy *wiphy,
1185 @@ -1850,7 +1852,7 @@ static void restore_regulatory_settings(
1186         mutex_lock(&cfg80211_mutex);
1187         mutex_lock(&reg_mutex);
1188
1189 -       reset_regdomains(true, cfg80211_world_regdom);
1190 +       reset_regdomains(true, &world_regdom);
1191         restore_alpha2(alpha2, reset_user);
1192
1193         /*
1194 @@ -2251,14 +2253,21 @@ int set_regdom(const struct ieee80211_re
1195
1196  int reg_device_uevent(struct device *dev, struct kobj_uevent_env *env)
1197  {
1198 -       struct regulatory_request *lr = get_last_request();
1199 +       struct regulatory_request *lr;
1200 +       u8 alpha2[2];
1201 +       bool add = false;
1202
1203 +       rcu_read_lock();
1204 +       lr = get_last_request();
1205         if (lr && !lr->processed) {
1206 -               if (add_uevent_var(env, "COUNTRY=%c%c",
1207 -                                  lr->alpha2[0], lr->alpha2[1]))
1208 -                       return -ENOMEM;
1209 +               memcpy(alpha2, lr->alpha2, 2);
1210 +               add = true;
1211         }
1212 +       rcu_read_unlock();
1213
1214 +       if (add)
1215 +               return add_uevent_var(env, "COUNTRY=%c%c",
1216 +                                     alpha2[0], alpha2[1]);
1217         return 0;
1218  }
1219
1220 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1221 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1222 @@ -967,7 +967,7 @@ static bool ar9003_hw_init_cal(struct at
1223         struct ath9k_hw_cal_data *caldata = ah->caldata;
1224         bool txiqcal_done = false, txclcal_done = false;
1225         bool is_reusable = true, status = true;
1226 -       bool run_rtt_cal = false, run_agc_cal;
1227 +       bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
1228         bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
1229         u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
1230                                           AR_PHY_AGC_CONTROL_FLTR_CAL   |
1231 @@ -977,6 +977,8 @@ static bool ar9003_hw_init_cal(struct at
1232                                           AR_PHY_CL_TAB_1,
1233                                           AR_PHY_CL_TAB_2 };
1234
1235 +       ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
1236 +
1237         if (rtt) {
1238                 if (!ar9003_hw_rtt_restore(ah, chan))
1239                         run_rtt_cal = true;
1240 @@ -1013,7 +1015,8 @@ static bool ar9003_hw_init_cal(struct at
1241                 }
1242         }
1243
1244 -       if (!(ah->enabled_cals & TX_IQ_CAL))
1245 +       if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
1246 +           !(ah->enabled_cals & TX_IQ_CAL))
1247                 goto skip_tx_iqcal;
1248
1249         /* Do Tx IQ Calibration */
1250 @@ -1033,21 +1036,22 @@ static bool ar9003_hw_init_cal(struct at
1251                         REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1252                                     AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
1253                 txiqcal_done = run_agc_cal = true;
1254 -               goto skip_tx_iqcal;
1255 -       } else if (caldata && !caldata->done_txiqcal_once)
1256 +       } else if (caldata && !caldata->done_txiqcal_once) {
1257                 run_agc_cal = true;
1258 +               sep_iq_cal = true;
1259 +       }
1260
1261 +skip_tx_iqcal:
1262         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
1263                 ar9003_mci_init_cal_req(ah, &is_reusable);
1264
1265 -       if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
1266 +       if (sep_iq_cal) {
1267                 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
1268                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1269                 udelay(5);
1270                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1271         }
1272
1273 -skip_tx_iqcal:
1274         if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
1275                 /* Calibrate the AGC */
1276                 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
1277 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1278 +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1279 @@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_
1280         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1281  };
1282
1283 +static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
1284 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1285 +       {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1286 +       {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1287 +       {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1288 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1289 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1290 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1291 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1292 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1293 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1294 +       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
1295 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
1296 +       {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
1297 +       {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
1298 +       {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
1299 +       {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
1300 +       {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
1301 +       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
1302 +       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
1303 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
1304 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
1305 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
1306 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
1307 +       {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
1308 +       {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
1309 +       {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
1310 +       {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
1311 +       {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
1312 +       {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
1313 +       {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
1314 +       {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
1315 +       {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1316 +       {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1317 +       {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1318 +       {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1319 +       {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1320 +       {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1321 +       {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1322 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1323 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
1324 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
1325 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
1326 +       {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
1327 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
1328 +       {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
1329 +       {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
1330 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
1331 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
1332 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
1333 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
1334 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
1335 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
1336 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
1337 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
1338 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
1339 +       {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
1340 +       {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
1341 +       {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
1342 +       {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
1343 +       {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
1344 +       {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
1345 +       {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
1346 +       {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
1347 +       {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1348 +       {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1349 +       {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1350 +       {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1351 +       {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1352 +       {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1353 +       {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1354 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1355 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1356 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1357 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1358 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1359 +       {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
1360 +       {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
1361 +       {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
1362 +       {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
1363 +       {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
1364 +       {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
1365 +       {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1366 +       {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1367 +       {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1368 +       {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1369 +       {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1370 +       {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1371 +       {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1372 +       {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1373 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1374 +       {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1375 +       {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1376 +       {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1377 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1378 +       {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1379 +       {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1380 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1381 +       {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1382 +       {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1383 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1384 +       {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1385 +       {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1386 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1387 +};
1388 +
1389 +static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
1390 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1391 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1392 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1393 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1394 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1395 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1396 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1397 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1398 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1399 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1400 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1401 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1402 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1403 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1404 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1405 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1406 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1407 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1408 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1409 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1410 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1411 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1412 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1413 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1414 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1415 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1416 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1417 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1418 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1419 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1420 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1421 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1422 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1423 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1424 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1425 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1426 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1427 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1428 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1429 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1430 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1431 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1432 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1433 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1434 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1435 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1436 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1437 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1438 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1439 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1440 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1441 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1442 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1443 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1444 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1445 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1446 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1447 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1448 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1449 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1450 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1451 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1452 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1453 +       {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1454 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1455 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1456 +       {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1457 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1458 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1459 +       {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1460 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1461 +};
1462 +
1463  static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
1464         /* Addr      allmodes  */
1465         {0x0000a000, 0x00010000},
1466 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1467 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1468 @@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(s
1469         else if (AR_SREV_9580(ah))
1470                 INIT_INI_ARRAY(&ah->iniModesTxGain,
1471                         ar9580_1p0_mixed_ob_db_tx_gain_table);
1472 +       else
1473 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1474 +                       ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
1475 +}
1476 +
1477 +static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
1478 +{
1479 +       if (AR_SREV_9485_11(ah))
1480 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1481 +                       ar9485Modes_green_ob_db_tx_gain_1_1);
1482 +       else if (AR_SREV_9340(ah))
1483 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1484 +                       ar9340Modes_ub124_tx_gain_table_1p0);
1485 +       else if (AR_SREV_9580(ah))
1486 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1487 +                       ar9580_1p0_type5_tx_gain_table);
1488 +       else if (AR_SREV_9300_22(ah))
1489 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1490 +                       ar9300Modes_type5_tx_gain_table_2p2);
1491 +}
1492 +
1493 +static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
1494 +{
1495 +       if (AR_SREV_9340(ah))
1496 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1497 +                       ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
1498 +       else if (AR_SREV_9485_11(ah))
1499 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1500 +                       ar9485Modes_green_spur_ob_db_tx_gain_1_1);
1501 +       else if (AR_SREV_9580(ah))
1502 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1503 +                       ar9580_1p0_type6_tx_gain_table);
1504  }
1505
1506 +typedef void (*ath_txgain_tab)(struct ath_hw *ah);
1507 +
1508  static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
1509  {
1510 -       switch (ar9003_hw_get_tx_gain_idx(ah)) {
1511 -       case 0:
1512 -       default:
1513 -               ar9003_tx_gain_table_mode0(ah);
1514 -               break;
1515 -       case 1:
1516 -               ar9003_tx_gain_table_mode1(ah);
1517 -               break;
1518 -       case 2:
1519 -               ar9003_tx_gain_table_mode2(ah);
1520 -               break;
1521 -       case 3:
1522 -               ar9003_tx_gain_table_mode3(ah);
1523 -               break;
1524 -       case 4:
1525 -               ar9003_tx_gain_table_mode4(ah);
1526 -               break;
1527 -       }
1528 +       static const ath_txgain_tab modes[] = {
1529 +               ar9003_tx_gain_table_mode0,
1530 +               ar9003_tx_gain_table_mode1,
1531 +               ar9003_tx_gain_table_mode2,
1532 +               ar9003_tx_gain_table_mode3,
1533 +               ar9003_tx_gain_table_mode4,
1534 +               ar9003_tx_gain_table_mode5,
1535 +               ar9003_tx_gain_table_mode6,
1536 +       };
1537 +       int idx = ar9003_hw_get_tx_gain_idx(ah);
1538 +
1539 +       if (idx >= ARRAY_SIZE(modes))
1540 +               idx = 0;
1541 +
1542 +       modes[idx](ah);
1543  }
1544
1545  static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
1546 @@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw
1547         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1548         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1549
1550 -       priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
1551 +       ar9003_hw_init_mode_regs(ah);
1552         priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
1553
1554         ops->config_pci_powersave = ar9003_hw_configpcipowersave;
1555 --- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1556 +++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1557 @@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db
1558         {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
1559  };
1560
1561 +static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
1562 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1563 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1564 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1565 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1566 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1567 +       {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
1568 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1569 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1570 +       {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
1571 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
1572 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
1573 +       {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
1574 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
1575 +       {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
1576 +       {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
1577 +       {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
1578 +       {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
1579 +       {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
1580 +       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
1581 +       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
1582 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
1583 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
1584 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
1585 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
1586 +       {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
1587 +       {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
1588 +       {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
1589 +       {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
1590 +       {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
1591 +       {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
1592 +       {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
1593 +       {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
1594 +       {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1595 +       {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1596 +       {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1597 +       {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1598 +       {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1599 +       {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1600 +       {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1601 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1602 +       {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
1603 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
1604 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
1605 +       {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
1606 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
1607 +       {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
1608 +       {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
1609 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
1610 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
1611 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
1612 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
1613 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
1614 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
1615 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
1616 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
1617 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
1618 +       {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
1619 +       {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
1620 +       {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
1621 +       {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
1622 +       {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
1623 +       {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
1624 +       {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
1625 +       {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
1626 +       {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1627 +       {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1628 +       {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1629 +       {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1630 +       {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1631 +       {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1632 +       {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1633 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1634 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1635 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1636 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1637 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1638 +       {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
1639 +       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1640 +       {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
1641 +       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
1642 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
1643 +       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
1644 +       {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
1645 +       {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1646 +       {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1647 +       {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1648 +       {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1649 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1650 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1651 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1652 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1653 +       {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1654 +       {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1655 +       {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
1656 +       {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
1657 +       {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1658 +       {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1659 +};
1660 +
1661  static const u32 ar9340_1p0_mac_core[][2] = {
1662         /* Addr      allmodes  */
1663         {0x00000008, 0x00000000},
1664 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1665 +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1666 @@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_
1667         {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1668  };
1669
1670 +static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
1671 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1672 +       {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1673 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1674 +       {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1675 +       {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1676 +       {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1677 +       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
1678 +       {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1679 +       {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1680 +       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1681 +       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
1682 +       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
1683 +       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
1684 +       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
1685 +       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
1686 +       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
1687 +       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
1688 +       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
1689 +       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
1690 +       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
1691 +       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
1692 +       {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
1693 +       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
1694 +       {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
1695 +       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
1696 +       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
1697 +       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
1698 +       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
1699 +       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
1700 +       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
1701 +       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1702 +       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1703 +       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1704 +       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1705 +       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1706 +       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1707 +       {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1708 +       {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1709 +       {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1710 +       {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1711 +       {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1712 +       {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1713 +       {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1714 +       {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1715 +       {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1716 +       {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1717 +       {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1718 +       {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1719 +       {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1720 +       {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1721 +       {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1722 +       {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1723 +       {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1724 +       {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1725 +       {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1726 +       {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1727 +       {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1728 +       {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1729 +       {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1730 +       {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1731 +       {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1732 +       {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1733 +       {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1734 +       {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1735 +       {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1736 +       {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1737 +       {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1738 +       {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1739 +       {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1740 +       {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1741 +};
1742 +
1743  static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
1744         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1745         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
1746 @@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_t
1747
1748  #define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
1749
1750 +static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
1751 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1752 +       {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1753 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1754 +       {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1755 +       {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1756 +       {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1757 +       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
1758 +       {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1759 +       {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1760 +       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1761 +       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
1762 +       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
1763 +       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
1764 +       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
1765 +       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
1766 +       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
1767 +       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
1768 +       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
1769 +       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
1770 +       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
1771 +       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
1772 +       {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
1773 +       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
1774 +       {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
1775 +       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
1776 +       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
1777 +       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
1778 +       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
1779 +       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
1780 +       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
1781 +       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1782 +       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1783 +       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1784 +       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1785 +       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1786 +       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1787 +       {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1788 +       {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1789 +       {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1790 +       {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1791 +       {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1792 +       {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1793 +       {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1794 +       {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1795 +       {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1796 +       {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1797 +       {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1798 +       {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1799 +       {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1800 +       {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1801 +       {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1802 +       {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1803 +       {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1804 +       {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1805 +       {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1806 +       {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1807 +       {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1808 +       {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1809 +       {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1810 +       {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1811 +       {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1812 +       {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1813 +       {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1814 +       {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1815 +       {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1816 +       {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1817 +       {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1818 +       {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1819 +       {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1820 +       {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1821 +};
1822 +
1823  static const u32 ar9485_1_1[][2] = {
1824         /* Addr      allmodes  */
1825         {0x0000a580, 0x00000000},
1826 --- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1827 +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1828 @@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_
1829
1830  #define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
1831
1832 +#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
1833 +
1834 +static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
1835 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1836 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1837 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1838 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1839 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1840 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1841 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1842 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1843 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1844 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1845 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1846 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1847 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1848 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1849 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1850 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1851 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1852 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1853 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1854 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1855 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1856 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1857 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1858 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1859 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1860 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1861 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1862 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1863 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1864 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1865 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1866 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1867 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1868 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1869 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1870 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1871 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1872 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1873 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1874 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1875 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1876 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1877 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1878 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1879 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1880 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1881 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1882 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1883 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1884 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1885 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1886 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1887 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1888 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1889 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1890 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1891 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1892 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1893 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1894 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1895 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1896 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1897 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1898 +       {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1899 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1900 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1901 +       {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1902 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1903 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1904 +       {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1905 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1906 +};
1907 +
1908  static const u32 ar9580_1p0_soc_preamble[][2] = {
1909         /* Addr      allmodes  */
1910         {0x000040a4, 0x00a0c1c9},
1911 --- a/drivers/net/wireless/ath/ath9k/reg.h
1912 +++ b/drivers/net/wireless/ath/ath9k/reg.h
1913 @@ -789,6 +789,7 @@
1914  #define AR_SREV_REVISION_9271_11       1
1915  #define AR_SREV_VERSION_9300           0x1c0
1916  #define AR_SREV_REVISION_9300_20       2 /* 2.0 and 2.1 */
1917 +#define AR_SREV_REVISION_9300_22       3
1918  #define AR_SREV_VERSION_9330           0x200
1919  #define AR_SREV_REVISION_9330_10       0
1920  #define AR_SREV_REVISION_9330_11       1
1921 @@ -869,6 +870,9 @@
1922         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
1923  #define AR_SREV_9300_20_OR_LATER(_ah) \
1924         ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
1925 +#define AR_SREV_9300_22(_ah) \
1926 +       (AR_SREV_9300(ah) && \
1927 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
1928
1929  #define AR_SREV_9330(_ah) \
1930         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
1931 --- a/net/mac80211/mlme.c
1932 +++ b/net/mac80211/mlme.c
1933 @@ -199,11 +199,11 @@ static u32 ieee80211_config_ht_tx(struct
1934         case NL80211_CHAN_WIDTH_40:
1935                 if (sdata->vif.bss_conf.chandef.chan->center_freq >
1936                                 sdata->vif.bss_conf.chandef.center_freq1 &&
1937 -                   chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1938 +                   chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1939                         disable_40 = true;
1940                 if (sdata->vif.bss_conf.chandef.chan->center_freq <
1941                                 sdata->vif.bss_conf.chandef.center_freq1 &&
1942 -                   chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1943 +                   chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1944                         disable_40 = true;
1945                 break;
1946         default:
1947 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1948 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1949 @@ -18,6 +18,7 @@
1950  #include "hw-ops.h"
1951  #include "../regd.h"
1952  #include "ar9002_phy.h"
1953 +#include "ar5008_initvals.h"
1954
1955  /* All code below is for AR5008, AR9001, AR9002 */
1956
1957 @@ -43,23 +44,16 @@ static const int m2ThreshLowExt_off = 12
1958  static const int m1ThreshExt_off = 127;
1959  static const int m2ThreshExt_off = 127;
1960
1961 +static const struct ar5416IniArray bank0 = STATIC_INI_ARRAY(ar5416Bank0);
1962 +static const struct ar5416IniArray bank1 = STATIC_INI_ARRAY(ar5416Bank1);
1963 +static const struct ar5416IniArray bank2 = STATIC_INI_ARRAY(ar5416Bank2);
1964 +static const struct ar5416IniArray bank3 = STATIC_INI_ARRAY(ar5416Bank3);
1965 +static const struct ar5416IniArray bank7 = STATIC_INI_ARRAY(ar5416Bank7);
1966
1967 -static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
1968 -                                int col)
1969 -{
1970 -       int i;
1971 -
1972 -       for (i = 0; i < array->ia_rows; i++)
1973 -               bank[i] = INI_RA(array, i, col);
1974 -}
1975 -
1976 -
1977 -#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
1978 -       ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
1979 -
1980 -static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
1981 -                                 u32 *data, unsigned int *writecnt)
1982 +static void ar5008_write_bank6(struct ath_hw *ah, unsigned int *writecnt)
1983  {
1984 +       struct ar5416IniArray *array = &ah->iniBank6;
1985 +       u32 *data = ah->analogBank6Data;
1986         int r;
1987
1988         ENABLE_REGWRITE_BUFFER(ah);
1989 @@ -165,7 +159,7 @@ static void ar5008_hw_force_bias(struct
1990         ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
1991
1992         /* write Bank 6 with new params */
1993 -       REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
1994 +       ar5008_write_bank6(ah, &reg_writes);
1995  }
1996
1997  /**
1998 @@ -469,31 +463,16 @@ static void ar5008_hw_spur_mitigate(stru
1999   */
2000  static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
2001  {
2002 -#define ATH_ALLOC_BANK(bank, size) do { \
2003 -               bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
2004 -               if (!bank) \
2005 -                       goto error; \
2006 -       } while (0);
2007 -
2008 -       struct ath_common *common = ath9k_hw_common(ah);
2009 +       int size = ah->iniBank6.ia_rows * sizeof(u32);
2010
2011         if (AR_SREV_9280_20_OR_LATER(ah))
2012             return 0;
2013
2014 -       ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
2015 -       ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
2016 -       ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
2017 -       ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
2018 -       ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
2019 -       ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
2020 -       ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
2021 -       ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
2022 +       ah->analogBank6Data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
2023 +       if (!ah->analogBank6Data)
2024 +               return -ENOMEM;
2025
2026         return 0;
2027 -#undef ATH_ALLOC_BANK
2028 -error:
2029 -       ath_err(common, "Cannot allocate RF banks\n");
2030 -       return -ENOMEM;
2031  }
2032
2033
2034 @@ -517,6 +496,7 @@ static bool ar5008_hw_set_rf_regs(struct
2035         u32 ob5GHz = 0, db5GHz = 0;
2036         u32 ob2GHz = 0, db2GHz = 0;
2037         int regWrites = 0;
2038 +       int i;
2039
2040         /*
2041          * Software does not need to program bank data
2042 @@ -529,25 +509,8 @@ static bool ar5008_hw_set_rf_regs(struct
2043         /* Setup rf parameters */
2044         eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
2045
2046 -       /* Setup Bank 0 Write */
2047 -       ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
2048 -
2049 -       /* Setup Bank 1 Write */
2050 -       ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
2051 -
2052 -       /* Setup Bank 2 Write */
2053 -       ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
2054 -
2055 -       /* Setup Bank 6 Write */
2056 -       ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
2057 -                     modesIndex);
2058 -       {
2059 -               int i;
2060 -               for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
2061 -                       ah->analogBank6Data[i] =
2062 -                           INI_RA(&ah->iniBank6TPC, i, modesIndex);
2063 -               }
2064 -       }
2065 +       for (i = 0; i < ah->iniBank6.ia_rows; i++)
2066 +               ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
2067
2068         /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
2069         if (eepMinorRev >= 2) {
2070 @@ -568,22 +531,13 @@ static bool ar5008_hw_set_rf_regs(struct
2071                 }
2072         }
2073
2074 -       /* Setup Bank 7 Setup */
2075 -       ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
2076 -
2077         /* Write Analog registers */
2078 -       REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
2079 -                          regWrites);
2080 -       REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
2081 -                          regWrites);
2082 -       REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
2083 -                          regWrites);
2084 -       REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
2085 -                          regWrites);
2086 -       REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
2087 -                          regWrites);
2088 -       REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
2089 -                          regWrites);
2090 +       REG_WRITE_ARRAY(&bank0, 1, regWrites);
2091 +       REG_WRITE_ARRAY(&bank1, 1, regWrites);
2092 +       REG_WRITE_ARRAY(&bank2, 1, regWrites);
2093 +       REG_WRITE_ARRAY(&bank3, modesIndex, regWrites);
2094 +       ar5008_write_bank6(ah, &regWrites);
2095 +       REG_WRITE_ARRAY(&bank7, 1, regWrites);
2096
2097         return true;
2098  }
2099 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
2100 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
2101 @@ -23,13 +23,13 @@
2102
2103  /* General hardware code for the A5008/AR9001/AR9002 hadware families */
2104
2105 -static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
2106 +static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
2107  {
2108         if (AR_SREV_9271(ah)) {
2109                 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
2110                 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
2111                 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
2112 -               return;
2113 +               return 0;
2114         }
2115
2116         if (ah->config.pcie_clock_req)
2117 @@ -67,12 +67,10 @@ static void ar9002_hw_init_mode_regs(str
2118         } else if (AR_SREV_9100_OR_LATER(ah)) {
2119                 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
2120                 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
2121 -               INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
2122                 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
2123         } else {
2124                 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
2125                 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
2126 -               INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
2127                 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
2128         }
2129
2130 @@ -80,20 +78,11 @@ static void ar9002_hw_init_mode_regs(str
2131                 /* Common for AR5416, AR913x, AR9160 */
2132                 INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
2133
2134 -               INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
2135 -               INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
2136 -               INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
2137 -               INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
2138 -               INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
2139 -
2140 -               /* Common for AR5416, AR9160 */
2141 -               if (!AR_SREV_9100(ah))
2142 -                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
2143 -
2144                 /* Common for AR913x, AR9160 */
2145                 if (!AR_SREV_5416(ah))
2146 -                       INIT_INI_ARRAY(&ah->iniBank6TPC,
2147 -                                     ar5416Bank6TPC_9100);
2148 +                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
2149 +               else
2150 +                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC);
2151         }
2152
2153         /* iniAddac needs to be modified for these chips */
2154 @@ -104,7 +93,7 @@ static void ar9002_hw_init_mode_regs(str
2155
2156                 data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
2157                 if (!data)
2158 -                       return;
2159 +                       return -ENOMEM;
2160
2161                 memcpy(data, addac->ia_array, size);
2162                 addac->ia_array = data;
2163 @@ -120,6 +109,7 @@ static void ar9002_hw_init_mode_regs(str
2164                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
2165                        ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
2166         }
2167 +       return 0;
2168  }
2169
2170  static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
2171 @@ -415,7 +405,10 @@ int ar9002_hw_attach_ops(struct ath_hw *
2172         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
2173         int ret;
2174
2175 -       priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
2176 +       ret = ar9002_hw_init_mode_regs(ah);
2177 +       if (ret)
2178 +               return ret;
2179 +
2180         priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
2181
2182         ops->config_pci_powersave = ar9002_hw_configpcipowersave;
2183 --- a/drivers/net/wireless/ath/ath9k/hw.c
2184 +++ b/drivers/net/wireless/ath/ath9k/hw.c
2185 @@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(s
2186         ath9k_hw_private_ops(ah)->init_cal_settings(ah);
2187  }
2188
2189 -static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
2190 -{
2191 -       ath9k_hw_private_ops(ah)->init_mode_regs(ah);
2192 -}
2193 -
2194  static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
2195                                         struct ath9k_channel *chan)
2196  {
2197 @@ -208,7 +203,7 @@ void ath9k_hw_synth_delay(struct ath_hw
2198         udelay(hw_delay + BASE_ACTIVATE_DELAY);
2199  }
2200
2201 -void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
2202 +void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
2203                           int column, unsigned int *writecnt)
2204  {
2205         int r;
2206 @@ -554,10 +549,8 @@ static int ath9k_hw_post_init(struct ath
2207                 ah->eep_ops->get_eeprom_ver(ah),
2208                 ah->eep_ops->get_eeprom_rev(ah));
2209
2210 -       if (ah->config.enable_ani) {
2211 -               ath9k_hw_ani_setup(ah);
2212 +       if (ah->config.enable_ani)
2213                 ath9k_hw_ani_init(ah);
2214 -       }
2215
2216         return 0;
2217  }
2218 @@ -670,8 +663,6 @@ static int __ath9k_hw_init(struct ath_hw
2219         if (!AR_SREV_9300_20_OR_LATER(ah))
2220                 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
2221
2222 -       ath9k_hw_init_mode_regs(ah);
2223 -
2224         if (!ah->is_pciexpress)
2225                 ath9k_hw_disablepcie(ah);
2226
2227 --- a/drivers/net/wireless/ath/ath9k/hw.h
2228 +++ b/drivers/net/wireless/ath/ath9k/hw.h
2229 @@ -599,7 +599,6 @@ struct ath_hw_radar_conf {
2230   * @init_cal_settings: setup types of calibrations supported
2231   * @init_cal: starts actual calibration
2232   *
2233 - * @init_mode_regs: Initializes mode registers
2234   * @init_mode_gain_regs: Initialize TX/RX gain registers
2235   *
2236   * @rf_set_freq: change frequency
2237 @@ -618,7 +617,6 @@ struct ath_hw_private_ops {
2238         void (*init_cal_settings)(struct ath_hw *ah);
2239         bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
2240
2241 -       void (*init_mode_regs)(struct ath_hw *ah);
2242         void (*init_mode_gain_regs)(struct ath_hw *ah);
2243         void (*setup_calibration)(struct ath_hw *ah,
2244                                   struct ath9k_cal_list *currCal);
2245 @@ -810,14 +808,7 @@ struct ath_hw {
2246         struct ath_hw_ops ops;
2247
2248         /* Used to program the radio on non single-chip devices */
2249 -       u32 *analogBank0Data;
2250 -       u32 *analogBank1Data;
2251 -       u32 *analogBank2Data;
2252 -       u32 *analogBank3Data;
2253         u32 *analogBank6Data;
2254 -       u32 *analogBank6TPCData;
2255 -       u32 *analogBank7Data;
2256 -       u32 *bank6Temp;
2257
2258         int coverage_class;
2259         u32 slottime;
2260 @@ -826,10 +817,6 @@ struct ath_hw {
2261         /* ANI */
2262         u32 proc_phyerr;
2263         u32 aniperiod;
2264 -       int totalSizeDesired[5];
2265 -       int coarse_high[5];
2266 -       int coarse_low[5];
2267 -       int firpwr[5];
2268         enum ath9k_ani_cmd ani_function;
2269         u32 ani_skip_count;
2270
2271 @@ -852,14 +839,8 @@ struct ath_hw {
2272
2273         struct ar5416IniArray iniModes;
2274         struct ar5416IniArray iniCommon;
2275 -       struct ar5416IniArray iniBank0;
2276         struct ar5416IniArray iniBB_RfGain;
2277 -       struct ar5416IniArray iniBank1;
2278 -       struct ar5416IniArray iniBank2;
2279 -       struct ar5416IniArray iniBank3;
2280         struct ar5416IniArray iniBank6;
2281 -       struct ar5416IniArray iniBank6TPC;
2282 -       struct ar5416IniArray iniBank7;
2283         struct ar5416IniArray iniAddac;
2284         struct ar5416IniArray iniPcieSerdes;
2285  #ifdef CONFIG_PM_SLEEP
2286 @@ -975,7 +956,7 @@ void ath9k_hw_setantenna(struct ath_hw *
2287  void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
2288                           int hw_delay);
2289  bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
2290 -void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
2291 +void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
2292                           int column, unsigned int *writecnt);
2293  u32 ath9k_hw_reverse_bits(u32 val, u32 n);
2294  u16 ath9k_hw_computetxtime(struct ath_hw *ah,
2295 @@ -1062,6 +1043,7 @@ void ar9003_paprd_setup_gain_table(struc
2296  int ar9003_paprd_init_table(struct ath_hw *ah);
2297  bool ar9003_paprd_is_done(struct ath_hw *ah);
2298  bool ar9003_is_paprd_enabled(struct ath_hw *ah);
2299 +void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
2300
2301  /* Hardware family op attach helpers */
2302  int ar5008_hw_attach_phy_ops(struct ath_hw *ah);
2303 --- a/net/mac80211/tx.c
2304 +++ b/net/mac80211/tx.c
2305 @@ -1677,10 +1677,10 @@ netdev_tx_t ieee80211_monitor_start_xmit
2306                         chanctx_conf =
2307                                 rcu_dereference(tmp_sdata->vif.chanctx_conf);
2308         }
2309 -       if (!chanctx_conf)
2310 -               goto fail_rcu;
2311 -
2312 -       chan = chanctx_conf->def.chan;
2313 +       if (chanctx_conf)
2314 +               chan = chanctx_conf->def.chan;
2315 +       else
2316 +               chan = local->_oper_channel;
2317
2318         /*
2319          * Frame injection is not allowed if beaconing is not allowed
2320 --- a/drivers/net/wireless/ath/ath9k/ani.c
2321 +++ b/drivers/net/wireless/ath/ath9k/ani.c
2322 @@ -152,7 +152,8 @@ static void ath9k_hw_set_ofdm_nil(struct
2323         ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
2324                 aniState->ofdmNoiseImmunityLevel,
2325                 immunityLevel, BEACON_RSSI(ah),
2326 -               aniState->rssiThrLow, aniState->rssiThrHigh);
2327 +               ATH9K_ANI_RSSI_THR_LOW,
2328 +               ATH9K_ANI_RSSI_THR_HIGH);
2329
2330         if (!scan)
2331                 aniState->ofdmNoiseImmunityLevel = immunityLevel;
2332 @@ -173,7 +174,7 @@ static void ath9k_hw_set_ofdm_nil(struct
2333
2334         weak_sig = entry_ofdm->ofdm_weak_signal_on;
2335         if (ah->opmode == NL80211_IFTYPE_STATION &&
2336 -           BEACON_RSSI(ah) <= aniState->rssiThrHigh)
2337 +           BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_HIGH)
2338                 weak_sig = true;
2339
2340         if (aniState->ofdmWeakSigDetect != weak_sig)
2341 @@ -216,11 +217,11 @@ static void ath9k_hw_set_cck_nil(struct
2342
2343         ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
2344                 aniState->cckNoiseImmunityLevel, immunityLevel,
2345 -               BEACON_RSSI(ah), aniState->rssiThrLow,
2346 -               aniState->rssiThrHigh);
2347 +               BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
2348 +               ATH9K_ANI_RSSI_THR_HIGH);
2349
2350         if (ah->opmode == NL80211_IFTYPE_STATION &&
2351 -           BEACON_RSSI(ah) <= aniState->rssiThrLow &&
2352 +           BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
2353             immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
2354                 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
2355
2356 @@ -418,9 +419,6 @@ void ath9k_hw_ani_monitor(struct ath_hw
2357                 return;
2358
2359         aniState = &ah->curchan->ani;
2360 -       if (WARN_ON(!aniState))
2361 -               return;
2362 -
2363         if (!ath9k_hw_ani_read_counters(ah))
2364                 return;
2365
2366 @@ -489,23 +487,6 @@ void ath9k_hw_disable_mib_counters(struc
2367  }
2368  EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
2369
2370 -void ath9k_hw_ani_setup(struct ath_hw *ah)
2371 -{
2372 -       int i;
2373 -
2374 -       static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
2375 -       static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
2376 -       static const int coarseLow[] = { -64, -64, -64, -64, -70 };
2377 -       static const int firpwr[] = { -78, -78, -78, -78, -80 };
2378 -
2379 -       for (i = 0; i < 5; i++) {
2380 -               ah->totalSizeDesired[i] = totalSizeDesired[i];
2381 -               ah->coarse_high[i] = coarseHigh[i];
2382 -               ah->coarse_low[i] = coarseLow[i];
2383 -               ah->firpwr[i] = firpwr[i];
2384 -       }
2385 -}
2386 -
2387  void ath9k_hw_ani_init(struct ath_hw *ah)
2388  {
2389         struct ath_common *common = ath9k_hw_common(ah);
2390 @@ -531,8 +512,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
2391
2392                 ani->ofdmsTurn = true;
2393
2394 -               ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
2395 -               ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
2396                 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
2397                 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
2398                 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
2399 --- a/drivers/net/wireless/ath/ath9k/ani.h
2400 +++ b/drivers/net/wireless/ath/ath9k/ani.h
2401 @@ -104,7 +104,6 @@ struct ath9k_ani_default {
2402  };
2403
2404  struct ar5416AniState {
2405 -       struct ath9k_channel *c;
2406         u8 noiseImmunityLevel;
2407         u8 ofdmNoiseImmunityLevel;
2408         u8 cckNoiseImmunityLevel;
2409 @@ -113,15 +112,9 @@ struct ar5416AniState {
2410         u8 spurImmunityLevel;
2411         u8 firstepLevel;
2412         u8 ofdmWeakSigDetect;
2413 -       u8 cckWeakSigThreshold;
2414         u32 listenTime;
2415 -       int32_t rssiThrLow;
2416 -       int32_t rssiThrHigh;
2417         u32 ofdmPhyErrCount;
2418         u32 cckPhyErrCount;
2419 -       int16_t pktRssi[2];
2420 -       int16_t ofdmErrRssi[2];
2421 -       int16_t cckErrRssi[2];
2422         struct ath9k_ani_default iniDef;
2423  };
2424
2425 @@ -147,7 +140,6 @@ struct ar5416Stats {
2426
2427  void ath9k_enable_mib_counters(struct ath_hw *ah);
2428  void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
2429 -void ath9k_hw_ani_setup(struct ath_hw *ah);
2430  void ath9k_hw_ani_init(struct ath_hw *ah);
2431
2432  #endif /* ANI_H */
2433 --- a/drivers/net/wireless/ath/ath9k/calib.h
2434 +++ b/drivers/net/wireless/ath/ath9k/calib.h
2435 @@ -33,6 +33,12 @@ struct ar5416IniArray {
2436         u32 ia_columns;
2437  };
2438
2439 +#define STATIC_INI_ARRAY(array) {                      \
2440 +               .ia_array = (u32 *)(array),             \
2441 +               .ia_rows = ARRAY_SIZE(array),           \
2442 +               .ia_columns = ARRAY_SIZE(array[0]),     \
2443 +       }
2444 +
2445  #define INIT_INI_ARRAY(iniarray, array) do {   \
2446                 (iniarray)->ia_array = (u32 *)(array);          \
2447                 (iniarray)->ia_rows = ARRAY_SIZE(array);        \
2448 --- a/drivers/net/wireless/ath/ath9k/xmit.c
2449 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
2450 @@ -378,7 +378,7 @@ static void ath_tx_count_frames(struct a
2451
2452  static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
2453                                  struct ath_buf *bf, struct list_head *bf_q,
2454 -                                struct ath_tx_status *ts, int txok, bool retry)
2455 +                                struct ath_tx_status *ts, int txok)
2456  {
2457         struct ath_node *an = NULL;
2458         struct sk_buff *skb;
2459 @@ -490,7 +490,7 @@ static void ath_tx_complete_aggr(struct
2460                 } else if (!isaggr && txok) {
2461                         /* transmit completion */
2462                         acked_cnt++;
2463 -               } else if ((tid->state & AGGR_CLEANUP) || !retry) {
2464 +               } else if (tid->state & AGGR_CLEANUP) {
2465                         /*
2466                          * cleanup in progress, just fail
2467                          * the un-acked sub-frames
2468 @@ -604,6 +604,37 @@ static void ath_tx_complete_aggr(struct
2469                 ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
2470  }
2471
2472 +static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
2473 +{
2474 +    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
2475 +    return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
2476 +}
2477 +
2478 +static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2479 +                                 struct ath_tx_status *ts, struct ath_buf *bf,
2480 +                                 struct list_head *bf_head)
2481 +{
2482 +       bool txok, flush;
2483 +
2484 +       txok = !(ts->ts_status & ATH9K_TXERR_MASK);
2485 +       flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
2486 +       txq->axq_tx_inprogress = false;
2487 +
2488 +       txq->axq_depth--;
2489 +       if (bf_is_ampdu_not_probing(bf))
2490 +               txq->axq_ampdu_depth--;
2491 +
2492 +       if (!bf_isampdu(bf)) {
2493 +               if (!flush)
2494 +                       ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2495 +               ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
2496 +       } else
2497 +               ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
2498 +
2499 +       if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
2500 +               ath_txq_schedule(sc, txq);
2501 +}
2502 +
2503  static bool ath_lookup_legacy(struct ath_buf *bf)
2504  {
2505         struct sk_buff *skb;
2506 @@ -1331,23 +1362,6 @@ void ath_tx_aggr_resume(struct ath_softc
2507  /* Queue Management */
2508  /********************/
2509
2510 -static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
2511 -                                         struct ath_txq *txq)
2512 -{
2513 -       struct ath_atx_ac *ac, *ac_tmp;
2514 -       struct ath_atx_tid *tid, *tid_tmp;
2515 -
2516 -       list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
2517 -               list_del(&ac->list);
2518 -               ac->sched = false;
2519 -               list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
2520 -                       list_del(&tid->list);
2521 -                       tid->sched = false;
2522 -                       ath_tid_drain(sc, txq, tid);
2523 -               }
2524 -       }
2525 -}
2526 -
2527  struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
2528  {
2529         struct ath_hw *ah = sc->sc_ah;
2530 @@ -1470,14 +1484,8 @@ int ath_cabq_update(struct ath_softc *sc
2531         return 0;
2532  }
2533
2534 -static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
2535 -{
2536 -    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
2537 -    return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
2538 -}
2539 -
2540  static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
2541 -                              struct list_head *list, bool retry_tx)
2542 +                              struct list_head *list)
2543  {
2544         struct ath_buf *bf, *lastbf;
2545         struct list_head bf_head;
2546 @@ -1499,16 +1507,7 @@ static void ath_drain_txq_list(struct at
2547
2548                 lastbf = bf->bf_lastbf;
2549                 list_cut_position(&bf_head, list, &lastbf->list);
2550 -
2551 -               txq->axq_depth--;
2552 -               if (bf_is_ampdu_not_probing(bf))
2553 -                       txq->axq_ampdu_depth--;
2554 -
2555 -               if (bf_isampdu(bf))
2556 -                       ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
2557 -                                            retry_tx);
2558 -               else
2559 -                       ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
2560 +               ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
2561         }
2562  }
2563
2564 @@ -1518,7 +1517,7 @@ static void ath_drain_txq_list(struct at
2565   * This assumes output has been stopped and
2566   * we do not need to block ath_tx_tasklet.
2567   */
2568 -void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
2569 +void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq)
2570  {
2571         ath_txq_lock(sc, txq);
2572
2573 @@ -1526,8 +1525,7 @@ void ath_draintxq(struct ath_softc *sc,
2574                 int idx = txq->txq_tailidx;
2575
2576                 while (!list_empty(&txq->txq_fifo[idx])) {
2577 -                       ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx],
2578 -                                          retry_tx);
2579 +                       ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]);
2580
2581                         INCR(idx, ATH_TXFIFO_DEPTH);
2582                 }
2583 @@ -1536,16 +1534,12 @@ void ath_draintxq(struct ath_softc *sc,
2584
2585         txq->axq_link = NULL;
2586         txq->axq_tx_inprogress = false;
2587 -       ath_drain_txq_list(sc, txq, &txq->axq_q, retry_tx);
2588 -
2589 -       /* flush any pending frames if aggregation is enabled */
2590 -       if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !retry_tx)
2591 -               ath_txq_drain_pending_buffers(sc, txq);
2592 +       ath_drain_txq_list(sc, txq, &txq->axq_q);
2593
2594         ath_txq_unlock_complete(sc, txq);
2595  }
2596
2597 -bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
2598 +bool ath_drain_all_txq(struct ath_softc *sc)
2599  {
2600         struct ath_hw *ah = sc->sc_ah;
2601         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2602 @@ -1581,7 +1575,7 @@ bool ath_drain_all_txq(struct ath_softc
2603                  */
2604                 txq = &sc->tx.txq[i];
2605                 txq->stopped = false;
2606 -               ath_draintxq(sc, txq, retry_tx);
2607 +               ath_draintxq(sc, txq);
2608         }
2609
2610         return !npend;
2611 @@ -2175,28 +2169,6 @@ static void ath_tx_rc_status(struct ath_
2612         tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1;
2613  }
2614
2615 -static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2616 -                                 struct ath_tx_status *ts, struct ath_buf *bf,
2617 -                                 struct list_head *bf_head)
2618 -{
2619 -       int txok;
2620 -
2621 -       txq->axq_depth--;
2622 -       txok = !(ts->ts_status & ATH9K_TXERR_MASK);
2623 -       txq->axq_tx_inprogress = false;
2624 -       if (bf_is_ampdu_not_probing(bf))
2625 -               txq->axq_ampdu_depth--;
2626 -
2627 -       if (!bf_isampdu(bf)) {
2628 -               ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2629 -               ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
2630 -       } else
2631 -               ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
2632 -
2633 -       if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
2634 -               ath_txq_schedule(sc, txq);
2635 -}
2636 -
2637  static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2638  {
2639         struct ath_hw *ah = sc->sc_ah;
2640 --- a/net/mac80211/rc80211_minstrel.c
2641 +++ b/net/mac80211/rc80211_minstrel.c
2642 @@ -494,6 +494,33 @@ minstrel_free_sta(void *priv, struct iee
2643         kfree(mi);
2644  }
2645
2646 +static void
2647 +minstrel_init_cck_rates(struct minstrel_priv *mp)
2648 +{
2649 +       static const int bitrates[4] = { 10, 20, 55, 110 };
2650 +       struct ieee80211_supported_band *sband;
2651 +       int i, j;
2652 +
2653 +       sband = mp->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2654 +       if (!sband)
2655 +               return;
2656 +
2657 +       for (i = 0, j = 0; i < sband->n_bitrates; i++) {
2658 +               struct ieee80211_rate *rate = &sband->bitrates[i];
2659 +
2660 +               if (rate->flags & IEEE80211_RATE_ERP_G)
2661 +                       continue;
2662 +
2663 +               for (j = 0; j < ARRAY_SIZE(bitrates); j++) {
2664 +                       if (rate->bitrate != bitrates[j])
2665 +                               continue;
2666 +
2667 +                       mp->cck_rates[j] = i;
2668 +                       break;
2669 +               }
2670 +       }
2671 +}
2672 +
2673  static void *
2674  minstrel_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir)
2675  {
2676 @@ -539,6 +566,8 @@ minstrel_alloc(struct ieee80211_hw *hw,
2677                         S_IRUGO | S_IWUGO, debugfsdir, &mp->fixed_rate_idx);
2678  #endif
2679
2680 +       minstrel_init_cck_rates(mp);
2681 +
2682         return mp;
2683  }
2684
2685 --- a/net/mac80211/rc80211_minstrel.h
2686 +++ b/net/mac80211/rc80211_minstrel.h
2687 @@ -79,6 +79,8 @@ struct minstrel_priv {
2688         unsigned int lookaround_rate;
2689         unsigned int lookaround_rate_mrr;
2690
2691 +       u8 cck_rates[4];
2692 +
2693  #ifdef CONFIG_MAC80211_DEBUGFS
2694         /*
2695          * enable fixed rate processing per RC
2696 --- a/net/mac80211/rc80211_minstrel_ht.c
2697 +++ b/net/mac80211/rc80211_minstrel_ht.c
2698 @@ -1,5 +1,5 @@
2699  /*
2700 - * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
2701 + * Copyright (C) 2010-2013 Felix Fietkau <nbd@openwrt.org>
2702   *
2703   * This program is free software; you can redistribute it and/or modify
2704   * it under the terms of the GNU General Public License version 2 as
2705 @@ -63,6 +63,30 @@
2706         }                                                               \
2707  }
2708
2709 +#define CCK_DURATION(_bitrate, _short, _len)           \
2710 +       (10 /* SIFS */ +                                \
2711 +        (_short ? 72 + 24 : 144 + 48 ) +               \
2712 +        (8 * (_len + 4) * 10) / (_bitrate))
2713 +
2714 +#define CCK_ACK_DURATION(_bitrate, _short)                     \
2715 +       (CCK_DURATION((_bitrate > 10 ? 20 : 10), false, 60) +   \
2716 +        CCK_DURATION(_bitrate, _short, AVG_PKT_SIZE))
2717 +
2718 +#define CCK_DURATION_LIST(_short)                      \
2719 +       CCK_ACK_DURATION(10, _short),                   \
2720 +       CCK_ACK_DURATION(20, _short),                   \
2721 +       CCK_ACK_DURATION(55, _short),                   \
2722 +       CCK_ACK_DURATION(110, _short)
2723 +
2724 +#define CCK_GROUP                                      \
2725 +       {                                               \
2726 +               .streams = 0,                           \
2727 +               .duration = {                           \
2728 +                       CCK_DURATION_LIST(false),       \
2729 +                       CCK_DURATION_LIST(true)         \
2730 +               }                                       \
2731 +       }
2732 +
2733  /*
2734   * To enable sufficiently targeted rate sampling, MCS rates are divided into
2735   * groups, based on the number of streams and flags (HT40, SGI) that they
2736 @@ -95,8 +119,13 @@ const struct mcs_group minstrel_mcs_grou
2737  #if MINSTREL_MAX_STREAMS >= 3
2738         MCS_GROUP(3, 1, 1),
2739  #endif
2740 +
2741 +       /* must be last */
2742 +       CCK_GROUP
2743  };
2744
2745 +#define MINSTREL_CCK_GROUP     (ARRAY_SIZE(minstrel_mcs_groups) - 1)
2746 +
2747  static u8 sample_table[SAMPLE_COLUMNS][MCS_GROUP_RATES];
2748
2749  /*
2750 @@ -119,6 +148,29 @@ minstrel_ht_get_group_idx(struct ieee802
2751                          !!(rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH));
2752  }
2753
2754 +struct minstrel_rate_stats *
2755 +minstrel_ht_get_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
2756 +                     struct ieee80211_tx_rate *rate)
2757 +{
2758 +       int group, idx;
2759 +
2760 +       if (rate->flags & IEEE80211_TX_RC_MCS) {
2761 +               group = minstrel_ht_get_group_idx(rate);
2762 +               idx = rate->idx % MCS_GROUP_RATES;
2763 +       } else {
2764 +               group = MINSTREL_CCK_GROUP;
2765 +
2766 +               for (idx = 0; idx <= ARRAY_SIZE(mp->cck_rates); idx++)
2767 +                       if (rate->idx == mp->cck_rates[idx])
2768 +                               break;
2769 +
2770 +               /* short preamble */
2771 +               if (!(mi->groups[group].supported & BIT(idx)))
2772 +                       idx += 4;
2773 +       }
2774 +       return &mi->groups[group].rates[idx];
2775 +}
2776 +
2777  static inline struct minstrel_rate_stats *
2778  minstrel_get_ratestats(struct minstrel_ht_sta *mi, int index)
2779  {
2780 @@ -159,7 +211,7 @@ static void
2781  minstrel_ht_calc_tp(struct minstrel_ht_sta *mi, int group, int rate)
2782  {
2783         struct minstrel_rate_stats *mr;
2784 -       unsigned int usecs;
2785 +       unsigned int usecs = 0;
2786
2787         mr = &mi->groups[group].rates[rate];
2788
2789 @@ -168,7 +220,9 @@ minstrel_ht_calc_tp(struct minstrel_ht_s
2790                 return;
2791         }
2792
2793 -       usecs = mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
2794 +       if (group != MINSTREL_CCK_GROUP)
2795 +               usecs = mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
2796 +
2797         usecs += minstrel_mcs_groups[group].duration[rate];
2798         mr->cur_tp = MINSTREL_TRUNC((1000000 / usecs) * mr->probability);
2799  }
2800 @@ -231,10 +285,6 @@ minstrel_ht_update_stats(struct minstrel
2801                         if (!mr->cur_tp)
2802                                 continue;
2803
2804 -                       /* ignore the lowest rate of each single-stream group */
2805 -                       if (!i && minstrel_mcs_groups[group].streams == 1)
2806 -                               continue;
2807 -
2808                         if ((mr->cur_tp > cur_prob_tp && mr->probability >
2809                              MINSTREL_FRAC(3, 4)) || mr->probability > cur_prob) {
2810                                 mg->max_prob_rate = index;
2811 @@ -297,7 +347,7 @@ minstrel_ht_update_stats(struct minstrel
2812  }
2813
2814  static bool
2815 -minstrel_ht_txstat_valid(struct ieee80211_tx_rate *rate)
2816 +minstrel_ht_txstat_valid(struct minstrel_priv *mp, struct ieee80211_tx_rate *rate)
2817  {
2818         if (rate->idx < 0)
2819                 return false;
2820 @@ -305,7 +355,13 @@ minstrel_ht_txstat_valid(struct ieee8021
2821         if (!rate->count)
2822                 return false;
2823
2824 -       return !!(rate->flags & IEEE80211_TX_RC_MCS);
2825 +       if (rate->flags & IEEE80211_TX_RC_MCS);
2826 +               return true;
2827 +
2828 +       return rate->idx == mp->cck_rates[0] ||
2829 +              rate->idx == mp->cck_rates[1] ||
2830 +              rate->idx == mp->cck_rates[2] ||
2831 +              rate->idx == mp->cck_rates[3];
2832  }
2833
2834  static void
2835 @@ -390,7 +446,6 @@ minstrel_ht_tx_status(void *priv, struct
2836         struct minstrel_rate_stats *rate, *rate2;
2837         struct minstrel_priv *mp = priv;
2838         bool last;
2839 -       int group;
2840         int i;
2841
2842         if (!msp->is_ht)
2843 @@ -419,13 +474,12 @@ minstrel_ht_tx_status(void *priv, struct
2844         if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
2845                 mi->sample_packets += info->status.ampdu_len;
2846
2847 -       last = !minstrel_ht_txstat_valid(&ar[0]);
2848 +       last = !minstrel_ht_txstat_valid(mp, &ar[0]);
2849         for (i = 0; !last; i++) {
2850                 last = (i == IEEE80211_TX_MAX_RATES - 1) ||
2851 -                      !minstrel_ht_txstat_valid(&ar[i + 1]);
2852 +                      !minstrel_ht_txstat_valid(mp, &ar[i + 1]);
2853
2854 -               group = minstrel_ht_get_group_idx(&ar[i]);
2855 -               rate = &mi->groups[group].rates[ar[i].idx % 8];
2856 +               rate = minstrel_ht_get_stats(mp, mi, &ar[i]);
2857
2858                 if (last)
2859                         rate->success += info->status.ampdu_ack_len;
2860 @@ -451,7 +505,8 @@ minstrel_ht_tx_status(void *priv, struct
2861
2862         if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) {
2863                 minstrel_ht_update_stats(mp, mi);
2864 -               if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
2865 +               if (!(info->flags & IEEE80211_TX_CTL_AMPDU) &&
2866 +                   mi->max_prob_rate / MCS_GROUP_RATES != MINSTREL_CCK_GROUP)
2867                         minstrel_aggr_check(sta, skb);
2868         }
2869  }
2870 @@ -467,6 +522,7 @@ minstrel_calc_retransmit(struct minstrel
2871         unsigned int ctime = 0;
2872         unsigned int t_slot = 9; /* FIXME */
2873         unsigned int ampdu_len = MINSTREL_TRUNC(mi->avg_ampdu_len);
2874 +       unsigned int overhead = 0, overhead_rtscts = 0;
2875
2876         mr = minstrel_get_ratestats(mi, index);
2877         if (mr->probability < MINSTREL_FRAC(1, 10)) {
2878 @@ -488,9 +544,14 @@ minstrel_calc_retransmit(struct minstrel
2879         ctime += (t_slot * cw) >> 1;
2880         cw = min((cw << 1) | 1, mp->cw_max);
2881
2882 +       if (index / MCS_GROUP_RATES != MINSTREL_CCK_GROUP) {
2883 +               overhead = mi->overhead;
2884 +               overhead_rtscts = mi->overhead_rtscts;
2885 +       }
2886 +
2887         /* Total TX time for data and Contention after first 2 tries */
2888 -       tx_time = ctime + 2 * (mi->overhead + tx_time_data);
2889 -       tx_time_rtscts = ctime + 2 * (mi->overhead_rtscts + tx_time_data);
2890 +       tx_time = ctime + 2 * (overhead + tx_time_data);
2891 +       tx_time_rtscts = ctime + 2 * (overhead_rtscts + tx_time_data);
2892
2893         /* See how many more tries we can fit inside segment size */
2894         do {
2895 @@ -499,8 +560,8 @@ minstrel_calc_retransmit(struct minstrel
2896                 cw = min((cw << 1) | 1, mp->cw_max);
2897
2898                 /* Total TX time after this try */
2899 -               tx_time += ctime + mi->overhead + tx_time_data;
2900 -               tx_time_rtscts += ctime + mi->overhead_rtscts + tx_time_data;
2901 +               tx_time += ctime + overhead + tx_time_data;
2902 +               tx_time_rtscts += ctime + overhead_rtscts + tx_time_data;
2903
2904                 if (tx_time_rtscts < mp->segment_size)
2905                         mr->retry_count_rtscts++;
2906 @@ -530,9 +591,16 @@ minstrel_ht_set_rate(struct minstrel_pri
2907         else
2908                 rate->count = mr->retry_count;
2909
2910 -       rate->flags = IEEE80211_TX_RC_MCS | group->flags;
2911 +       rate->flags = 0;
2912         if (rtscts)
2913                 rate->flags |= IEEE80211_TX_RC_USE_RTS_CTS;
2914 +
2915 +       if (index / MCS_GROUP_RATES == MINSTREL_CCK_GROUP) {
2916 +               rate->idx = mp->cck_rates[index % ARRAY_SIZE(mp->cck_rates)];
2917 +               return;
2918 +       }
2919 +
2920 +       rate->flags |= IEEE80211_TX_RC_MCS | group->flags;
2921         rate->idx = index % MCS_GROUP_RATES + (group->streams - 1) * MCS_GROUP_RATES;
2922  }
2923
2924 @@ -596,6 +664,22 @@ minstrel_get_sample_rate(struct minstrel
2925  }
2926
2927  static void
2928 +minstrel_ht_check_cck_shortpreamble(struct minstrel_priv *mp,
2929 +                                   struct minstrel_ht_sta *mi, bool val)
2930 +{
2931 +       u8 supported = mi->groups[MINSTREL_CCK_GROUP].supported;
2932 +
2933 +       if (!supported || !mi->cck_supported_short)
2934 +               return;
2935 +
2936 +       if (supported & (mi->cck_supported_short << (val * 4)))
2937 +               return;
2938 +
2939 +       supported ^= mi->cck_supported_short | (mi->cck_supported_short << 4);
2940 +       mi->groups[MINSTREL_CCK_GROUP].supported = supported;
2941 +}
2942 +
2943 +static void
2944  minstrel_ht_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
2945                       struct ieee80211_tx_rate_control *txrc)
2946  {
2947 @@ -614,6 +698,7 @@ minstrel_ht_get_rate(void *priv, struct
2948                 return mac80211_minstrel.get_rate(priv, sta, &msp->legacy, txrc);
2949
2950         info->flags |= mi->tx_flags;
2951 +       minstrel_ht_check_cck_shortpreamble(mp, mi, txrc->short_preamble);
2952
2953         /* Don't use EAPOL frames for sampling on non-mrr hw */
2954         if (mp->hw->max_rates == 1 &&
2955 @@ -687,6 +772,30 @@ minstrel_ht_get_rate(void *priv, struct
2956  }
2957
2958  static void
2959 +minstrel_ht_update_cck(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
2960 +                      struct ieee80211_supported_band *sband,
2961 +                      struct ieee80211_sta *sta)
2962 +{
2963 +       int i;
2964 +
2965 +       if (sband->band != IEEE80211_BAND_2GHZ)
2966 +               return;
2967 +
2968 +       mi->cck_supported = 0;
2969 +       mi->cck_supported_short = 0;
2970 +       for (i = 0; i < 4; i++) {
2971 +               if (!rate_supported(sta, sband->band, mp->cck_rates[i]))
2972 +                       continue;
2973 +
2974 +               mi->cck_supported |= BIT(i);
2975 +               if (sband->bitrates[i].flags & IEEE80211_RATE_SHORT_PREAMBLE)
2976 +                       mi->cck_supported_short |= BIT(i);
2977 +       }
2978 +
2979 +       mi->groups[MINSTREL_CCK_GROUP].supported = mi->cck_supported;
2980 +}
2981 +
2982 +static void
2983  minstrel_ht_update_caps(void *priv, struct ieee80211_supported_band *sband,
2984                          struct ieee80211_sta *sta, void *priv_sta)
2985  {
2986 @@ -706,7 +815,7 @@ minstrel_ht_update_caps(void *priv, stru
2987                 goto use_legacy;
2988
2989         BUILD_BUG_ON(ARRAY_SIZE(minstrel_mcs_groups) !=
2990 -               MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS);
2991 +               MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS + 1);
2992
2993         msp->is_ht = true;
2994         memset(mi, 0, sizeof(*mi));
2995 @@ -742,6 +851,11 @@ minstrel_ht_update_caps(void *priv, stru
2996                 u16 req = 0;
2997
2998                 mi->groups[i].supported = 0;
2999 +               if (i == MINSTREL_CCK_GROUP) {
3000 +                       minstrel_ht_update_cck(mp, mi, sband, sta);
3001 +                       continue;
3002 +               }
3003 +
3004                 if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_SHORT_GI) {
3005                         if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
3006                                 req |= IEEE80211_HT_CAP_SGI_40;
3007 --- a/net/mac80211/rc80211_minstrel_ht.h
3008 +++ b/net/mac80211/rc80211_minstrel_ht.h
3009 @@ -107,8 +107,11 @@ struct minstrel_ht_sta {
3010         /* current MCS group to be sampled */
3011         u8 sample_group;
3012
3013 +       u8 cck_supported;
3014 +       u8 cck_supported_short;
3015 +
3016         /* MCS rate group info and statistics */
3017 -       struct minstrel_mcs_group_data groups[MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS];
3018 +       struct minstrel_mcs_group_data groups[MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS + 1];
3019  };
3020
3021  struct minstrel_ht_sta_priv {
3022 --- a/net/mac80211/rc80211_minstrel_ht_debugfs.c
3023 +++ b/net/mac80211/rc80211_minstrel_ht_debugfs.c
3024 @@ -15,13 +15,76 @@
3025  #include "rc80211_minstrel.h"
3026  #include "rc80211_minstrel_ht.h"
3027
3028 +static char *
3029 +minstrel_ht_stats_dump(struct minstrel_ht_sta *mi, int i, char *p)
3030 +{
3031 +       unsigned int max_mcs = MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS;
3032 +       const struct mcs_group *mg;
3033 +       unsigned int j, tp, prob, eprob;
3034 +       char htmode = '2';
3035 +       char gimode = 'L';
3036 +
3037 +       if (!mi->groups[i].supported)
3038 +               return p;
3039 +
3040 +       mg = &minstrel_mcs_groups[i];
3041 +       if (mg->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
3042 +               htmode = '4';
3043 +       if (mg->flags & IEEE80211_TX_RC_SHORT_GI)
3044 +               gimode = 'S';
3045 +
3046 +       for (j = 0; j < MCS_GROUP_RATES; j++) {
3047 +               struct minstrel_rate_stats *mr = &mi->groups[i].rates[j];
3048 +               static const int bitrates[4] = { 10, 20, 55, 110 };
3049 +               int idx = i * MCS_GROUP_RATES + j;
3050 +
3051 +               if (!(mi->groups[i].supported & BIT(j)))
3052 +                       continue;
3053 +
3054 +               if (i == max_mcs)
3055 +                       p += sprintf(p, "CCK/%cP   ", j < 4 ? 'L' : 'S');
3056 +               else
3057 +                       p += sprintf(p, "HT%c0/%cGI ", htmode, gimode);
3058 +
3059 +               *(p++) = (idx == mi->max_tp_rate) ? 'T' : ' ';
3060 +               *(p++) = (idx == mi->max_tp_rate2) ? 't' : ' ';
3061 +               *(p++) = (idx == mi->max_prob_rate) ? 'P' : ' ';
3062 +
3063 +               if (i == max_mcs) {
3064 +                       int r = bitrates[j % 4];
3065 +                       p += sprintf(p, " %2u.%1uM", r / 10, r % 10);
3066 +               } else {
3067 +                       p += sprintf(p, " MCS%-2u", (mg->streams - 1) *
3068 +                                        MCS_GROUP_RATES + j);
3069 +               }
3070 +
3071 +               tp = mr->cur_tp / 10;
3072 +               prob = MINSTREL_TRUNC(mr->cur_prob * 1000);
3073 +               eprob = MINSTREL_TRUNC(mr->probability * 1000);
3074 +
3075 +               p += sprintf(p, "      %6u.%1u   %6u.%1u    %6u.%1u    "
3076 +                               "%3u            %3u(%3u)  %8llu    %8llu\n",
3077 +                               tp / 10, tp % 10,
3078 +                               eprob / 10, eprob % 10,
3079 +                               prob / 10, prob % 10,
3080 +                               mr->retry_count,
3081 +                               mr->last_success,
3082 +                               mr->last_attempts,
3083 +                               (unsigned long long)mr->succ_hist,
3084 +                               (unsigned long long)mr->att_hist);
3085 +       }
3086 +
3087 +       return p;
3088 +}
3089 +
3090  static int
3091  minstrel_ht_stats_open(struct inode *inode, struct file *file)
3092  {
3093         struct minstrel_ht_sta_priv *msp = inode->i_private;
3094         struct minstrel_ht_sta *mi = &msp->ht;
3095         struct minstrel_debugfs_info *ms;
3096 -       unsigned int i, j, tp, prob, eprob;
3097 +       unsigned int i;
3098 +       unsigned int max_mcs = MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS;
3099         char *p;
3100         int ret;
3101
3102 @@ -38,50 +101,13 @@ minstrel_ht_stats_open(struct inode *ino
3103
3104         file->private_data = ms;
3105         p = ms->buf;
3106 -       p += sprintf(p, "type      rate     throughput  ewma prob   this prob  "
3107 -                       "this succ/attempt   success    attempts\n");
3108 -       for (i = 0; i < MINSTREL_MAX_STREAMS * MINSTREL_STREAM_GROUPS; i++) {
3109 -               char htmode = '2';
3110 -               char gimode = 'L';
3111 -
3112 -               if (!mi->groups[i].supported)
3113 -                       continue;
3114 -
3115 -               if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
3116 -                       htmode = '4';
3117 -               if (minstrel_mcs_groups[i].flags & IEEE80211_TX_RC_SHORT_GI)
3118 -                       gimode = 'S';
3119 -
3120 -               for (j = 0; j < MCS_GROUP_RATES; j++) {
3121 -                       struct minstrel_rate_stats *mr = &mi->groups[i].rates[j];
3122 -                       int idx = i * MCS_GROUP_RATES + j;
3123 +       p += sprintf(p, "type         rate     throughput  ewma prob   this prob  "
3124 +                       "retry   this succ/attempt   success    attempts\n");
3125
3126 -                       if (!(mi->groups[i].supported & BIT(j)))
3127 -                               continue;
3128 +       p = minstrel_ht_stats_dump(mi, max_mcs, p);
3129 +       for (i = 0; i < max_mcs; i++)
3130 +               p = minstrel_ht_stats_dump(mi, i, p);
3131
3132 -                       p += sprintf(p, "HT%c0/%cGI ", htmode, gimode);
3133 -
3134 -                       *(p++) = (idx == mi->max_tp_rate) ? 'T' : ' ';
3135 -                       *(p++) = (idx == mi->max_tp_rate2) ? 't' : ' ';
3136 -                       *(p++) = (idx == mi->max_prob_rate) ? 'P' : ' ';
3137 -                       p += sprintf(p, "MCS%-2u", (minstrel_mcs_groups[i].streams - 1) *
3138 -                                       MCS_GROUP_RATES + j);
3139 -
3140 -                       tp = mr->cur_tp / 10;
3141 -                       prob = MINSTREL_TRUNC(mr->cur_prob * 1000);
3142 -                       eprob = MINSTREL_TRUNC(mr->probability * 1000);
3143 -
3144 -                       p += sprintf(p, "  %6u.%1u   %6u.%1u   %6u.%1u        "
3145 -                                       "%3u(%3u)   %8llu    %8llu\n",
3146 -                                       tp / 10, tp % 10,
3147 -                                       eprob / 10, eprob % 10,
3148 -                                       prob / 10, prob % 10,
3149 -                                       mr->last_success,
3150 -                                       mr->last_attempts,
3151 -                                       (unsigned long long)mr->succ_hist,
3152 -                                       (unsigned long long)mr->att_hist);
3153 -               }
3154 -       }
3155         p += sprintf(p, "\nTotal packet count::    ideal %d      "
3156                         "lookaround %d\n",
3157                         max(0, (int) mi->total_packets - (int) mi->sample_packets),